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revert-mm-fix-blkdev-size-calculation-in-generic_write_checks
[linux-2.6/linux-trees-mm.git] / drivers / hwmon / w83627hf.c
blobb65bc95fcc02cd63fd7c76649897cdfe4ba517ef
1 /*
2 w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>,
5 Philip Edelbrock <phil@netroedge.com>,
6 and Mark Studebaker <mdsxyz123@yahoo.com>
7 Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org>
8 Copyright (c) 2007 Jean Delvare <khali@linux-fr.org>
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
25 /*
26 Supports following chips:
27
28 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
29 w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC)
30 w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
31 w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC)
32 w83687thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
33 w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC)
34
35 For other winbond chips, and for i2c support in the above chips,
36 use w83781d.c.
37
38 Note: automatic ("cruise") fan control for 697, 637 & 627thf not
39 supported yet.
40 */
41
42 #include <linux/module.h>
43 #include <linux/init.h>
44 #include <linux/slab.h>
45 #include <linux/jiffies.h>
46 #include <linux/platform_device.h>
47 #include <linux/hwmon.h>
48 #include <linux/hwmon-sysfs.h>
49 #include <linux/hwmon-vid.h>
50 #include <linux/err.h>
51 #include <linux/mutex.h>
52 #include <linux/ioport.h>
53 #include <linux/acpi.h>
54 #include <asm/io.h>
55 #include "lm75.h"
56
57 static struct platform_device *pdev;
58
59 #define DRVNAME "w83627hf"
60 enum chips { w83627hf, w83627thf, w83697hf, w83637hf, w83687thf };
61
62 static u16 force_addr;
63 module_param(force_addr, ushort, 0);
64 MODULE_PARM_DESC(force_addr,
65 "Initialize the base address of the sensors");
66 static u8 force_i2c = 0x1f;
67 module_param(force_i2c, byte, 0);
68 MODULE_PARM_DESC(force_i2c,
69 "Initialize the i2c address of the sensors");
70
71 static int reset;
72 module_param(reset, bool, 0);
73 MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
74
75 static int init = 1;
76 module_param(init, bool, 0);
77 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
78
79 /* modified from kernel/include/traps.c */
80 static int REG; /* The register to read/write */
81 #define DEV 0x07 /* Register: Logical device select */
82 static int VAL; /* The value to read/write */
83
84 /* logical device numbers for superio_select (below) */
85 #define W83627HF_LD_FDC 0x00
86 #define W83627HF_LD_PRT 0x01
87 #define W83627HF_LD_UART1 0x02
88 #define W83627HF_LD_UART2 0x03
89 #define W83627HF_LD_KBC 0x05
90 #define W83627HF_LD_CIR 0x06 /* w83627hf only */
91 #define W83627HF_LD_GAME 0x07
92 #define W83627HF_LD_MIDI 0x07
93 #define W83627HF_LD_GPIO1 0x07
94 #define W83627HF_LD_GPIO5 0x07 /* w83627thf only */
95 #define W83627HF_LD_GPIO2 0x08
96 #define W83627HF_LD_GPIO3 0x09
97 #define W83627HF_LD_GPIO4 0x09 /* w83627thf only */
98 #define W83627HF_LD_ACPI 0x0a
99 #define W83627HF_LD_HWM 0x0b
100
101 #define DEVID 0x20 /* Register: Device ID */
102
103 #define W83627THF_GPIO5_EN 0x30 /* w83627thf only */
104 #define W83627THF_GPIO5_IOSR 0xf3 /* w83627thf only */
105 #define W83627THF_GPIO5_DR 0xf4 /* w83627thf only */
106
107 #define W83687THF_VID_EN 0x29 /* w83687thf only */
108 #define W83687THF_VID_CFG 0xF0 /* w83687thf only */
109 #define W83687THF_VID_DATA 0xF1 /* w83687thf only */
110
111 static inline void
112 superio_outb(int reg, int val)
113 {
114 outb(reg, REG);
115 outb(val, VAL);
116 }
117
118 static inline int
119 superio_inb(int reg)
120 {
121 outb(reg, REG);
122 return inb(VAL);
123 }
124
125 static inline void
126 superio_select(int ld)
127 {
128 outb(DEV, REG);
129 outb(ld, VAL);
130 }
131
132 static inline void
133 superio_enter(void)
134 {
135 outb(0x87, REG);
136 outb(0x87, REG);
137 }
138
139 static inline void
140 superio_exit(void)
141 {
142 outb(0xAA, REG);
143 }
144
145 #define W627_DEVID 0x52
146 #define W627THF_DEVID 0x82
147 #define W697_DEVID 0x60
148 #define W637_DEVID 0x70
149 #define W687THF_DEVID 0x85
150 #define WINB_ACT_REG 0x30
151 #define WINB_BASE_REG 0x60
152 /* Constants specified below */
153
154 /* Alignment of the base address */
155 #define WINB_ALIGNMENT ~7
156
157 /* Offset & size of I/O region we are interested in */
158 #define WINB_REGION_OFFSET 5
159 #define WINB_REGION_SIZE 2
160
161 /* Where are the sensors address/data registers relative to the region offset */
162 #define W83781D_ADDR_REG_OFFSET 0
163 #define W83781D_DATA_REG_OFFSET 1
164
165 /* The W83781D registers */
166 /* The W83782D registers for nr=7,8 are in bank 5 */
167 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
168 (0x554 + (((nr) - 7) * 2)))
169 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
170 (0x555 + (((nr) - 7) * 2)))
171 #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
172 (0x550 + (nr) - 7))
173
174 /* nr:0-2 for fans:1-3 */
175 #define W83627HF_REG_FAN_MIN(nr) (0x3b + (nr))
176 #define W83627HF_REG_FAN(nr) (0x28 + (nr))
177
178 #define W83627HF_REG_TEMP2_CONFIG 0x152
179 #define W83627HF_REG_TEMP3_CONFIG 0x252
180 /* these are zero-based, unlike config constants above */
181 static const u16 w83627hf_reg_temp[] = { 0x27, 0x150, 0x250 };
182 static const u16 w83627hf_reg_temp_hyst[] = { 0x3A, 0x153, 0x253 };
183 static const u16 w83627hf_reg_temp_over[] = { 0x39, 0x155, 0x255 };
184
185 #define W83781D_REG_BANK 0x4E
186
187 #define W83781D_REG_CONFIG 0x40
188 #define W83781D_REG_ALARM1 0x459
189 #define W83781D_REG_ALARM2 0x45A
190 #define W83781D_REG_ALARM3 0x45B
191
192 #define W83781D_REG_BEEP_CONFIG 0x4D
193 #define W83781D_REG_BEEP_INTS1 0x56
194 #define W83781D_REG_BEEP_INTS2 0x57
195 #define W83781D_REG_BEEP_INTS3 0x453
196
197 #define W83781D_REG_VID_FANDIV 0x47
198
199 #define W83781D_REG_CHIPID 0x49
200 #define W83781D_REG_WCHIPID 0x58
201 #define W83781D_REG_CHIPMAN 0x4F
202 #define W83781D_REG_PIN 0x4B
203
204 #define W83781D_REG_VBAT 0x5D
205
206 #define W83627HF_REG_PWM1 0x5A
207 #define W83627HF_REG_PWM2 0x5B
208
209 #define W83627THF_REG_PWM1 0x01 /* 697HF/637HF/687THF too */
210 #define W83627THF_REG_PWM2 0x03 /* 697HF/637HF/687THF too */
211 #define W83627THF_REG_PWM3 0x11 /* 637HF/687THF too */
212
213 #define W83627THF_REG_VRM_OVT_CFG 0x18 /* 637HF/687THF too */
214
215 static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 };
216 static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2,
217 W83627THF_REG_PWM3 };
218 #define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \
219 regpwm_627hf[nr] : regpwm[nr])
220
221 #define W83627HF_REG_PWM_FREQ 0x5C /* Only for the 627HF */
222
223 #define W83637HF_REG_PWM_FREQ1 0x00 /* 697HF/687THF too */
224 #define W83637HF_REG_PWM_FREQ2 0x02 /* 697HF/687THF too */
225 #define W83637HF_REG_PWM_FREQ3 0x10 /* 687THF too */
226
227 static const u8 W83637HF_REG_PWM_FREQ[] = { W83637HF_REG_PWM_FREQ1,
228 W83637HF_REG_PWM_FREQ2,
229 W83637HF_REG_PWM_FREQ3 };
230
231 #define W83627HF_BASE_PWM_FREQ 46870
232
233 #define W83781D_REG_I2C_ADDR 0x48
234 #define W83781D_REG_I2C_SUBADDR 0x4A
235
236 /* Sensor selection */
237 #define W83781D_REG_SCFG1 0x5D
238 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
239 #define W83781D_REG_SCFG2 0x59
240 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
241 #define W83781D_DEFAULT_BETA 3435
242
243 /* Conversions. Limit checking is only done on the TO_REG
244 variants. Note that you should be a bit careful with which arguments
245 these macros are called: arguments may be evaluated more than once.
246 Fixing this is just not worth it. */
247 #define IN_TO_REG(val) (SENSORS_LIMIT((((val) + 8)/16),0,255))
248 #define IN_FROM_REG(val) ((val) * 16)
249
250 static inline u8 FAN_TO_REG(long rpm, int div)
251 {
252 if (rpm == 0)
253 return 255;
254 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
255 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
256 254);
257 }
258
259 #define TEMP_MIN (-128000)
260 #define TEMP_MAX ( 127000)
261
262 /* TEMP: 0.001C/bit (-128C to +127C)
263 REG: 1C/bit, two's complement */
264 static u8 TEMP_TO_REG(long temp)
265 {
266 int ntemp = SENSORS_LIMIT(temp, TEMP_MIN, TEMP_MAX);
267 ntemp += (ntemp<0 ? -500 : 500);
268 return (u8)(ntemp / 1000);
269 }
270
271 static int TEMP_FROM_REG(u8 reg)
272 {
273 return (s8)reg * 1000;
274 }
275
276 #define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
277
278 #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
279
280 static inline unsigned long pwm_freq_from_reg_627hf(u8 reg)
281 {
282 unsigned long freq;
283 freq = W83627HF_BASE_PWM_FREQ >> reg;
284 return freq;
285 }
286 static inline u8 pwm_freq_to_reg_627hf(unsigned long val)
287 {
288 u8 i;
289 /* Only 5 dividers (1 2 4 8 16)
290 Search for the nearest available frequency */
291 for (i = 0; i < 4; i++) {
292 if (val > (((W83627HF_BASE_PWM_FREQ >> i) +
293 (W83627HF_BASE_PWM_FREQ >> (i+1))) / 2))
294 break;
295 }
296 return i;
297 }
298
299 static inline unsigned long pwm_freq_from_reg(u8 reg)
300 {
301 /* Clock bit 8 -> 180 kHz or 24 MHz */
302 unsigned long clock = (reg & 0x80) ? 180000UL : 24000000UL;
303
304 reg &= 0x7f;
305 /* This should not happen but anyway... */
306 if (reg == 0)
307 reg++;
308 return (clock / (reg << 8));
309 }
310 static inline u8 pwm_freq_to_reg(unsigned long val)
311 {
312 /* Minimum divider value is 0x01 and maximum is 0x7F */
313 if (val >= 93750) /* The highest we can do */
314 return 0x01;
315 if (val >= 720) /* Use 24 MHz clock */
316 return (24000000UL / (val << 8));
317 if (val < 6) /* The lowest we can do */
318 return 0xFF;
319 else /* Use 180 kHz clock */
320 return (0x80 | (180000UL / (val << 8)));
321 }
322
323 #define BEEP_MASK_FROM_REG(val) (val)
324 #define BEEP_MASK_TO_REG(val) ((val) & 0xffffff)
325 #define BEEP_ENABLE_TO_REG(val) ((val)?1:0)
326 #define BEEP_ENABLE_FROM_REG(val) ((val)?1:0)
327
328 #define DIV_FROM_REG(val) (1 << (val))
329
330 static inline u8 DIV_TO_REG(long val)
331 {
332 int i;
333 val = SENSORS_LIMIT(val, 1, 128) >> 1;
334 for (i = 0; i < 7; i++) {
335 if (val == 0)
336 break;
337 val >>= 1;
338 }
339 return ((u8) i);
340 }
341
342 /* For each registered chip, we need to keep some data in memory.
343 The structure is dynamically allocated. */
344 struct w83627hf_data {
345 unsigned short addr;
346 const char *name;
347 struct device *hwmon_dev;
348 struct mutex lock;
349 enum chips type;
350
351 struct mutex update_lock;
352 char valid; /* !=0 if following fields are valid */
353 unsigned long last_updated; /* In jiffies */
354
355 u8 in[9]; /* Register value */
356 u8 in_max[9]; /* Register value */
357 u8 in_min[9]; /* Register value */
358 u8 fan[3]; /* Register value */
359 u8 fan_min[3]; /* Register value */
360 u16 temp[3]; /* Register value */
361 u16 temp_max[3]; /* Register value */
362 u16 temp_max_hyst[3]; /* Register value */
363 u8 fan_div[3]; /* Register encoding, shifted right */
364 u8 vid; /* Register encoding, combined */
365 u32 alarms; /* Register encoding, combined */
366 u32 beep_mask; /* Register encoding, combined */
367 u8 beep_enable; /* Boolean */
368 u8 pwm[3]; /* Register value */
369 u8 pwm_freq[3]; /* Register value */
370 u16 sens[3]; /* 1 = pentium diode; 2 = 3904 diode;
371 4 = thermistor */
372 u8 vrm;
373 u8 vrm_ovt; /* Register value, 627THF/637HF/687THF only */
374 };
375
376 struct w83627hf_sio_data {
377 enum chips type;
378 };
379
380
381 static int w83627hf_probe(struct platform_device *pdev);
382 static int __devexit w83627hf_remove(struct platform_device *pdev);
383
384 static int w83627hf_read_value(struct w83627hf_data *data, u16 reg);
385 static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value);
386 static void w83627hf_update_fan_div(struct w83627hf_data *data);
387 static struct w83627hf_data *w83627hf_update_device(struct device *dev);
388 static void w83627hf_init_device(struct platform_device *pdev);
389
390 static struct platform_driver w83627hf_driver = {
391 .driver = {
392 .owner = THIS_MODULE,
393 .name = DRVNAME,
394 },
395 .probe = w83627hf_probe,
396 .remove = __devexit_p(w83627hf_remove),
397 };
398
399 static ssize_t
400 show_in_input(struct device *dev, struct device_attribute *devattr, char *buf)
401 {
402 int nr = to_sensor_dev_attr(devattr)->index;
403 struct w83627hf_data *data = w83627hf_update_device(dev);
404 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in[nr]));
405 }
406 static ssize_t
407 show_in_min(struct device *dev, struct device_attribute *devattr, char *buf)
408 {
409 int nr = to_sensor_dev_attr(devattr)->index;
410 struct w83627hf_data *data = w83627hf_update_device(dev);
411 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_min[nr]));
412 }
413 static ssize_t
414 show_in_max(struct device *dev, struct device_attribute *devattr, char *buf)
415 {
416 int nr = to_sensor_dev_attr(devattr)->index;
417 struct w83627hf_data *data = w83627hf_update_device(dev);
418 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_max[nr]));
419 }
420 static ssize_t
421 store_in_min(struct device *dev, struct device_attribute *devattr,
422 const char *buf, size_t count)
423 {
424 int nr = to_sensor_dev_attr(devattr)->index;
425 struct w83627hf_data *data = dev_get_drvdata(dev);
426 long val = simple_strtol(buf, NULL, 10);
427
428 mutex_lock(&data->update_lock);
429 data->in_min[nr] = IN_TO_REG(val);
430 w83627hf_write_value(data, W83781D_REG_IN_MIN(nr), data->in_min[nr]);
431 mutex_unlock(&data->update_lock);
432 return count;
433 }
434 static ssize_t
435 store_in_max(struct device *dev, struct device_attribute *devattr,
436 const char *buf, size_t count)
437 {
438 int nr = to_sensor_dev_attr(devattr)->index;
439 struct w83627hf_data *data = dev_get_drvdata(dev);
440 long val = simple_strtol(buf, NULL, 10);
441
442 mutex_lock(&data->update_lock);
443 data->in_max[nr] = IN_TO_REG(val);
444 w83627hf_write_value(data, W83781D_REG_IN_MAX(nr), data->in_max[nr]);
445 mutex_unlock(&data->update_lock);
446 return count;
447 }
448 #define sysfs_vin_decl(offset) \
449 static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
450 show_in_input, NULL, offset); \
451 static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO|S_IWUSR, \
452 show_in_min, store_in_min, offset); \
453 static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO|S_IWUSR, \
454 show_in_max, store_in_max, offset);
455
456 sysfs_vin_decl(1);
457 sysfs_vin_decl(2);
458 sysfs_vin_decl(3);
459 sysfs_vin_decl(4);
460 sysfs_vin_decl(5);
461 sysfs_vin_decl(6);
462 sysfs_vin_decl(7);
463 sysfs_vin_decl(8);
464
465 /* use a different set of functions for in0 */
466 static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg)
467 {
468 long in0;
469
470 if ((data->vrm_ovt & 0x01) &&
471 (w83627thf == data->type || w83637hf == data->type
472 || w83687thf == data->type))
473
474 /* use VRM9 calculation */
475 in0 = (long)((reg * 488 + 70000 + 50) / 100);
476 else
477 /* use VRM8 (standard) calculation */
478 in0 = (long)IN_FROM_REG(reg);
479
480 return sprintf(buf,"%ld\n", in0);
481 }
482
483 static ssize_t show_regs_in_0(struct device *dev, struct device_attribute *attr, char *buf)
484 {
485 struct w83627hf_data *data = w83627hf_update_device(dev);
486 return show_in_0(data, buf, data->in[0]);
487 }
488
489 static ssize_t show_regs_in_min0(struct device *dev, struct device_attribute *attr, char *buf)
490 {
491 struct w83627hf_data *data = w83627hf_update_device(dev);
492 return show_in_0(data, buf, data->in_min[0]);
493 }
494
495 static ssize_t show_regs_in_max0(struct device *dev, struct device_attribute *attr, char *buf)
496 {
497 struct w83627hf_data *data = w83627hf_update_device(dev);
498 return show_in_0(data, buf, data->in_max[0]);
499 }
500
501 static ssize_t store_regs_in_min0(struct device *dev, struct device_attribute *attr,
502 const char *buf, size_t count)
503 {
504 struct w83627hf_data *data = dev_get_drvdata(dev);
505 u32 val;
506
507 val = simple_strtoul(buf, NULL, 10);
508
509 mutex_lock(&data->update_lock);
510
511 if ((data->vrm_ovt & 0x01) &&
512 (w83627thf == data->type || w83637hf == data->type
513 || w83687thf == data->type))
514
515 /* use VRM9 calculation */
516 data->in_min[0] =
517 SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0,
518 255);
519 else
520 /* use VRM8 (standard) calculation */
521 data->in_min[0] = IN_TO_REG(val);
522
523 w83627hf_write_value(data, W83781D_REG_IN_MIN(0), data->in_min[0]);
524 mutex_unlock(&data->update_lock);
525 return count;
526 }
527
528 static ssize_t store_regs_in_max0(struct device *dev, struct device_attribute *attr,
529 const char *buf, size_t count)
530 {
531 struct w83627hf_data *data = dev_get_drvdata(dev);
532 u32 val;
533
534 val = simple_strtoul(buf, NULL, 10);
535
536 mutex_lock(&data->update_lock);
537
538 if ((data->vrm_ovt & 0x01) &&
539 (w83627thf == data->type || w83637hf == data->type
540 || w83687thf == data->type))
541
542 /* use VRM9 calculation */
543 data->in_max[0] =
544 SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0,
545 255);
546 else
547 /* use VRM8 (standard) calculation */
548 data->in_max[0] = IN_TO_REG(val);
549
550 w83627hf_write_value(data, W83781D_REG_IN_MAX(0), data->in_max[0]);
551 mutex_unlock(&data->update_lock);
552 return count;
553 }
554
555 static DEVICE_ATTR(in0_input, S_IRUGO, show_regs_in_0, NULL);
556 static DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
557 show_regs_in_min0, store_regs_in_min0);
558 static DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
559 show_regs_in_max0, store_regs_in_max0);
560
561 static ssize_t
562 show_fan_input(struct device *dev, struct device_attribute *devattr, char *buf)
563 {
564 int nr = to_sensor_dev_attr(devattr)->index;
565 struct w83627hf_data *data = w83627hf_update_device(dev);
566 return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan[nr],
567 (long)DIV_FROM_REG(data->fan_div[nr])));
568 }
569 static ssize_t
570 show_fan_min(struct device *dev, struct device_attribute *devattr, char *buf)
571 {
572 int nr = to_sensor_dev_attr(devattr)->index;
573 struct w83627hf_data *data = w83627hf_update_device(dev);
574 return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan_min[nr],
575 (long)DIV_FROM_REG(data->fan_div[nr])));
576 }
577 static ssize_t
578 store_fan_min(struct device *dev, struct device_attribute *devattr,
579 const char *buf, size_t count)
580 {
581 int nr = to_sensor_dev_attr(devattr)->index;
582 struct w83627hf_data *data = dev_get_drvdata(dev);
583 u32 val = simple_strtoul(buf, NULL, 10);
584
585 mutex_lock(&data->update_lock);
586 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
587 w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr),
588 data->fan_min[nr]);
589
590 mutex_unlock(&data->update_lock);
591 return count;
592 }
593 #define sysfs_fan_decl(offset) \
594 static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, \
595 show_fan_input, NULL, offset - 1); \
596 static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
597 show_fan_min, store_fan_min, offset - 1);
598
599 sysfs_fan_decl(1);
600 sysfs_fan_decl(2);
601 sysfs_fan_decl(3);
602
603 static ssize_t
604 show_temp(struct device *dev, struct device_attribute *devattr, char *buf)
605 {
606 int nr = to_sensor_dev_attr(devattr)->index;
607 struct w83627hf_data *data = w83627hf_update_device(dev);
608
609 u16 tmp = data->temp[nr];
610 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
611 : (long) TEMP_FROM_REG(tmp));
612 }
613
614 static ssize_t
615 show_temp_max(struct device *dev, struct device_attribute *devattr,
616 char *buf)
617 {
618 int nr = to_sensor_dev_attr(devattr)->index;
619 struct w83627hf_data *data = w83627hf_update_device(dev);
620
621 u16 tmp = data->temp_max[nr];
622 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
623 : (long) TEMP_FROM_REG(tmp));
624 }
625
626 static ssize_t
627 show_temp_max_hyst(struct device *dev, struct device_attribute *devattr,
628 char *buf)
629 {
630 int nr = to_sensor_dev_attr(devattr)->index;
631 struct w83627hf_data *data = w83627hf_update_device(dev);
632
633 u16 tmp = data->temp_max_hyst[nr];
634 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
635 : (long) TEMP_FROM_REG(tmp));
636 }
637
638 static ssize_t
639 store_temp_max(struct device *dev, struct device_attribute *devattr,
640 const char *buf, size_t count)
641 {
642 int nr = to_sensor_dev_attr(devattr)->index;
643 struct w83627hf_data *data = dev_get_drvdata(dev);
644 long val = simple_strtol(buf, NULL, 10);
645 u16 tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val);
646
647 mutex_lock(&data->update_lock);
648 data->temp_max[nr] = tmp;
649 w83627hf_write_value(data, w83627hf_reg_temp_over[nr], tmp);
650 mutex_unlock(&data->update_lock);
651 return count;
652 }
653
654 static ssize_t
655 store_temp_max_hyst(struct device *dev, struct device_attribute *devattr,
656 const char *buf, size_t count)
657 {
658 int nr = to_sensor_dev_attr(devattr)->index;
659 struct w83627hf_data *data = dev_get_drvdata(dev);
660 long val = simple_strtol(buf, NULL, 10);
661 u16 tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val);
662
663 mutex_lock(&data->update_lock);
664 data->temp_max_hyst[nr] = tmp;
665 w83627hf_write_value(data, w83627hf_reg_temp_hyst[nr], tmp);
666 mutex_unlock(&data->update_lock);
667 return count;
668 }
669
670 #define sysfs_temp_decl(offset) \
671 static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
672 show_temp, NULL, offset - 1); \
673 static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO|S_IWUSR, \
674 show_temp_max, store_temp_max, offset - 1); \
675 static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO|S_IWUSR, \
676 show_temp_max_hyst, store_temp_max_hyst, offset - 1);
677
678 sysfs_temp_decl(1);
679 sysfs_temp_decl(2);
680 sysfs_temp_decl(3);
681
682 static ssize_t
683 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
684 {
685 struct w83627hf_data *data = w83627hf_update_device(dev);
686 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
687 }
688 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
689
690 static ssize_t
691 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
692 {
693 struct w83627hf_data *data = dev_get_drvdata(dev);
694 return sprintf(buf, "%ld\n", (long) data->vrm);
695 }
696 static ssize_t
697 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
698 {
699 struct w83627hf_data *data = dev_get_drvdata(dev);
700 u32 val;
701
702 val = simple_strtoul(buf, NULL, 10);
703 data->vrm = val;
704
705 return count;
706 }
707 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
708
709 static ssize_t
710 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
711 {
712 struct w83627hf_data *data = w83627hf_update_device(dev);
713 return sprintf(buf, "%ld\n", (long) data->alarms);
714 }
715 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
716
717 #define show_beep_reg(REG, reg) \
718 static ssize_t show_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
719 { \
720 struct w83627hf_data *data = w83627hf_update_device(dev); \
721 return sprintf(buf,"%ld\n", \
722 (long)BEEP_##REG##_FROM_REG(data->beep_##reg)); \
723 }
724 show_beep_reg(ENABLE, enable)
725 show_beep_reg(MASK, mask)
726
727 #define BEEP_ENABLE 0 /* Store beep_enable */
728 #define BEEP_MASK 1 /* Store beep_mask */
729
730 static ssize_t
731 store_beep_reg(struct device *dev, const char *buf, size_t count,
732 int update_mask)
733 {
734 struct w83627hf_data *data = dev_get_drvdata(dev);
735 u32 val, val2;
736
737 val = simple_strtoul(buf, NULL, 10);
738
739 mutex_lock(&data->update_lock);
740
741 if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
742 data->beep_mask = BEEP_MASK_TO_REG(val);
743 w83627hf_write_value(data, W83781D_REG_BEEP_INTS1,
744 data->beep_mask & 0xff);
745 w83627hf_write_value(data, W83781D_REG_BEEP_INTS3,
746 ((data->beep_mask) >> 16) & 0xff);
747 val2 = (data->beep_mask >> 8) & 0x7f;
748 } else { /* We are storing beep_enable */
749 val2 =
750 w83627hf_read_value(data, W83781D_REG_BEEP_INTS2) & 0x7f;
751 data->beep_enable = BEEP_ENABLE_TO_REG(val);
752 }
753
754 w83627hf_write_value(data, W83781D_REG_BEEP_INTS2,
755 val2 | data->beep_enable << 7);
756
757 mutex_unlock(&data->update_lock);
758 return count;
759 }
760
761 #define sysfs_beep(REG, reg) \
762 static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
763 { \
764 return show_beep_##reg(dev, attr, buf); \
765 } \
766 static ssize_t \
767 store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
768 { \
769 return store_beep_reg(dev, buf, count, BEEP_##REG); \
770 } \
771 static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, \
772 show_regs_beep_##reg, store_regs_beep_##reg);
773
774 sysfs_beep(ENABLE, enable);
775 sysfs_beep(MASK, mask);
776
777 static ssize_t
778 show_fan_div(struct device *dev, struct device_attribute *devattr, char *buf)
779 {
780 int nr = to_sensor_dev_attr(devattr)->index;
781 struct w83627hf_data *data = w83627hf_update_device(dev);
782 return sprintf(buf, "%ld\n",
783 (long) DIV_FROM_REG(data->fan_div[nr]));
784 }
785 /* Note: we save and restore the fan minimum here, because its value is
786 determined in part by the fan divisor. This follows the principle of
787 least surprise; the user doesn't expect the fan minimum to change just
788 because the divisor changed. */
789 static ssize_t
790 store_fan_div(struct device *dev, struct device_attribute *devattr,
791 const char *buf, size_t count)
792 {
793 int nr = to_sensor_dev_attr(devattr)->index;
794 struct w83627hf_data *data = dev_get_drvdata(dev);
795 unsigned long min;
796 u8 reg;
797 unsigned long val = simple_strtoul(buf, NULL, 10);
798
799 mutex_lock(&data->update_lock);
800
801 /* Save fan_min */
802 min = FAN_FROM_REG(data->fan_min[nr],
803 DIV_FROM_REG(data->fan_div[nr]));
804
805 data->fan_div[nr] = DIV_TO_REG(val);
806
807 reg = (w83627hf_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
808 & (nr==0 ? 0xcf : 0x3f))
809 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
810 w83627hf_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
811
812 reg = (w83627hf_read_value(data, W83781D_REG_VBAT)
813 & ~(1 << (5 + nr)))
814 | ((data->fan_div[nr] & 0x04) << (3 + nr));
815 w83627hf_write_value(data, W83781D_REG_VBAT, reg);
816
817 /* Restore fan_min */
818 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
819 w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr), data->fan_min[nr]);
820
821 mutex_unlock(&data->update_lock);
822 return count;
823 }
824
825 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO|S_IWUSR,
826 show_fan_div, store_fan_div, 0);
827 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO|S_IWUSR,
828 show_fan_div, store_fan_div, 1);
829 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO|S_IWUSR,
830 show_fan_div, store_fan_div, 2);
831
832 static ssize_t
833 show_pwm(struct device *dev, struct device_attribute *devattr, char *buf)
834 {
835 int nr = to_sensor_dev_attr(devattr)->index;
836 struct w83627hf_data *data = w83627hf_update_device(dev);
837 return sprintf(buf, "%ld\n", (long) data->pwm[nr]);
838 }
839
840 static ssize_t
841 store_pwm(struct device *dev, struct device_attribute *devattr,
842 const char *buf, size_t count)
843 {
844 int nr = to_sensor_dev_attr(devattr)->index;
845 struct w83627hf_data *data = dev_get_drvdata(dev);
846 u32 val = simple_strtoul(buf, NULL, 10);
847
848 mutex_lock(&data->update_lock);
849
850 if (data->type == w83627thf) {
851 /* bits 0-3 are reserved in 627THF */
852 data->pwm[nr] = PWM_TO_REG(val) & 0xf0;
853 w83627hf_write_value(data,
854 W836X7HF_REG_PWM(data->type, nr),
855 data->pwm[nr] |
856 (w83627hf_read_value(data,
857 W836X7HF_REG_PWM(data->type, nr)) & 0x0f));
858 } else {
859 data->pwm[nr] = PWM_TO_REG(val);
860 w83627hf_write_value(data,
861 W836X7HF_REG_PWM(data->type, nr),
862 data->pwm[nr]);
863 }
864
865 mutex_unlock(&data->update_lock);
866 return count;
867 }
868
869 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0);
870 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 1);
871 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 2);
872
873 static ssize_t
874 show_pwm_freq(struct device *dev, struct device_attribute *devattr, char *buf)
875 {
876 int nr = to_sensor_dev_attr(devattr)->index;
877 struct w83627hf_data *data = w83627hf_update_device(dev);
878 if (data->type == w83627hf)
879 return sprintf(buf, "%ld\n",
880 pwm_freq_from_reg_627hf(data->pwm_freq[nr]));
881 else
882 return sprintf(buf, "%ld\n",
883 pwm_freq_from_reg(data->pwm_freq[nr]));
884 }
885
886 static ssize_t
887 store_pwm_freq(struct device *dev, struct device_attribute *devattr,
888 const char *buf, size_t count)
889 {
890 int nr = to_sensor_dev_attr(devattr)->index;
891 struct w83627hf_data *data = dev_get_drvdata(dev);
892 static const u8 mask[]={0xF8, 0x8F};
893 u32 val;
894
895 val = simple_strtoul(buf, NULL, 10);
896
897 mutex_lock(&data->update_lock);
898
899 if (data->type == w83627hf) {
900 data->pwm_freq[nr] = pwm_freq_to_reg_627hf(val);
901 w83627hf_write_value(data, W83627HF_REG_PWM_FREQ,
902 (data->pwm_freq[nr] << (nr*4)) |
903 (w83627hf_read_value(data,
904 W83627HF_REG_PWM_FREQ) & mask[nr]));
905 } else {
906 data->pwm_freq[nr] = pwm_freq_to_reg(val);
907 w83627hf_write_value(data, W83637HF_REG_PWM_FREQ[nr],
908 data->pwm_freq[nr]);
909 }
910
911 mutex_unlock(&data->update_lock);
912 return count;
913 }
914
915 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO|S_IWUSR,
916 show_pwm_freq, store_pwm_freq, 0);
917 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO|S_IWUSR,
918 show_pwm_freq, store_pwm_freq, 1);
919 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO|S_IWUSR,
920 show_pwm_freq, store_pwm_freq, 2);
921
922 static ssize_t
923 show_temp_type(struct device *dev, struct device_attribute *devattr,
924 char *buf)
925 {
926 int nr = to_sensor_dev_attr(devattr)->index;
927 struct w83627hf_data *data = w83627hf_update_device(dev);
928 return sprintf(buf, "%ld\n", (long) data->sens[nr]);
929 }
930
931 static ssize_t
932 store_temp_type(struct device *dev, struct device_attribute *devattr,
933 const char *buf, size_t count)
934 {
935 int nr = to_sensor_dev_attr(devattr)->index;
936 struct w83627hf_data *data = dev_get_drvdata(dev);
937 u32 val, tmp;
938
939 val = simple_strtoul(buf, NULL, 10);
940
941 mutex_lock(&data->update_lock);
942
943 switch (val) {
944 case 1: /* PII/Celeron diode */
945 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
946 w83627hf_write_value(data, W83781D_REG_SCFG1,
947 tmp | BIT_SCFG1[nr]);
948 tmp = w83627hf_read_value(data, W83781D_REG_SCFG2);
949 w83627hf_write_value(data, W83781D_REG_SCFG2,
950 tmp | BIT_SCFG2[nr]);
951 data->sens[nr] = val;
952 break;
953 case 2: /* 3904 */
954 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
955 w83627hf_write_value(data, W83781D_REG_SCFG1,
956 tmp | BIT_SCFG1[nr]);
957 tmp = w83627hf_read_value(data, W83781D_REG_SCFG2);
958 w83627hf_write_value(data, W83781D_REG_SCFG2,
959 tmp & ~BIT_SCFG2[nr]);
960 data->sens[nr] = val;
961 break;
962 case W83781D_DEFAULT_BETA:
963 dev_warn(dev, "Sensor type %d is deprecated, please use 4 "
964 "instead\n", W83781D_DEFAULT_BETA);
965 /* fall through */
966 case 4: /* thermistor */
967 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
968 w83627hf_write_value(data, W83781D_REG_SCFG1,
969 tmp & ~BIT_SCFG1[nr]);
970 data->sens[nr] = val;
971 break;
972 default:
973 dev_err(dev,
974 "Invalid sensor type %ld; must be 1, 2, or 4\n",
975 (long) val);
976 break;
977 }
978
979 mutex_unlock(&data->update_lock);
980 return count;
981 }
982
983 #define sysfs_temp_type(offset) \
984 static SENSOR_DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
985 show_temp_type, store_temp_type, offset - 1);
986
987 sysfs_temp_type(1);
988 sysfs_temp_type(2);
989 sysfs_temp_type(3);
990
991 static ssize_t
992 show_name(struct device *dev, struct device_attribute *devattr, char *buf)
993 {
994 struct w83627hf_data *data = dev_get_drvdata(dev);
995
996 return sprintf(buf, "%s\n", data->name);
997 }
998 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
999
1000 static int __init w83627hf_find(int sioaddr, unsigned short *addr,
1001 struct w83627hf_sio_data *sio_data)
1002 {
1003 int err = -ENODEV;
1004 u16 val;
1005
1006 static const __initdata char *names[] = {
1007 "W83627HF",
1008 "W83627THF",
1009 "W83697HF",
1010 "W83637HF",
1011 "W83687THF",
1012 };
1013
1014 REG = sioaddr;
1015 VAL = sioaddr + 1;
1016
1017 superio_enter();
1018 val= superio_inb(DEVID);
1019 switch (val) {
1020 case W627_DEVID:
1021 sio_data->type = w83627hf;
1022 break;
1023 case W627THF_DEVID:
1024 sio_data->type = w83627thf;
1025 break;
1026 case W697_DEVID:
1027 sio_data->type = w83697hf;
1028 break;
1029 case W637_DEVID:
1030 sio_data->type = w83637hf;
1031 break;
1032 case W687THF_DEVID:
1033 sio_data->type = w83687thf;
1034 break;
1035 case 0xff: /* No device at all */
1036 goto exit;
1037 default:
1038 pr_debug(DRVNAME ": Unsupported chip (DEVID=0x%02x)\n", val);
1039 goto exit;
1040 }
1041
1042 superio_select(W83627HF_LD_HWM);
1043 force_addr &= WINB_ALIGNMENT;
1044 if (force_addr) {
1045 printk(KERN_WARNING DRVNAME ": Forcing address 0x%x\n",
1046 force_addr);
1047 superio_outb(WINB_BASE_REG, force_addr >> 8);
1048 superio_outb(WINB_BASE_REG + 1, force_addr & 0xff);
1049 }
1050 val = (superio_inb(WINB_BASE_REG) << 8) |
1051 superio_inb(WINB_BASE_REG + 1);
1052 *addr = val & WINB_ALIGNMENT;
1053 if (*addr == 0) {
1054 printk(KERN_WARNING DRVNAME ": Base address not set, "
1055 "skipping\n");
1056 goto exit;
1057 }
1058
1059 val = superio_inb(WINB_ACT_REG);
1060 if (!(val & 0x01)) {
1061 printk(KERN_WARNING DRVNAME ": Enabling HWM logical device\n");
1062 superio_outb(WINB_ACT_REG, val | 0x01);
1063 }
1064
1065 err = 0;
1066 pr_info(DRVNAME ": Found %s chip at %#x\n",
1067 names[sio_data->type], *addr);
1068
1069 exit:
1070 superio_exit();
1071 return err;
1072 }
1073
1074 #define VIN_UNIT_ATTRS(_X_) \
1075 &sensor_dev_attr_in##_X_##_input.dev_attr.attr, \
1076 &sensor_dev_attr_in##_X_##_min.dev_attr.attr, \
1077 &sensor_dev_attr_in##_X_##_max.dev_attr.attr
1078
1079 #define FAN_UNIT_ATTRS(_X_) \
1080 &sensor_dev_attr_fan##_X_##_input.dev_attr.attr, \
1081 &sensor_dev_attr_fan##_X_##_min.dev_attr.attr, \
1082 &sensor_dev_attr_fan##_X_##_div.dev_attr.attr
1083
1084 #define TEMP_UNIT_ATTRS(_X_) \
1085 &sensor_dev_attr_temp##_X_##_input.dev_attr.attr, \
1086 &sensor_dev_attr_temp##_X_##_max.dev_attr.attr, \
1087 &sensor_dev_attr_temp##_X_##_max_hyst.dev_attr.attr, \
1088 &sensor_dev_attr_temp##_X_##_type.dev_attr.attr
1089
1090 static struct attribute *w83627hf_attributes[] = {
1091 &dev_attr_in0_input.attr,
1092 &dev_attr_in0_min.attr,
1093 &dev_attr_in0_max.attr,
1094 VIN_UNIT_ATTRS(2),
1095 VIN_UNIT_ATTRS(3),
1096 VIN_UNIT_ATTRS(4),
1097 VIN_UNIT_ATTRS(7),
1098 VIN_UNIT_ATTRS(8),
1099
1100 FAN_UNIT_ATTRS(1),
1101 FAN_UNIT_ATTRS(2),
1102
1103 TEMP_UNIT_ATTRS(1),
1104 TEMP_UNIT_ATTRS(2),
1105
1106 &dev_attr_alarms.attr,
1107 &dev_attr_beep_enable.attr,
1108 &dev_attr_beep_mask.attr,
1109
1110 &sensor_dev_attr_pwm1.dev_attr.attr,
1111 &sensor_dev_attr_pwm2.dev_attr.attr,
1112 &dev_attr_name.attr,
1113 NULL
1114 };
1115
1116 static const struct attribute_group w83627hf_group = {
1117 .attrs = w83627hf_attributes,
1118 };
1119
1120 static struct attribute *w83627hf_attributes_opt[] = {
1121 VIN_UNIT_ATTRS(1),
1122 VIN_UNIT_ATTRS(5),
1123 VIN_UNIT_ATTRS(6),
1124
1125 FAN_UNIT_ATTRS(3),
1126 TEMP_UNIT_ATTRS(3),
1127 &sensor_dev_attr_pwm3.dev_attr.attr,
1128
1129 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
1130 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
1131 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
1132 NULL
1133 };
1134
1135 static const struct attribute_group w83627hf_group_opt = {
1136 .attrs = w83627hf_attributes_opt,
1137 };
1138
1139 static int __devinit w83627hf_probe(struct platform_device *pdev)
1140 {
1141 struct device *dev = &pdev->dev;
1142 struct w83627hf_sio_data *sio_data = dev->platform_data;
1143 struct w83627hf_data *data;
1144 struct resource *res;
1145 int err, i;
1146
1147 static const char *names[] = {
1148 "w83627hf",
1149 "w83627thf",
1150 "w83697hf",
1151 "w83637hf",
1152 "w83687thf",
1153 };
1154
1155 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1156 if (!request_region(res->start, WINB_REGION_SIZE, DRVNAME)) {
1157 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1158 (unsigned long)res->start,
1159 (unsigned long)(res->start + WINB_REGION_SIZE - 1));
1160 err = -EBUSY;
1161 goto ERROR0;
1162 }
1163
1164 if (!(data = kzalloc(sizeof(struct w83627hf_data), GFP_KERNEL))) {
1165 err = -ENOMEM;
1166 goto ERROR1;
1167 }
1168 data->addr = res->start;
1169 data->type = sio_data->type;
1170 data->name = names[sio_data->type];
1171 mutex_init(&data->lock);
1172 mutex_init(&data->update_lock);
1173 platform_set_drvdata(pdev, data);
1174
1175 /* Initialize the chip */
1176 w83627hf_init_device(pdev);
1177
1178 /* A few vars need to be filled upon startup */
1179 for (i = 0; i <= 2; i++)
1180 data->fan_min[i] = w83627hf_read_value(
1181 data, W83627HF_REG_FAN_MIN(i));
1182 w83627hf_update_fan_div(data);
1183
1184 /* Register common device attributes */
1185 if ((err = sysfs_create_group(&dev->kobj, &w83627hf_group)))
1186 goto ERROR3;
1187
1188 /* Register chip-specific device attributes */
1189 if (data->type == w83627hf || data->type == w83697hf)
1190 if ((err = device_create_file(dev,
1191 &sensor_dev_attr_in5_input.dev_attr))
1192 || (err = device_create_file(dev,
1193 &sensor_dev_attr_in5_min.dev_attr))
1194 || (err = device_create_file(dev,
1195 &sensor_dev_attr_in5_max.dev_attr))
1196 || (err = device_create_file(dev,
1197 &sensor_dev_attr_in6_input.dev_attr))
1198 || (err = device_create_file(dev,
1199 &sensor_dev_attr_in6_min.dev_attr))
1200 || (err = device_create_file(dev,
1201 &sensor_dev_attr_in6_max.dev_attr))
1202 || (err = device_create_file(dev,
1203 &sensor_dev_attr_pwm1_freq.dev_attr))
1204 || (err = device_create_file(dev,
1205 &sensor_dev_attr_pwm2_freq.dev_attr)))
1206 goto ERROR4;
1207
1208 if (data->type != w83697hf)
1209 if ((err = device_create_file(dev,
1210 &sensor_dev_attr_in1_input.dev_attr))
1211 || (err = device_create_file(dev,
1212 &sensor_dev_attr_in1_min.dev_attr))
1213 || (err = device_create_file(dev,
1214 &sensor_dev_attr_in1_max.dev_attr))
1215 || (err = device_create_file(dev,
1216 &sensor_dev_attr_fan3_input.dev_attr))
1217 || (err = device_create_file(dev,
1218 &sensor_dev_attr_fan3_min.dev_attr))
1219 || (err = device_create_file(dev,
1220 &sensor_dev_attr_fan3_div.dev_attr))
1221 || (err = device_create_file(dev,
1222 &sensor_dev_attr_temp3_input.dev_attr))
1223 || (err = device_create_file(dev,
1224 &sensor_dev_attr_temp3_max.dev_attr))
1225 || (err = device_create_file(dev,
1226 &sensor_dev_attr_temp3_max_hyst.dev_attr))
1227 || (err = device_create_file(dev,
1228 &sensor_dev_attr_temp3_type.dev_attr)))
1229 goto ERROR4;
1230
1231 if (data->type != w83697hf && data->vid != 0xff) {
1232 /* Convert VID to voltage based on VRM */
1233 data->vrm = vid_which_vrm();
1234
1235 if ((err = device_create_file(dev, &dev_attr_cpu0_vid))
1236 || (err = device_create_file(dev, &dev_attr_vrm)))
1237 goto ERROR4;
1238 }
1239
1240 if (data->type == w83627thf || data->type == w83637hf
1241 || data->type == w83687thf)
1242 if ((err = device_create_file(dev,
1243 &sensor_dev_attr_pwm3.dev_attr)))
1244 goto ERROR4;
1245
1246 if (data->type == w83637hf || data->type == w83687thf)
1247 if ((err = device_create_file(dev,
1248 &sensor_dev_attr_pwm1_freq.dev_attr))
1249 || (err = device_create_file(dev,
1250 &sensor_dev_attr_pwm2_freq.dev_attr))
1251 || (err = device_create_file(dev,
1252 &sensor_dev_attr_pwm3_freq.dev_attr)))
1253 goto ERROR4;
1254
1255 data->hwmon_dev = hwmon_device_register(dev);
1256 if (IS_ERR(data->hwmon_dev)) {
1257 err = PTR_ERR(data->hwmon_dev);
1258 goto ERROR4;
1259 }
1260
1261 return 0;
1262
1263 ERROR4:
1264 sysfs_remove_group(&dev->kobj, &w83627hf_group);
1265 sysfs_remove_group(&dev->kobj, &w83627hf_group_opt);
1266 ERROR3:
1267 platform_set_drvdata(pdev, NULL);
1268 kfree(data);
1269 ERROR1:
1270 release_region(res->start, WINB_REGION_SIZE);
1271 ERROR0:
1272 return err;
1273 }
1274
1275 static int __devexit w83627hf_remove(struct platform_device *pdev)
1276 {
1277 struct w83627hf_data *data = platform_get_drvdata(pdev);
1278 struct resource *res;
1279
1280 hwmon_device_unregister(data->hwmon_dev);
1281
1282 sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group);
1283 sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group_opt);
1284 platform_set_drvdata(pdev, NULL);
1285 kfree(data);
1286
1287 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1288 release_region(res->start, WINB_REGION_SIZE);
1289
1290 return 0;
1291 }
1292
1293
1294 /* Registers 0x50-0x5f are banked */
1295 static inline void w83627hf_set_bank(struct w83627hf_data *data, u16 reg)
1296 {
1297 if ((reg & 0x00f0) == 0x50) {
1298 outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET);
1299 outb_p(reg >> 8, data->addr + W83781D_DATA_REG_OFFSET);
1300 }
1301 }
1302
1303 /* Not strictly necessary, but play it safe for now */
1304 static inline void w83627hf_reset_bank(struct w83627hf_data *data, u16 reg)
1305 {
1306 if (reg & 0xff00) {
1307 outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET);
1308 outb_p(0, data->addr + W83781D_DATA_REG_OFFSET);
1309 }
1310 }
1311
1312 static int w83627hf_read_value(struct w83627hf_data *data, u16 reg)
1313 {
1314 int res, word_sized;
1315
1316 mutex_lock(&data->lock);
1317 word_sized = (((reg & 0xff00) == 0x100)
1318 || ((reg & 0xff00) == 0x200))
1319 && (((reg & 0x00ff) == 0x50)
1320 || ((reg & 0x00ff) == 0x53)
1321 || ((reg & 0x00ff) == 0x55));
1322 w83627hf_set_bank(data, reg);
1323 outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET);
1324 res = inb_p(data->addr + W83781D_DATA_REG_OFFSET);
1325 if (word_sized) {
1326 outb_p((reg & 0xff) + 1,
1327 data->addr + W83781D_ADDR_REG_OFFSET);
1328 res =
1329 (res << 8) + inb_p(data->addr +
1330 W83781D_DATA_REG_OFFSET);
1331 }
1332 w83627hf_reset_bank(data, reg);
1333 mutex_unlock(&data->lock);
1334 return res;
1335 }
1336
1337 static int __devinit w83627thf_read_gpio5(struct platform_device *pdev)
1338 {
1339 int res = 0xff, sel;
1340
1341 superio_enter();
1342 superio_select(W83627HF_LD_GPIO5);
1343
1344 /* Make sure these GPIO pins are enabled */
1345 if (!(superio_inb(W83627THF_GPIO5_EN) & (1<<3))) {
1346 dev_dbg(&pdev->dev, "GPIO5 disabled, no VID function\n");
1347 goto exit;
1348 }
1349
1350 /* Make sure the pins are configured for input
1351 There must be at least five (VRM 9), and possibly 6 (VRM 10) */
1352 sel = superio_inb(W83627THF_GPIO5_IOSR) & 0x3f;
1353 if ((sel & 0x1f) != 0x1f) {
1354 dev_dbg(&pdev->dev, "GPIO5 not configured for VID "
1355 "function\n");
1356 goto exit;
1357 }
1358
1359 dev_info(&pdev->dev, "Reading VID from GPIO5\n");
1360 res = superio_inb(W83627THF_GPIO5_DR) & sel;
1361
1362 exit:
1363 superio_exit();
1364 return res;
1365 }
1366
1367 static int __devinit w83687thf_read_vid(struct platform_device *pdev)
1368 {
1369 int res = 0xff;
1370
1371 superio_enter();
1372 superio_select(W83627HF_LD_HWM);
1373
1374 /* Make sure these GPIO pins are enabled */
1375 if (!(superio_inb(W83687THF_VID_EN) & (1 << 2))) {
1376 dev_dbg(&pdev->dev, "VID disabled, no VID function\n");
1377 goto exit;
1378 }
1379
1380 /* Make sure the pins are configured for input */
1381 if (!(superio_inb(W83687THF_VID_CFG) & (1 << 4))) {
1382 dev_dbg(&pdev->dev, "VID configured as output, "
1383 "no VID function\n");
1384 goto exit;
1385 }
1386
1387 res = superio_inb(W83687THF_VID_DATA) & 0x3f;
1388
1389 exit:
1390 superio_exit();
1391 return res;
1392 }
1393
1394 static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value)
1395 {
1396 int word_sized;
1397
1398 mutex_lock(&data->lock);
1399 word_sized = (((reg & 0xff00) == 0x100)
1400 || ((reg & 0xff00) == 0x200))
1401 && (((reg & 0x00ff) == 0x53)
1402 || ((reg & 0x00ff) == 0x55));
1403 w83627hf_set_bank(data, reg);
1404 outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET);
1405 if (word_sized) {
1406 outb_p(value >> 8,
1407 data->addr + W83781D_DATA_REG_OFFSET);
1408 outb_p((reg & 0xff) + 1,
1409 data->addr + W83781D_ADDR_REG_OFFSET);
1410 }
1411 outb_p(value & 0xff,
1412 data->addr + W83781D_DATA_REG_OFFSET);
1413 w83627hf_reset_bank(data, reg);
1414 mutex_unlock(&data->lock);
1415 return 0;
1416 }
1417
1418 static void __devinit w83627hf_init_device(struct platform_device *pdev)
1419 {
1420 struct w83627hf_data *data = platform_get_drvdata(pdev);
1421 int i;
1422 enum chips type = data->type;
1423 u8 tmp;
1424
1425 if (reset) {
1426 /* Resetting the chip has been the default for a long time,
1427 but repeatedly caused problems (fans going to full
1428 speed...) so it is now optional. It might even go away if
1429 nobody reports it as being useful, as I see very little
1430 reason why this would be needed at all. */
1431 dev_info(&pdev->dev, "If reset=1 solved a problem you were "
1432 "having, please report!\n");
1433
1434 /* save this register */
1435 i = w83627hf_read_value(data, W83781D_REG_BEEP_CONFIG);
1436 /* Reset all except Watchdog values and last conversion values
1437 This sets fan-divs to 2, among others */
1438 w83627hf_write_value(data, W83781D_REG_CONFIG, 0x80);
1439 /* Restore the register and disable power-on abnormal beep.
1440 This saves FAN 1/2/3 input/output values set by BIOS. */
1441 w83627hf_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
1442 /* Disable master beep-enable (reset turns it on).
1443 Individual beeps should be reset to off but for some reason
1444 disabling this bit helps some people not get beeped */
1445 w83627hf_write_value(data, W83781D_REG_BEEP_INTS2, 0);
1446 }
1447
1448 /* Minimize conflicts with other winbond i2c-only clients... */
1449 /* disable i2c subclients... how to disable main i2c client?? */
1450 /* force i2c address to relatively uncommon address */
1451 w83627hf_write_value(data, W83781D_REG_I2C_SUBADDR, 0x89);
1452 w83627hf_write_value(data, W83781D_REG_I2C_ADDR, force_i2c);
1453
1454 /* Read VID only once */
1455 if (type == w83627hf || type == w83637hf) {
1456 int lo = w83627hf_read_value(data, W83781D_REG_VID_FANDIV);
1457 int hi = w83627hf_read_value(data, W83781D_REG_CHIPID);
1458 data->vid = (lo & 0x0f) | ((hi & 0x01) << 4);
1459 } else if (type == w83627thf) {
1460 data->vid = w83627thf_read_gpio5(pdev);
1461 } else if (type == w83687thf) {
1462 data->vid = w83687thf_read_vid(pdev);
1463 }
1464
1465 /* Read VRM & OVT Config only once */
1466 if (type == w83627thf || type == w83637hf || type == w83687thf) {
1467 data->vrm_ovt =
1468 w83627hf_read_value(data, W83627THF_REG_VRM_OVT_CFG);
1469 }
1470
1471 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1472 for (i = 1; i <= 3; i++) {
1473 if (!(tmp & BIT_SCFG1[i - 1])) {
1474 data->sens[i - 1] = 4;
1475 } else {
1476 if (w83627hf_read_value
1477 (data,
1478 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1479 data->sens[i - 1] = 1;
1480 else
1481 data->sens[i - 1] = 2;
1482 }
1483 if ((type == w83697hf) && (i == 2))
1484 break;
1485 }
1486
1487 if(init) {
1488 /* Enable temp2 */
1489 tmp = w83627hf_read_value(data, W83627HF_REG_TEMP2_CONFIG);
1490 if (tmp & 0x01) {
1491 dev_warn(&pdev->dev, "Enabling temp2, readings "
1492 "might not make sense\n");
1493 w83627hf_write_value(data, W83627HF_REG_TEMP2_CONFIG,
1494 tmp & 0xfe);
1495 }
1496
1497 /* Enable temp3 */
1498 if (type != w83697hf) {
1499 tmp = w83627hf_read_value(data,
1500 W83627HF_REG_TEMP3_CONFIG);
1501 if (tmp & 0x01) {
1502 dev_warn(&pdev->dev, "Enabling temp3, "
1503 "readings might not make sense\n");
1504 w83627hf_write_value(data,
1505 W83627HF_REG_TEMP3_CONFIG, tmp & 0xfe);
1506 }
1507 }
1508 }
1509
1510 /* Start monitoring */
1511 w83627hf_write_value(data, W83781D_REG_CONFIG,
1512 (w83627hf_read_value(data,
1513 W83781D_REG_CONFIG) & 0xf7)
1514 | 0x01);
1515 }
1516
1517 static void w83627hf_update_fan_div(struct w83627hf_data *data)
1518 {
1519 int reg;
1520
1521 reg = w83627hf_read_value(data, W83781D_REG_VID_FANDIV);
1522 data->fan_div[0] = (reg >> 4) & 0x03;
1523 data->fan_div[1] = (reg >> 6) & 0x03;
1524 if (data->type != w83697hf) {
1525 data->fan_div[2] = (w83627hf_read_value(data,
1526 W83781D_REG_PIN) >> 6) & 0x03;
1527 }
1528 reg = w83627hf_read_value(data, W83781D_REG_VBAT);
1529 data->fan_div[0] |= (reg >> 3) & 0x04;
1530 data->fan_div[1] |= (reg >> 4) & 0x04;
1531 if (data->type != w83697hf)
1532 data->fan_div[2] |= (reg >> 5) & 0x04;
1533 }
1534
1535 static struct w83627hf_data *w83627hf_update_device(struct device *dev)
1536 {
1537 struct w83627hf_data *data = dev_get_drvdata(dev);
1538 int i, num_temps = (data->type == w83697hf) ? 2 : 3;
1539
1540 mutex_lock(&data->update_lock);
1541
1542 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1543 || !data->valid) {
1544 for (i = 0; i <= 8; i++) {
1545 /* skip missing sensors */
1546 if (((data->type == w83697hf) && (i == 1)) ||
1547 ((data->type != w83627hf && data->type != w83697hf)
1548 && (i == 5 || i == 6)))
1549 continue;
1550 data->in[i] =
1551 w83627hf_read_value(data, W83781D_REG_IN(i));
1552 data->in_min[i] =
1553 w83627hf_read_value(data,
1554 W83781D_REG_IN_MIN(i));
1555 data->in_max[i] =
1556 w83627hf_read_value(data,
1557 W83781D_REG_IN_MAX(i));
1558 }
1559 for (i = 0; i <= 2; i++) {
1560 data->fan[i] =
1561 w83627hf_read_value(data, W83627HF_REG_FAN(i));
1562 data->fan_min[i] =
1563 w83627hf_read_value(data,
1564 W83627HF_REG_FAN_MIN(i));
1565 }
1566 for (i = 0; i <= 2; i++) {
1567 u8 tmp = w83627hf_read_value(data,
1568 W836X7HF_REG_PWM(data->type, i));
1569 /* bits 0-3 are reserved in 627THF */
1570 if (data->type == w83627thf)
1571 tmp &= 0xf0;
1572 data->pwm[i] = tmp;
1573 if (i == 1 &&
1574 (data->type == w83627hf || data->type == w83697hf))
1575 break;
1576 }
1577 if (data->type == w83627hf) {
1578 u8 tmp = w83627hf_read_value(data,
1579 W83627HF_REG_PWM_FREQ);
1580 data->pwm_freq[0] = tmp & 0x07;
1581 data->pwm_freq[1] = (tmp >> 4) & 0x07;
1582 } else if (data->type != w83627thf) {
1583 for (i = 1; i <= 3; i++) {
1584 data->pwm_freq[i - 1] =
1585 w83627hf_read_value(data,
1586 W83637HF_REG_PWM_FREQ[i - 1]);
1587 if (i == 2 && (data->type == w83697hf))
1588 break;
1589 }
1590 }
1591 for (i = 0; i < num_temps; i++) {
1592 data->temp[i] = w83627hf_read_value(
1593 data, w83627hf_reg_temp[i]);
1594 data->temp_max[i] = w83627hf_read_value(
1595 data, w83627hf_reg_temp_over[i]);
1596 data->temp_max_hyst[i] = w83627hf_read_value(
1597 data, w83627hf_reg_temp_hyst[i]);
1598 }
1599
1600 w83627hf_update_fan_div(data);
1601
1602 data->alarms =
1603 w83627hf_read_value(data, W83781D_REG_ALARM1) |
1604 (w83627hf_read_value(data, W83781D_REG_ALARM2) << 8) |
1605 (w83627hf_read_value(data, W83781D_REG_ALARM3) << 16);
1606 i = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2);
1607 data->beep_enable = i >> 7;
1608 data->beep_mask = ((i & 0x7f) << 8) |
1609 w83627hf_read_value(data, W83781D_REG_BEEP_INTS1) |
1610 w83627hf_read_value(data, W83781D_REG_BEEP_INTS3) << 16;
1611 data->last_updated = jiffies;
1612 data->valid = 1;
1613 }
1614
1615 mutex_unlock(&data->update_lock);
1616
1617 return data;
1618 }
1619
1620 static int __init w83627hf_device_add(unsigned short address,
1621 const struct w83627hf_sio_data *sio_data)
1622 {
1623 struct resource res = {
1624 .start = address + WINB_REGION_OFFSET,
1625 .end = address + WINB_REGION_OFFSET + WINB_REGION_SIZE - 1,
1626 .name = DRVNAME,
1627 .flags = IORESOURCE_IO,
1628 };
1629 int err;
1630
1631 err = acpi_check_resource_conflict(&res);
1632 if (err)
1633 goto exit;
1634
1635 pdev = platform_device_alloc(DRVNAME, address);
1636 if (!pdev) {
1637 err = -ENOMEM;
1638 printk(KERN_ERR DRVNAME ": Device allocation failed\n");
1639 goto exit;
1640 }
1641
1642 err = platform_device_add_resources(pdev, &res, 1);
1643 if (err) {
1644 printk(KERN_ERR DRVNAME ": Device resource addition failed "
1645 "(%d)\n", err);
1646 goto exit_device_put;
1647 }
1648
1649 err = platform_device_add_data(pdev, sio_data,
1650 sizeof(struct w83627hf_sio_data));
1651 if (err) {
1652 printk(KERN_ERR DRVNAME ": Platform data allocation failed\n");
1653 goto exit_device_put;
1654 }
1655
1656 err = platform_device_add(pdev);
1657 if (err) {
1658 printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
1659 err);
1660 goto exit_device_put;
1661 }
1662
1663 return 0;
1664
1665 exit_device_put:
1666 platform_device_put(pdev);
1667 exit:
1668 return err;
1669 }
1670
1671 static int __init sensors_w83627hf_init(void)
1672 {
1673 int err;
1674 unsigned short address;
1675 struct w83627hf_sio_data sio_data;
1676
1677 if (w83627hf_find(0x2e, &address, &sio_data)
1678 && w83627hf_find(0x4e, &address, &sio_data))
1679 return -ENODEV;
1680
1681 err = platform_driver_register(&w83627hf_driver);
1682 if (err)
1683 goto exit;
1684
1685 /* Sets global pdev as a side effect */
1686 err = w83627hf_device_add(address, &sio_data);
1687 if (err)
1688 goto exit_driver;
1689
1690 return 0;
1691
1692 exit_driver:
1693 platform_driver_unregister(&w83627hf_driver);
1694 exit:
1695 return err;
1696 }
1697
1698 static void __exit sensors_w83627hf_exit(void)
1699 {
1700 platform_device_unregister(pdev);
1701 platform_driver_unregister(&w83627hf_driver);
1702 }
1703
1704 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1705 "Philip Edelbrock <phil@netroedge.com>, "
1706 "and Mark Studebaker <mdsxyz123@yahoo.com>");
1707 MODULE_DESCRIPTION("W83627HF driver");
1708 MODULE_LICENSE("GPL");
1709
1710 module_init(sensors_w83627hf_init);
1711 module_exit(sensors_w83627hf_exit);
Linux -mm trees (mirror)