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cris: add arch/cris/include/asm/serial.h
[linux-2.6/next.git] / drivers / net / bnx2x / bnx2x_dcb.c
bloba1e004a82f7ae92ae8250684352132892a4ced02
1 /* bnx2x_dcb.c: Broadcom Everest network driver.
2 *
3 * Copyright 2009-2011 Broadcom Corporation
4 *
5 * Unless you and Broadcom execute a separate written software license
6 * agreement governing use of this software, this software is licensed to you
7 * under the terms of the GNU General Public License version 2, available
8 * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
9 *
10 * Notwithstanding the above, under no circumstances may you combine this
11 * software in any way with any other Broadcom software provided under a
12 * license other than the GPL, without Broadcom's express prior written
13 * consent.
14 *
15 * Maintained by: Eilon Greenstein <eilong@broadcom.com>
16 * Written by: Dmitry Kravkov
17 *
18 */
19 #include <linux/netdevice.h>
20 #include <linux/types.h>
21 #include <linux/errno.h>
22 #include <linux/rtnetlink.h>
23 #include <net/dcbnl.h>
24
25 #include "bnx2x.h"
26 #include "bnx2x_cmn.h"
27 #include "bnx2x_dcb.h"
28
29 /* forward declarations of dcbx related functions */
30 static int bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp);
31 static void bnx2x_pfc_set_pfc(struct bnx2x *bp);
32 static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp);
33 static int bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp);
34 static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp,
35 u32 *set_configuration_ets_pg,
36 u32 *pri_pg_tbl);
37 static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp,
38 u32 *pg_pri_orginal_spread,
39 struct pg_help_data *help_data);
40 static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp,
41 struct pg_help_data *help_data,
42 struct dcbx_ets_feature *ets,
43 u32 *pg_pri_orginal_spread);
44 static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp,
45 struct cos_help_data *cos_data,
46 u32 *pg_pri_orginal_spread,
47 struct dcbx_ets_feature *ets);
48 static void bnx2x_dcbx_fw_struct(struct bnx2x *bp,
49 struct bnx2x_func_tx_start_params*);
50
51 /* helpers: read/write len bytes from addr into buff by REG_RD/REG_WR */
52 static void bnx2x_read_data(struct bnx2x *bp, u32 *buff,
53 u32 addr, u32 len)
54 {
55 int i;
56 for (i = 0; i < len; i += 4, buff++)
57 *buff = REG_RD(bp, addr + i);
58 }
59
60 static void bnx2x_write_data(struct bnx2x *bp, u32 *buff,
61 u32 addr, u32 len)
62 {
63 int i;
64 for (i = 0; i < len; i += 4, buff++)
65 REG_WR(bp, addr + i, *buff);
66 }
67
68 static void bnx2x_pfc_set(struct bnx2x *bp)
69 {
70 struct bnx2x_nig_brb_pfc_port_params pfc_params = {0};
71 u32 pri_bit, val = 0;
72 int i;
73
74 pfc_params.num_of_rx_cos_priority_mask =
75 bp->dcbx_port_params.ets.num_of_cos;
76
77 /* Tx COS configuration */
78 for (i = 0; i < bp->dcbx_port_params.ets.num_of_cos; i++)
79 /*
80 * We configure only the pauseable bits (non pauseable aren't
81 * configured at all) it's done to avoid false pauses from
82 * network
83 */
84 pfc_params.rx_cos_priority_mask[i] =
85 bp->dcbx_port_params.ets.cos_params[i].pri_bitmask
86 & DCBX_PFC_PRI_PAUSE_MASK(bp);
87
88 /*
89 * Rx COS configuration
90 * Changing PFC RX configuration .
91 * In RX COS0 will always be configured to lossy and COS1 to lossless
92 */
93 for (i = 0 ; i < MAX_PFC_PRIORITIES ; i++) {
94 pri_bit = 1 << i;
95
96 if (pri_bit & DCBX_PFC_PRI_PAUSE_MASK(bp))
97 val |= 1 << (i * 4);
98 }
99
100 pfc_params.pkt_priority_to_cos = val;
101
102 /* RX COS0 */
103 pfc_params.llfc_low_priority_classes = 0;
104 /* RX COS1 */
105 pfc_params.llfc_high_priority_classes = DCBX_PFC_PRI_PAUSE_MASK(bp);
106
107 /* BRB configuration */
108 pfc_params.cos0_pauseable = false;
109 pfc_params.cos1_pauseable = true;
110
111 bnx2x_acquire_phy_lock(bp);
112 bp->link_params.feature_config_flags |= FEATURE_CONFIG_PFC_ENABLED;
113 bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &pfc_params);
114 bnx2x_release_phy_lock(bp);
115 }
116
117 static void bnx2x_pfc_clear(struct bnx2x *bp)
118 {
119 struct bnx2x_nig_brb_pfc_port_params nig_params = {0};
120 nig_params.pause_enable = 1;
121 #ifdef BNX2X_SAFC
122 if (bp->flags & SAFC_TX_FLAG) {
123 u32 high = 0, low = 0;
124 int i;
125
126 for (i = 0; i < BNX2X_MAX_PRIORITY; i++) {
127 if (bp->pri_map[i] == 1)
128 high |= (1 << i);
129 if (bp->pri_map[i] == 0)
130 low |= (1 << i);
131 }
132
133 nig_params.llfc_low_priority_classes = high;
134 nig_params.llfc_low_priority_classes = low;
135
136 nig_params.pause_enable = 0;
137 nig_params.llfc_enable = 1;
138 nig_params.llfc_out_en = 1;
139 }
140 #endif /* BNX2X_SAFC */
141 bnx2x_acquire_phy_lock(bp);
142 bp->link_params.feature_config_flags &= ~FEATURE_CONFIG_PFC_ENABLED;
143 bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &nig_params);
144 bnx2x_release_phy_lock(bp);
145 }
146
147 static void bnx2x_dump_dcbx_drv_param(struct bnx2x *bp,
148 struct dcbx_features *features,
149 u32 error)
150 {
151 u8 i = 0;
152 DP(NETIF_MSG_LINK, "local_mib.error %x\n", error);
153
154 /* PG */
155 DP(NETIF_MSG_LINK,
156 "local_mib.features.ets.enabled %x\n", features->ets.enabled);
157 for (i = 0; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++)
158 DP(NETIF_MSG_LINK,
159 "local_mib.features.ets.pg_bw_tbl[%d] %d\n", i,
160 DCBX_PG_BW_GET(features->ets.pg_bw_tbl, i));
161 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++)
162 DP(NETIF_MSG_LINK,
163 "local_mib.features.ets.pri_pg_tbl[%d] %d\n", i,
164 DCBX_PRI_PG_GET(features->ets.pri_pg_tbl, i));
165
166 /* pfc */
167 DP(NETIF_MSG_LINK, "dcbx_features.pfc.pri_en_bitmap %x\n",
168 features->pfc.pri_en_bitmap);
169 DP(NETIF_MSG_LINK, "dcbx_features.pfc.pfc_caps %x\n",
170 features->pfc.pfc_caps);
171 DP(NETIF_MSG_LINK, "dcbx_features.pfc.enabled %x\n",
172 features->pfc.enabled);
173
174 DP(NETIF_MSG_LINK, "dcbx_features.app.default_pri %x\n",
175 features->app.default_pri);
176 DP(NETIF_MSG_LINK, "dcbx_features.app.tc_supported %x\n",
177 features->app.tc_supported);
178 DP(NETIF_MSG_LINK, "dcbx_features.app.enabled %x\n",
179 features->app.enabled);
180 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
181 DP(NETIF_MSG_LINK,
182 "dcbx_features.app.app_pri_tbl[%x].app_id %x\n",
183 i, features->app.app_pri_tbl[i].app_id);
184 DP(NETIF_MSG_LINK,
185 "dcbx_features.app.app_pri_tbl[%x].pri_bitmap %x\n",
186 i, features->app.app_pri_tbl[i].pri_bitmap);
187 DP(NETIF_MSG_LINK,
188 "dcbx_features.app.app_pri_tbl[%x].appBitfield %x\n",
189 i, features->app.app_pri_tbl[i].appBitfield);
190 }
191 }
192
193 static void bnx2x_dcbx_get_ap_priority(struct bnx2x *bp,
194 u8 pri_bitmap,
195 u8 llfc_traf_type)
196 {
197 u32 pri = MAX_PFC_PRIORITIES;
198 u32 index = MAX_PFC_PRIORITIES - 1;
199 u32 pri_mask;
200 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
201
202 /* Choose the highest priority */
203 while ((MAX_PFC_PRIORITIES == pri) && (0 != index)) {
204 pri_mask = 1 << index;
205 if (GET_FLAGS(pri_bitmap, pri_mask))
206 pri = index ;
207 index--;
208 }
209
210 if (pri < MAX_PFC_PRIORITIES)
211 ttp[llfc_traf_type] = max_t(u32, ttp[llfc_traf_type], pri);
212 }
213
214 static void bnx2x_dcbx_get_ap_feature(struct bnx2x *bp,
215 struct dcbx_app_priority_feature *app,
216 u32 error) {
217 u8 index;
218 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
219
220 if (GET_FLAGS(error, DCBX_LOCAL_APP_ERROR))
221 DP(NETIF_MSG_LINK, "DCBX_LOCAL_APP_ERROR\n");
222
223 if (GET_FLAGS(error, DCBX_LOCAL_APP_MISMATCH))
224 DP(NETIF_MSG_LINK, "DCBX_LOCAL_APP_MISMATCH\n");
225
226 if (app->enabled &&
227 !GET_FLAGS(error, DCBX_LOCAL_APP_ERROR | DCBX_LOCAL_APP_MISMATCH)) {
228
229 bp->dcbx_port_params.app.enabled = true;
230
231 for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++)
232 ttp[index] = 0;
233
234 if (app->default_pri < MAX_PFC_PRIORITIES)
235 ttp[LLFC_TRAFFIC_TYPE_NW] = app->default_pri;
236
237 for (index = 0 ; index < DCBX_MAX_APP_PROTOCOL; index++) {
238 struct dcbx_app_priority_entry *entry =
239 app->app_pri_tbl;
240
241 if (GET_FLAGS(entry[index].appBitfield,
242 DCBX_APP_SF_ETH_TYPE) &&
243 ETH_TYPE_FCOE == entry[index].app_id)
244 bnx2x_dcbx_get_ap_priority(bp,
245 entry[index].pri_bitmap,
246 LLFC_TRAFFIC_TYPE_FCOE);
247
248 if (GET_FLAGS(entry[index].appBitfield,
249 DCBX_APP_SF_PORT) &&
250 TCP_PORT_ISCSI == entry[index].app_id)
251 bnx2x_dcbx_get_ap_priority(bp,
252 entry[index].pri_bitmap,
253 LLFC_TRAFFIC_TYPE_ISCSI);
254 }
255 } else {
256 DP(NETIF_MSG_LINK, "DCBX_LOCAL_APP_DISABLED\n");
257 bp->dcbx_port_params.app.enabled = false;
258 for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++)
259 ttp[index] = INVALID_TRAFFIC_TYPE_PRIORITY;
260 }
261 }
262
263 static void bnx2x_dcbx_get_ets_feature(struct bnx2x *bp,
264 struct dcbx_ets_feature *ets,
265 u32 error) {
266 int i = 0;
267 u32 pg_pri_orginal_spread[DCBX_MAX_NUM_PG_BW_ENTRIES] = {0};
268 struct pg_help_data pg_help_data;
269 struct bnx2x_dcbx_cos_params *cos_params =
270 bp->dcbx_port_params.ets.cos_params;
271
272 memset(&pg_help_data, 0, sizeof(struct pg_help_data));
273
274
275 if (GET_FLAGS(error, DCBX_LOCAL_ETS_ERROR))
276 DP(NETIF_MSG_LINK, "DCBX_LOCAL_ETS_ERROR\n");
277
278
279 /* Clean up old settings of ets on COS */
280 for (i = 0; i < ARRAY_SIZE(bp->dcbx_port_params.ets.cos_params) ; i++) {
281 cos_params[i].pauseable = false;
282 cos_params[i].strict = BNX2X_DCBX_STRICT_INVALID;
283 cos_params[i].bw_tbl = DCBX_INVALID_COS_BW;
284 cos_params[i].pri_bitmask = 0;
285 }
286
287 if (bp->dcbx_port_params.app.enabled &&
288 !GET_FLAGS(error, DCBX_LOCAL_ETS_ERROR) &&
289 ets->enabled) {
290 DP(NETIF_MSG_LINK, "DCBX_LOCAL_ETS_ENABLE\n");
291 bp->dcbx_port_params.ets.enabled = true;
292
293 bnx2x_dcbx_get_ets_pri_pg_tbl(bp,
294 pg_pri_orginal_spread,
295 ets->pri_pg_tbl);
296
297 bnx2x_dcbx_get_num_pg_traf_type(bp,
298 pg_pri_orginal_spread,
299 &pg_help_data);
300
301 bnx2x_dcbx_fill_cos_params(bp, &pg_help_data,
302 ets, pg_pri_orginal_spread);
303
304 } else {
305 DP(NETIF_MSG_LINK, "DCBX_LOCAL_ETS_DISABLED\n");
306 bp->dcbx_port_params.ets.enabled = false;
307 ets->pri_pg_tbl[0] = 0;
308
309 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES ; i++)
310 DCBX_PG_BW_SET(ets->pg_bw_tbl, i, 1);
311 }
312 }
313
314 static void bnx2x_dcbx_get_pfc_feature(struct bnx2x *bp,
315 struct dcbx_pfc_feature *pfc, u32 error)
316 {
317
318 if (GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR))
319 DP(NETIF_MSG_LINK, "DCBX_LOCAL_PFC_ERROR\n");
320
321 if (bp->dcbx_port_params.app.enabled &&
322 !GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR | DCBX_LOCAL_PFC_MISMATCH) &&
323 pfc->enabled) {
324 bp->dcbx_port_params.pfc.enabled = true;
325 bp->dcbx_port_params.pfc.priority_non_pauseable_mask =
326 ~(pfc->pri_en_bitmap);
327 } else {
328 DP(NETIF_MSG_LINK, "DCBX_LOCAL_PFC_DISABLED\n");
329 bp->dcbx_port_params.pfc.enabled = false;
330 bp->dcbx_port_params.pfc.priority_non_pauseable_mask = 0;
331 }
332 }
333
334 /* maps unmapped priorities to to the same COS as L2 */
335 static void bnx2x_dcbx_map_nw(struct bnx2x *bp)
336 {
337 int i;
338 u32 unmapped = (1 << MAX_PFC_PRIORITIES) - 1; /* all ones */
339 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
340 u32 nw_prio = 1 << ttp[LLFC_TRAFFIC_TYPE_NW];
341 struct bnx2x_dcbx_cos_params *cos_params =
342 bp->dcbx_port_params.ets.cos_params;
343
344 /* get unmapped priorities by clearing mapped bits */
345 for (i = 0; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++)
346 unmapped &= ~(1 << ttp[i]);
347
348 /* find cos for nw prio and extend it with unmapped */
349 for (i = 0; i < ARRAY_SIZE(bp->dcbx_port_params.ets.cos_params); i++) {
350 if (cos_params[i].pri_bitmask & nw_prio) {
351 /* extend the bitmask with unmapped */
352 DP(NETIF_MSG_LINK,
353 "cos %d extended with 0x%08x", i, unmapped);
354 cos_params[i].pri_bitmask |= unmapped;
355 break;
356 }
357 }
358 }
359
360 static void bnx2x_get_dcbx_drv_param(struct bnx2x *bp,
361 struct dcbx_features *features,
362 u32 error)
363 {
364 bnx2x_dcbx_get_ap_feature(bp, &features->app, error);
365
366 bnx2x_dcbx_get_pfc_feature(bp, &features->pfc, error);
367
368 bnx2x_dcbx_get_ets_feature(bp, &features->ets, error);
369
370 bnx2x_dcbx_map_nw(bp);
371 }
372
373 #define DCBX_LOCAL_MIB_MAX_TRY_READ (100)
374 static int bnx2x_dcbx_read_mib(struct bnx2x *bp,
375 u32 *base_mib_addr,
376 u32 offset,
377 int read_mib_type)
378 {
379 int max_try_read = 0;
380 u32 mib_size, prefix_seq_num, suffix_seq_num;
381 struct lldp_remote_mib *remote_mib ;
382 struct lldp_local_mib *local_mib;
383
384
385 switch (read_mib_type) {
386 case DCBX_READ_LOCAL_MIB:
387 mib_size = sizeof(struct lldp_local_mib);
388 break;
389 case DCBX_READ_REMOTE_MIB:
390 mib_size = sizeof(struct lldp_remote_mib);
391 break;
392 default:
393 return 1; /*error*/
394 }
395
396 offset += BP_PORT(bp) * mib_size;
397
398 do {
399 bnx2x_read_data(bp, base_mib_addr, offset, mib_size);
400
401 max_try_read++;
402
403 switch (read_mib_type) {
404 case DCBX_READ_LOCAL_MIB:
405 local_mib = (struct lldp_local_mib *) base_mib_addr;
406 prefix_seq_num = local_mib->prefix_seq_num;
407 suffix_seq_num = local_mib->suffix_seq_num;
408 break;
409 case DCBX_READ_REMOTE_MIB:
410 remote_mib = (struct lldp_remote_mib *) base_mib_addr;
411 prefix_seq_num = remote_mib->prefix_seq_num;
412 suffix_seq_num = remote_mib->suffix_seq_num;
413 break;
414 default:
415 return 1; /*error*/
416 }
417 } while ((prefix_seq_num != suffix_seq_num) &&
418 (max_try_read < DCBX_LOCAL_MIB_MAX_TRY_READ));
419
420 if (max_try_read >= DCBX_LOCAL_MIB_MAX_TRY_READ) {
421 BNX2X_ERR("MIB could not be read\n");
422 return 1;
423 }
424
425 return 0;
426 }
427
428 static void bnx2x_pfc_set_pfc(struct bnx2x *bp)
429 {
430 if (bp->dcbx_port_params.pfc.enabled &&
431 !(bp->dcbx_error & DCBX_REMOTE_MIB_ERROR))
432 /*
433 * 1. Fills up common PFC structures if required
434 * 2. Configure NIG, MAC and BRB via the elink
435 */
436 bnx2x_pfc_set(bp);
437 else
438 bnx2x_pfc_clear(bp);
439 }
440
441 static int bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp)
442 {
443 struct bnx2x_func_state_params func_params = {0};
444
445 func_params.f_obj = &bp->func_obj;
446 func_params.cmd = BNX2X_F_CMD_TX_STOP;
447
448 DP(NETIF_MSG_LINK, "STOP TRAFFIC\n");
449 return bnx2x_func_state_change(bp, &func_params);
450 }
451
452 static int bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp)
453 {
454 struct bnx2x_func_state_params func_params = {0};
455 struct bnx2x_func_tx_start_params *tx_params =
456 &func_params.params.tx_start;
457
458 func_params.f_obj = &bp->func_obj;
459 func_params.cmd = BNX2X_F_CMD_TX_START;
460
461 bnx2x_dcbx_fw_struct(bp, tx_params);
462
463 DP(NETIF_MSG_LINK, "START TRAFFIC\n");
464 return bnx2x_func_state_change(bp, &func_params);
465 }
466
467 static void bnx2x_dcbx_2cos_limit_update_ets_config(struct bnx2x *bp)
468 {
469 struct bnx2x_dcbx_pg_params *ets = &(bp->dcbx_port_params.ets);
470 int rc = 0;
471
472 if (ets->num_of_cos == 0 || ets->num_of_cos > DCBX_COS_MAX_NUM_E2) {
473 BNX2X_ERR("Illegal number of COSes %d\n", ets->num_of_cos);
474 return;
475 }
476
477 /* valid COS entries */
478 if (ets->num_of_cos == 1) /* no ETS */
479 return;
480
481 /* sanity */
482 if (((BNX2X_DCBX_STRICT_INVALID == ets->cos_params[0].strict) &&
483 (DCBX_INVALID_COS_BW == ets->cos_params[0].bw_tbl)) ||
484 ((BNX2X_DCBX_STRICT_INVALID == ets->cos_params[1].strict) &&
485 (DCBX_INVALID_COS_BW == ets->cos_params[1].bw_tbl))) {
486 BNX2X_ERR("all COS should have at least bw_limit or strict"
487 "ets->cos_params[0].strict= %x"
488 "ets->cos_params[0].bw_tbl= %x"
489 "ets->cos_params[1].strict= %x"
490 "ets->cos_params[1].bw_tbl= %x",
491 ets->cos_params[0].strict,
492 ets->cos_params[0].bw_tbl,
493 ets->cos_params[1].strict,
494 ets->cos_params[1].bw_tbl);
495 return;
496 }
497 /* If we join a group and there is bw_tbl and strict then bw rules */
498 if ((DCBX_INVALID_COS_BW != ets->cos_params[0].bw_tbl) &&
499 (DCBX_INVALID_COS_BW != ets->cos_params[1].bw_tbl)) {
500 u32 bw_tbl_0 = ets->cos_params[0].bw_tbl;
501 u32 bw_tbl_1 = ets->cos_params[1].bw_tbl;
502 /* Do not allow 0-100 configuration
503 * since PBF does not support it
504 * force 1-99 instead
505 */
506 if (bw_tbl_0 == 0) {
507 bw_tbl_0 = 1;
508 bw_tbl_1 = 99;
509 } else if (bw_tbl_1 == 0) {
510 bw_tbl_1 = 1;
511 bw_tbl_0 = 99;
512 }
513
514 bnx2x_ets_bw_limit(&bp->link_params, bw_tbl_0, bw_tbl_1);
515 } else {
516 if (ets->cos_params[0].strict == BNX2X_DCBX_STRICT_COS_HIGHEST)
517 rc = bnx2x_ets_strict(&bp->link_params, 0);
518 else if (ets->cos_params[1].strict
519 == BNX2X_DCBX_STRICT_COS_HIGHEST)
520 rc = bnx2x_ets_strict(&bp->link_params, 1);
521 if (rc)
522 BNX2X_ERR("update_ets_params failed\n");
523 }
524 }
525
526 /*
527 * In E3B0 the configuration may have more than 2 COS.
528 */
529 void bnx2x_dcbx_update_ets_config(struct bnx2x *bp)
530 {
531 struct bnx2x_dcbx_pg_params *ets = &(bp->dcbx_port_params.ets);
532 struct bnx2x_ets_params ets_params = { 0 };
533 u8 i;
534
535 ets_params.num_of_cos = ets->num_of_cos;
536
537 for (i = 0; i < ets->num_of_cos; i++) {
538 /* COS is SP */
539 if (ets->cos_params[i].strict != BNX2X_DCBX_STRICT_INVALID) {
540 if (ets->cos_params[i].bw_tbl != DCBX_INVALID_COS_BW) {
541 BNX2X_ERR("COS can't be not BW and not SP\n");
542 return;
543 }
544
545 ets_params.cos[i].state = bnx2x_cos_state_strict;
546 ets_params.cos[i].params.sp_params.pri =
547 ets->cos_params[i].strict;
548 } else { /* COS is BW */
549 if (ets->cos_params[i].bw_tbl == DCBX_INVALID_COS_BW) {
550 BNX2X_ERR("COS can't be not BW and not SP\n");
551 return;
552 }
553 ets_params.cos[i].state = bnx2x_cos_state_bw;
554 ets_params.cos[i].params.bw_params.bw =
555 (u8)ets->cos_params[i].bw_tbl;
556 }
557 }
558
559 /* Configure the ETS in HW */
560 if (bnx2x_ets_e3b0_config(&bp->link_params, &bp->link_vars,
561 &ets_params)) {
562 BNX2X_ERR("bnx2x_ets_e3b0_config failed\n");
563 bnx2x_ets_disabled(&bp->link_params, &bp->link_vars);
564 }
565 }
566
567 static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp)
568 {
569 bnx2x_ets_disabled(&bp->link_params, &bp->link_vars);
570
571 if (!bp->dcbx_port_params.ets.enabled ||
572 (bp->dcbx_error & DCBX_REMOTE_MIB_ERROR))
573 return;
574
575 if (CHIP_IS_E3B0(bp))
576 bnx2x_dcbx_update_ets_config(bp);
577 else
578 bnx2x_dcbx_2cos_limit_update_ets_config(bp);
579 }
580
581 #ifdef BCM_DCBNL
582 static int bnx2x_dcbx_read_shmem_remote_mib(struct bnx2x *bp)
583 {
584 struct lldp_remote_mib remote_mib = {0};
585 u32 dcbx_remote_mib_offset = SHMEM2_RD(bp, dcbx_remote_mib_offset);
586 int rc;
587
588 DP(NETIF_MSG_LINK, "dcbx_remote_mib_offset 0x%x\n",
589 dcbx_remote_mib_offset);
590
591 if (SHMEM_DCBX_REMOTE_MIB_NONE == dcbx_remote_mib_offset) {
592 BNX2X_ERR("FW doesn't support dcbx_remote_mib_offset\n");
593 return -EINVAL;
594 }
595
596 rc = bnx2x_dcbx_read_mib(bp, (u32 *)&remote_mib, dcbx_remote_mib_offset,
597 DCBX_READ_REMOTE_MIB);
598
599 if (rc) {
600 BNX2X_ERR("Faild to read remote mib from FW\n");
601 return rc;
602 }
603
604 /* save features and flags */
605 bp->dcbx_remote_feat = remote_mib.features;
606 bp->dcbx_remote_flags = remote_mib.flags;
607 return 0;
608 }
609 #endif
610
611 static int bnx2x_dcbx_read_shmem_neg_results(struct bnx2x *bp)
612 {
613 struct lldp_local_mib local_mib = {0};
614 u32 dcbx_neg_res_offset = SHMEM2_RD(bp, dcbx_neg_res_offset);
615 int rc;
616
617 DP(NETIF_MSG_LINK, "dcbx_neg_res_offset 0x%x\n", dcbx_neg_res_offset);
618
619 if (SHMEM_DCBX_NEG_RES_NONE == dcbx_neg_res_offset) {
620 BNX2X_ERR("FW doesn't support dcbx_neg_res_offset\n");
621 return -EINVAL;
622 }
623
624 rc = bnx2x_dcbx_read_mib(bp, (u32 *)&local_mib, dcbx_neg_res_offset,
625 DCBX_READ_LOCAL_MIB);
626
627 if (rc) {
628 BNX2X_ERR("Faild to read local mib from FW\n");
629 return rc;
630 }
631
632 /* save features and error */
633 bp->dcbx_local_feat = local_mib.features;
634 bp->dcbx_error = local_mib.error;
635 return 0;
636 }
637
638
639 #ifdef BCM_DCBNL
640 static inline
641 u8 bnx2x_dcbx_dcbnl_app_up(struct dcbx_app_priority_entry *ent)
642 {
643 u8 pri;
644
645 /* Choose the highest priority */
646 for (pri = MAX_PFC_PRIORITIES - 1; pri > 0; pri--)
647 if (ent->pri_bitmap & (1 << pri))
648 break;
649 return pri;
650 }
651
652 static inline
653 u8 bnx2x_dcbx_dcbnl_app_idtype(struct dcbx_app_priority_entry *ent)
654 {
655 return ((ent->appBitfield & DCBX_APP_ENTRY_SF_MASK) ==
656 DCBX_APP_SF_PORT) ? DCB_APP_IDTYPE_PORTNUM :
657 DCB_APP_IDTYPE_ETHTYPE;
658 }
659
660 int bnx2x_dcbnl_update_applist(struct bnx2x *bp, bool delall)
661 {
662 int i, err = 0;
663
664 for (i = 0; i < DCBX_MAX_APP_PROTOCOL && err == 0; i++) {
665 struct dcbx_app_priority_entry *ent =
666 &bp->dcbx_local_feat.app.app_pri_tbl[i];
667
668 if (ent->appBitfield & DCBX_APP_ENTRY_VALID) {
669 u8 up = bnx2x_dcbx_dcbnl_app_up(ent);
670
671 /* avoid invalid user-priority */
672 if (up) {
673 struct dcb_app app;
674 app.selector = bnx2x_dcbx_dcbnl_app_idtype(ent);
675 app.protocol = ent->app_id;
676 app.priority = delall ? 0 : up;
677 err = dcb_setapp(bp->dev, &app);
678 }
679 }
680 }
681 return err;
682 }
683 #endif
684
685 static inline void bnx2x_update_drv_flags(struct bnx2x *bp, u32 flags, u32 set)
686 {
687 if (SHMEM2_HAS(bp, drv_flags)) {
688 u32 drv_flags;
689 bnx2x_acquire_hw_lock(bp, HW_LOCK_DRV_FLAGS);
690 drv_flags = SHMEM2_RD(bp, drv_flags);
691
692 if (set)
693 SET_FLAGS(drv_flags, flags);
694 else
695 RESET_FLAGS(drv_flags, flags);
696
697 SHMEM2_WR(bp, drv_flags, drv_flags);
698 DP(NETIF_MSG_HW, "drv_flags 0x%08x\n", drv_flags);
699 bnx2x_release_hw_lock(bp, HW_LOCK_DRV_FLAGS);
700 }
701 }
702
703 static inline void bnx2x_dcbx_update_tc_mapping(struct bnx2x *bp)
704 {
705 u8 prio, cos;
706 for (cos = 0; cos < bp->dcbx_port_params.ets.num_of_cos; cos++) {
707 for (prio = 0; prio < BNX2X_MAX_PRIORITY; prio++) {
708 if (bp->dcbx_port_params.ets.cos_params[cos].pri_bitmask
709 & (1 << prio)) {
710 bp->prio_to_cos[prio] = cos;
711 DP(NETIF_MSG_LINK,
712 "tx_mapping %d --> %d\n", prio, cos);
713 }
714 }
715 }
716
717 /* setup tc must be called under rtnl lock, but we can't take it here
718 * as we are handling an attetntion on a work queue which must be
719 * flushed at some rtnl-locked contexts (e.g. if down)
720 */
721 if (!test_and_set_bit(BNX2X_SP_RTNL_SETUP_TC, &bp->sp_rtnl_state))
722 schedule_delayed_work(&bp->sp_rtnl_task, 0);
723 }
724
725 void bnx2x_dcbx_set_params(struct bnx2x *bp, u32 state)
726 {
727 switch (state) {
728 case BNX2X_DCBX_STATE_NEG_RECEIVED:
729 {
730 DP(NETIF_MSG_LINK, "BNX2X_DCBX_STATE_NEG_RECEIVED\n");
731 #ifdef BCM_DCBNL
732 /**
733 * Delete app tlvs from dcbnl before reading new
734 * negotiation results
735 */
736 bnx2x_dcbnl_update_applist(bp, true);
737
738 /* Read rmeote mib if dcbx is in the FW */
739 if (bnx2x_dcbx_read_shmem_remote_mib(bp))
740 return;
741 #endif
742 /* Read neg results if dcbx is in the FW */
743 if (bnx2x_dcbx_read_shmem_neg_results(bp))
744 return;
745
746 bnx2x_dump_dcbx_drv_param(bp, &bp->dcbx_local_feat,
747 bp->dcbx_error);
748
749 bnx2x_get_dcbx_drv_param(bp, &bp->dcbx_local_feat,
750 bp->dcbx_error);
751
752 /* mark DCBX result for PMF migration */
753 bnx2x_update_drv_flags(bp, DRV_FLAGS_DCB_CONFIGURED, 1);
754 #ifdef BCM_DCBNL
755 /**
756 * Add new app tlvs to dcbnl
757 */
758 bnx2x_dcbnl_update_applist(bp, false);
759 #endif
760 bnx2x_dcbx_stop_hw_tx(bp);
761
762 /* reconfigure the netdevice with the results of the new
763 * dcbx negotiation.
764 */
765 bnx2x_dcbx_update_tc_mapping(bp);
766
767 return;
768 }
769 case BNX2X_DCBX_STATE_TX_PAUSED:
770 DP(NETIF_MSG_LINK, "BNX2X_DCBX_STATE_TX_PAUSED\n");
771 bnx2x_pfc_set_pfc(bp);
772
773 bnx2x_dcbx_update_ets_params(bp);
774 bnx2x_dcbx_resume_hw_tx(bp);
775 return;
776 case BNX2X_DCBX_STATE_TX_RELEASED:
777 DP(NETIF_MSG_LINK, "BNX2X_DCBX_STATE_TX_RELEASED\n");
778 bnx2x_fw_command(bp, DRV_MSG_CODE_DCBX_PMF_DRV_OK, 0);
779 #ifdef BCM_DCBNL
780 /*
781 * Send a notification for the new negotiated parameters
782 */
783 dcbnl_cee_notify(bp->dev, RTM_GETDCB, DCB_CMD_CEE_GET, 0, 0);
784 #endif
785 return;
786 default:
787 BNX2X_ERR("Unknown DCBX_STATE\n");
788 }
789 }
790
791 #define LLDP_ADMIN_MIB_OFFSET(bp) (PORT_MAX*sizeof(struct lldp_params) + \
792 BP_PORT(bp)*sizeof(struct lldp_admin_mib))
793
794 static void bnx2x_dcbx_admin_mib_updated_params(struct bnx2x *bp,
795 u32 dcbx_lldp_params_offset)
796 {
797 struct lldp_admin_mib admin_mib;
798 u32 i, other_traf_type = PREDEFINED_APP_IDX_MAX, traf_type = 0;
799 u32 offset = dcbx_lldp_params_offset + LLDP_ADMIN_MIB_OFFSET(bp);
800
801 /*shortcuts*/
802 struct dcbx_features *af = &admin_mib.features;
803 struct bnx2x_config_dcbx_params *dp = &bp->dcbx_config_params;
804
805 memset(&admin_mib, 0, sizeof(struct lldp_admin_mib));
806
807 /* Read the data first */
808 bnx2x_read_data(bp, (u32 *)&admin_mib, offset,
809 sizeof(struct lldp_admin_mib));
810
811 if (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_ON)
812 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED);
813 else
814 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED);
815
816 if (dp->overwrite_settings == BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE) {
817
818 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_CEE_VERSION_MASK);
819 admin_mib.ver_cfg_flags |=
820 (dp->admin_dcbx_version << DCBX_CEE_VERSION_SHIFT) &
821 DCBX_CEE_VERSION_MASK;
822
823 af->ets.enabled = (u8)dp->admin_ets_enable;
824
825 af->pfc.enabled = (u8)dp->admin_pfc_enable;
826
827 /* FOR IEEE dp->admin_tc_supported_tx_enable */
828 if (dp->admin_ets_configuration_tx_enable)
829 SET_FLAGS(admin_mib.ver_cfg_flags,
830 DCBX_ETS_CONFIG_TX_ENABLED);
831 else
832 RESET_FLAGS(admin_mib.ver_cfg_flags,
833 DCBX_ETS_CONFIG_TX_ENABLED);
834 /* For IEEE admin_ets_recommendation_tx_enable */
835 if (dp->admin_pfc_tx_enable)
836 SET_FLAGS(admin_mib.ver_cfg_flags,
837 DCBX_PFC_CONFIG_TX_ENABLED);
838 else
839 RESET_FLAGS(admin_mib.ver_cfg_flags,
840 DCBX_PFC_CONFIG_TX_ENABLED);
841
842 if (dp->admin_application_priority_tx_enable)
843 SET_FLAGS(admin_mib.ver_cfg_flags,
844 DCBX_APP_CONFIG_TX_ENABLED);
845 else
846 RESET_FLAGS(admin_mib.ver_cfg_flags,
847 DCBX_APP_CONFIG_TX_ENABLED);
848
849 if (dp->admin_ets_willing)
850 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING);
851 else
852 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING);
853 /* For IEEE admin_ets_reco_valid */
854 if (dp->admin_pfc_willing)
855 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING);
856 else
857 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING);
858
859 if (dp->admin_app_priority_willing)
860 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING);
861 else
862 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING);
863
864 for (i = 0 ; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++) {
865 DCBX_PG_BW_SET(af->ets.pg_bw_tbl, i,
866 (u8)dp->admin_configuration_bw_precentage[i]);
867
868 DP(NETIF_MSG_LINK, "pg_bw_tbl[%d] = %02x\n",
869 i, DCBX_PG_BW_GET(af->ets.pg_bw_tbl, i));
870 }
871
872 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) {
873 DCBX_PRI_PG_SET(af->ets.pri_pg_tbl, i,
874 (u8)dp->admin_configuration_ets_pg[i]);
875
876 DP(NETIF_MSG_LINK, "pri_pg_tbl[%d] = %02x\n",
877 i, DCBX_PRI_PG_GET(af->ets.pri_pg_tbl, i));
878 }
879
880 /*For IEEE admin_recommendation_bw_precentage
881 *For IEEE admin_recommendation_ets_pg */
882 af->pfc.pri_en_bitmap = (u8)dp->admin_pfc_bitmap;
883 for (i = 0; i < 4; i++) {
884 if (dp->admin_priority_app_table[i].valid) {
885 struct bnx2x_admin_priority_app_table *table =
886 dp->admin_priority_app_table;
887 if ((ETH_TYPE_FCOE == table[i].app_id) &&
888 (TRAFFIC_TYPE_ETH == table[i].traffic_type))
889 traf_type = FCOE_APP_IDX;
890 else if ((TCP_PORT_ISCSI == table[i].app_id) &&
891 (TRAFFIC_TYPE_PORT == table[i].traffic_type))
892 traf_type = ISCSI_APP_IDX;
893 else
894 traf_type = other_traf_type++;
895
896 af->app.app_pri_tbl[traf_type].app_id =
897 table[i].app_id;
898
899 af->app.app_pri_tbl[traf_type].pri_bitmap =
900 (u8)(1 << table[i].priority);
901
902 af->app.app_pri_tbl[traf_type].appBitfield =
903 (DCBX_APP_ENTRY_VALID);
904
905 af->app.app_pri_tbl[traf_type].appBitfield |=
906 (TRAFFIC_TYPE_ETH == table[i].traffic_type) ?
907 DCBX_APP_SF_ETH_TYPE : DCBX_APP_SF_PORT;
908 }
909 }
910
911 af->app.default_pri = (u8)dp->admin_default_priority;
912
913 }
914
915 /* Write the data. */
916 bnx2x_write_data(bp, (u32 *)&admin_mib, offset,
917 sizeof(struct lldp_admin_mib));
918
919 }
920
921 void bnx2x_dcbx_set_state(struct bnx2x *bp, bool dcb_on, u32 dcbx_enabled)
922 {
923 if (!CHIP_IS_E1x(bp) && !CHIP_IS_E3(bp)) {
924 bp->dcb_state = dcb_on;
925 bp->dcbx_enabled = dcbx_enabled;
926 } else {
927 bp->dcb_state = false;
928 bp->dcbx_enabled = BNX2X_DCBX_ENABLED_INVALID;
929 }
930 DP(NETIF_MSG_LINK, "DCB state [%s:%s]\n",
931 dcb_on ? "ON" : "OFF",
932 dcbx_enabled == BNX2X_DCBX_ENABLED_OFF ? "user-mode" :
933 dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_OFF ? "on-chip static" :
934 dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_ON ?
935 "on-chip with negotiation" : "invalid");
936 }
937
938 void bnx2x_dcbx_init_params(struct bnx2x *bp)
939 {
940 bp->dcbx_config_params.admin_dcbx_version = 0x0; /* 0 - CEE; 1 - IEEE */
941 bp->dcbx_config_params.admin_ets_willing = 1;
942 bp->dcbx_config_params.admin_pfc_willing = 1;
943 bp->dcbx_config_params.overwrite_settings = 1;
944 bp->dcbx_config_params.admin_ets_enable = 1;
945 bp->dcbx_config_params.admin_pfc_enable = 1;
946 bp->dcbx_config_params.admin_tc_supported_tx_enable = 1;
947 bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1;
948 bp->dcbx_config_params.admin_pfc_tx_enable = 1;
949 bp->dcbx_config_params.admin_application_priority_tx_enable = 1;
950 bp->dcbx_config_params.admin_ets_reco_valid = 1;
951 bp->dcbx_config_params.admin_app_priority_willing = 1;
952 bp->dcbx_config_params.admin_configuration_bw_precentage[0] = 00;
953 bp->dcbx_config_params.admin_configuration_bw_precentage[1] = 50;
954 bp->dcbx_config_params.admin_configuration_bw_precentage[2] = 50;
955 bp->dcbx_config_params.admin_configuration_bw_precentage[3] = 0;
956 bp->dcbx_config_params.admin_configuration_bw_precentage[4] = 0;
957 bp->dcbx_config_params.admin_configuration_bw_precentage[5] = 0;
958 bp->dcbx_config_params.admin_configuration_bw_precentage[6] = 0;
959 bp->dcbx_config_params.admin_configuration_bw_precentage[7] = 0;
960 bp->dcbx_config_params.admin_configuration_ets_pg[0] = 1;
961 bp->dcbx_config_params.admin_configuration_ets_pg[1] = 0;
962 bp->dcbx_config_params.admin_configuration_ets_pg[2] = 0;
963 bp->dcbx_config_params.admin_configuration_ets_pg[3] = 2;
964 bp->dcbx_config_params.admin_configuration_ets_pg[4] = 0;
965 bp->dcbx_config_params.admin_configuration_ets_pg[5] = 0;
966 bp->dcbx_config_params.admin_configuration_ets_pg[6] = 0;
967 bp->dcbx_config_params.admin_configuration_ets_pg[7] = 0;
968 bp->dcbx_config_params.admin_recommendation_bw_precentage[0] = 0;
969 bp->dcbx_config_params.admin_recommendation_bw_precentage[1] = 1;
970 bp->dcbx_config_params.admin_recommendation_bw_precentage[2] = 2;
971 bp->dcbx_config_params.admin_recommendation_bw_precentage[3] = 0;
972 bp->dcbx_config_params.admin_recommendation_bw_precentage[4] = 7;
973 bp->dcbx_config_params.admin_recommendation_bw_precentage[5] = 5;
974 bp->dcbx_config_params.admin_recommendation_bw_precentage[6] = 6;
975 bp->dcbx_config_params.admin_recommendation_bw_precentage[7] = 7;
976 bp->dcbx_config_params.admin_recommendation_ets_pg[0] = 0;
977 bp->dcbx_config_params.admin_recommendation_ets_pg[1] = 1;
978 bp->dcbx_config_params.admin_recommendation_ets_pg[2] = 2;
979 bp->dcbx_config_params.admin_recommendation_ets_pg[3] = 3;
980 bp->dcbx_config_params.admin_recommendation_ets_pg[4] = 4;
981 bp->dcbx_config_params.admin_recommendation_ets_pg[5] = 5;
982 bp->dcbx_config_params.admin_recommendation_ets_pg[6] = 6;
983 bp->dcbx_config_params.admin_recommendation_ets_pg[7] = 7;
984 bp->dcbx_config_params.admin_pfc_bitmap = 0x8; /* FCoE(3) enable */
985 bp->dcbx_config_params.admin_priority_app_table[0].valid = 1;
986 bp->dcbx_config_params.admin_priority_app_table[1].valid = 1;
987 bp->dcbx_config_params.admin_priority_app_table[2].valid = 0;
988 bp->dcbx_config_params.admin_priority_app_table[3].valid = 0;
989 bp->dcbx_config_params.admin_priority_app_table[0].priority = 3;
990 bp->dcbx_config_params.admin_priority_app_table[1].priority = 0;
991 bp->dcbx_config_params.admin_priority_app_table[2].priority = 0;
992 bp->dcbx_config_params.admin_priority_app_table[3].priority = 0;
993 bp->dcbx_config_params.admin_priority_app_table[0].traffic_type = 0;
994 bp->dcbx_config_params.admin_priority_app_table[1].traffic_type = 1;
995 bp->dcbx_config_params.admin_priority_app_table[2].traffic_type = 0;
996 bp->dcbx_config_params.admin_priority_app_table[3].traffic_type = 0;
997 bp->dcbx_config_params.admin_priority_app_table[0].app_id = 0x8906;
998 bp->dcbx_config_params.admin_priority_app_table[1].app_id = 3260;
999 bp->dcbx_config_params.admin_priority_app_table[2].app_id = 0;
1000 bp->dcbx_config_params.admin_priority_app_table[3].app_id = 0;
1001 bp->dcbx_config_params.admin_default_priority =
1002 bp->dcbx_config_params.admin_priority_app_table[1].priority;
1003 }
1004
1005 void bnx2x_dcbx_init(struct bnx2x *bp)
1006 {
1007 u32 dcbx_lldp_params_offset = SHMEM_LLDP_DCBX_PARAMS_NONE;
1008
1009 if (bp->dcbx_enabled <= 0)
1010 return;
1011
1012 /* validate:
1013 * chip of good for dcbx version,
1014 * dcb is wanted
1015 * the function is pmf
1016 * shmem2 contains DCBX support fields
1017 */
1018 DP(NETIF_MSG_LINK, "dcb_state %d bp->port.pmf %d\n",
1019 bp->dcb_state, bp->port.pmf);
1020
1021 if (bp->dcb_state == BNX2X_DCB_STATE_ON && bp->port.pmf &&
1022 SHMEM2_HAS(bp, dcbx_lldp_params_offset)) {
1023 dcbx_lldp_params_offset =
1024 SHMEM2_RD(bp, dcbx_lldp_params_offset);
1025
1026 DP(NETIF_MSG_LINK, "dcbx_lldp_params_offset 0x%x\n",
1027 dcbx_lldp_params_offset);
1028
1029 bnx2x_update_drv_flags(bp, DRV_FLAGS_DCB_CONFIGURED, 0);
1030
1031 if (SHMEM_LLDP_DCBX_PARAMS_NONE != dcbx_lldp_params_offset) {
1032 bnx2x_dcbx_admin_mib_updated_params(bp,
1033 dcbx_lldp_params_offset);
1034
1035 /* Let HW start negotiation */
1036 bnx2x_fw_command(bp,
1037 DRV_MSG_CODE_DCBX_ADMIN_PMF_MSG, 0);
1038 }
1039 }
1040 }
1041 static void
1042 bnx2x_dcbx_print_cos_params(struct bnx2x *bp,
1043 struct bnx2x_func_tx_start_params *pfc_fw_cfg)
1044 {
1045 u8 pri = 0;
1046 u8 cos = 0;
1047
1048 DP(NETIF_MSG_LINK,
1049 "pfc_fw_cfg->dcb_version %x\n", pfc_fw_cfg->dcb_version);
1050 DP(NETIF_MSG_LINK,
1051 "pdev->params.dcbx_port_params.pfc."
1052 "priority_non_pauseable_mask %x\n",
1053 bp->dcbx_port_params.pfc.priority_non_pauseable_mask);
1054
1055 for (cos = 0 ; cos < bp->dcbx_port_params.ets.num_of_cos ; cos++) {
1056 DP(NETIF_MSG_LINK, "pdev->params.dcbx_port_params.ets."
1057 "cos_params[%d].pri_bitmask %x\n", cos,
1058 bp->dcbx_port_params.ets.cos_params[cos].pri_bitmask);
1059
1060 DP(NETIF_MSG_LINK, "pdev->params.dcbx_port_params.ets."
1061 "cos_params[%d].bw_tbl %x\n", cos,
1062 bp->dcbx_port_params.ets.cos_params[cos].bw_tbl);
1063
1064 DP(NETIF_MSG_LINK, "pdev->params.dcbx_port_params.ets."
1065 "cos_params[%d].strict %x\n", cos,
1066 bp->dcbx_port_params.ets.cos_params[cos].strict);
1067
1068 DP(NETIF_MSG_LINK, "pdev->params.dcbx_port_params.ets."
1069 "cos_params[%d].pauseable %x\n", cos,
1070 bp->dcbx_port_params.ets.cos_params[cos].pauseable);
1071 }
1072
1073 for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) {
1074 DP(NETIF_MSG_LINK,
1075 "pfc_fw_cfg->traffic_type_to_priority_cos[%d]."
1076 "priority %x\n", pri,
1077 pfc_fw_cfg->traffic_type_to_priority_cos[pri].priority);
1078
1079 DP(NETIF_MSG_LINK,
1080 "pfc_fw_cfg->traffic_type_to_priority_cos[%d].cos %x\n",
1081 pri, pfc_fw_cfg->traffic_type_to_priority_cos[pri].cos);
1082 }
1083 }
1084
1085 /* fills help_data according to pg_info */
1086 static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp,
1087 u32 *pg_pri_orginal_spread,
1088 struct pg_help_data *help_data)
1089 {
1090 bool pg_found = false;
1091 u32 i, traf_type, add_traf_type, add_pg;
1092 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
1093 struct pg_entry_help_data *data = help_data->data; /*shotcut*/
1094
1095 /* Set to invalid */
1096 for (i = 0; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++)
1097 data[i].pg = DCBX_ILLEGAL_PG;
1098
1099 for (add_traf_type = 0;
1100 add_traf_type < LLFC_DRIVER_TRAFFIC_TYPE_MAX; add_traf_type++) {
1101 pg_found = false;
1102 if (ttp[add_traf_type] < MAX_PFC_PRIORITIES) {
1103 add_pg = (u8)pg_pri_orginal_spread[ttp[add_traf_type]];
1104 for (traf_type = 0;
1105 traf_type < LLFC_DRIVER_TRAFFIC_TYPE_MAX;
1106 traf_type++) {
1107 if (data[traf_type].pg == add_pg) {
1108 if (!(data[traf_type].pg_priority &
1109 (1 << ttp[add_traf_type])))
1110 data[traf_type].
1111 num_of_dif_pri++;
1112 data[traf_type].pg_priority |=
1113 (1 << ttp[add_traf_type]);
1114 pg_found = true;
1115 break;
1116 }
1117 }
1118 if (false == pg_found) {
1119 data[help_data->num_of_pg].pg = add_pg;
1120 data[help_data->num_of_pg].pg_priority =
1121 (1 << ttp[add_traf_type]);
1122 data[help_data->num_of_pg].num_of_dif_pri = 1;
1123 help_data->num_of_pg++;
1124 }
1125 }
1126 DP(NETIF_MSG_LINK,
1127 "add_traf_type %d pg_found %s num_of_pg %d\n",
1128 add_traf_type, (false == pg_found) ? "NO" : "YES",
1129 help_data->num_of_pg);
1130 }
1131 }
1132
1133 static void bnx2x_dcbx_ets_disabled_entry_data(struct bnx2x *bp,
1134 struct cos_help_data *cos_data,
1135 u32 pri_join_mask)
1136 {
1137 /* Only one priority than only one COS */
1138 cos_data->data[0].pausable =
1139 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
1140 cos_data->data[0].pri_join_mask = pri_join_mask;
1141 cos_data->data[0].cos_bw = 100;
1142 cos_data->num_of_cos = 1;
1143 }
1144
1145 static inline void bnx2x_dcbx_add_to_cos_bw(struct bnx2x *bp,
1146 struct cos_entry_help_data *data,
1147 u8 pg_bw)
1148 {
1149 if (data->cos_bw == DCBX_INVALID_COS_BW)
1150 data->cos_bw = pg_bw;
1151 else
1152 data->cos_bw += pg_bw;
1153 }
1154
1155 static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp,
1156 struct cos_help_data *cos_data,
1157 u32 *pg_pri_orginal_spread,
1158 struct dcbx_ets_feature *ets)
1159 {
1160 u32 pri_tested = 0;
1161 u8 i = 0;
1162 u8 entry = 0;
1163 u8 pg_entry = 0;
1164 u8 num_of_pri = LLFC_DRIVER_TRAFFIC_TYPE_MAX;
1165
1166 cos_data->data[0].pausable = true;
1167 cos_data->data[1].pausable = false;
1168 cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0;
1169
1170 for (i = 0 ; i < num_of_pri ; i++) {
1171 pri_tested = 1 << bp->dcbx_port_params.
1172 app.traffic_type_priority[i];
1173
1174 if (pri_tested & DCBX_PFC_PRI_NON_PAUSE_MASK(bp)) {
1175 cos_data->data[1].pri_join_mask |= pri_tested;
1176 entry = 1;
1177 } else {
1178 cos_data->data[0].pri_join_mask |= pri_tested;
1179 entry = 0;
1180 }
1181 pg_entry = (u8)pg_pri_orginal_spread[bp->dcbx_port_params.
1182 app.traffic_type_priority[i]];
1183 /* There can be only one strict pg */
1184 if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES)
1185 bnx2x_dcbx_add_to_cos_bw(bp, &cos_data->data[entry],
1186 DCBX_PG_BW_GET(ets->pg_bw_tbl, pg_entry));
1187 else
1188 /* If we join a group and one is strict
1189 * than the bw rulls */
1190 cos_data->data[entry].strict =
1191 BNX2X_DCBX_STRICT_COS_HIGHEST;
1192 }
1193 if ((0 == cos_data->data[0].pri_join_mask) &&
1194 (0 == cos_data->data[1].pri_join_mask))
1195 BNX2X_ERR("dcbx error: Both groups must have priorities\n");
1196 }
1197
1198
1199 #ifndef POWER_OF_2
1200 #define POWER_OF_2(x) ((0 != x) && (0 == (x & (x-1))))
1201 #endif
1202
1203 static void bnx2x_dcbx_2cos_limit_cee_single_pg_to_cos_params(struct bnx2x *bp,
1204 struct pg_help_data *pg_help_data,
1205 struct cos_help_data *cos_data,
1206 u32 pri_join_mask,
1207 u8 num_of_dif_pri)
1208 {
1209 u8 i = 0;
1210 u32 pri_tested = 0;
1211 u32 pri_mask_without_pri = 0;
1212 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
1213 /*debug*/
1214 if (num_of_dif_pri == 1) {
1215 bnx2x_dcbx_ets_disabled_entry_data(bp, cos_data, pri_join_mask);
1216 return;
1217 }
1218 /* single priority group */
1219 if (pg_help_data->data[0].pg < DCBX_MAX_NUM_PG_BW_ENTRIES) {
1220 /* If there are both pauseable and non-pauseable priorities,
1221 * the pauseable priorities go to the first queue and
1222 * the non-pauseable priorities go to the second queue.
1223 */
1224 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) {
1225 /* Pauseable */
1226 cos_data->data[0].pausable = true;
1227 /* Non pauseable.*/
1228 cos_data->data[1].pausable = false;
1229
1230 if (2 == num_of_dif_pri) {
1231 cos_data->data[0].cos_bw = 50;
1232 cos_data->data[1].cos_bw = 50;
1233 }
1234
1235 if (3 == num_of_dif_pri) {
1236 if (POWER_OF_2(DCBX_PFC_PRI_GET_PAUSE(bp,
1237 pri_join_mask))) {
1238 cos_data->data[0].cos_bw = 33;
1239 cos_data->data[1].cos_bw = 67;
1240 } else {
1241 cos_data->data[0].cos_bw = 67;
1242 cos_data->data[1].cos_bw = 33;
1243 }
1244 }
1245
1246 } else if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask)) {
1247 /* If there are only pauseable priorities,
1248 * then one/two priorities go to the first queue
1249 * and one priority goes to the second queue.
1250 */
1251 if (2 == num_of_dif_pri) {
1252 cos_data->data[0].cos_bw = 50;
1253 cos_data->data[1].cos_bw = 50;
1254 } else {
1255 cos_data->data[0].cos_bw = 67;
1256 cos_data->data[1].cos_bw = 33;
1257 }
1258 cos_data->data[1].pausable = true;
1259 cos_data->data[0].pausable = true;
1260 /* All priorities except FCOE */
1261 cos_data->data[0].pri_join_mask = (pri_join_mask &
1262 ((u8)~(1 << ttp[LLFC_TRAFFIC_TYPE_FCOE])));
1263 /* Only FCOE priority.*/
1264 cos_data->data[1].pri_join_mask =
1265 (1 << ttp[LLFC_TRAFFIC_TYPE_FCOE]);
1266 } else
1267 /* If there are only non-pauseable priorities,
1268 * they will all go to the same queue.
1269 */
1270 bnx2x_dcbx_ets_disabled_entry_data(bp,
1271 cos_data, pri_join_mask);
1272 } else {
1273 /* priority group which is not BW limited (PG#15):*/
1274 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) {
1275 /* If there are both pauseable and non-pauseable
1276 * priorities, the pauseable priorities go to the first
1277 * queue and the non-pauseable priorities
1278 * go to the second queue.
1279 */
1280 if (DCBX_PFC_PRI_GET_PAUSE(bp, pri_join_mask) >
1281 DCBX_PFC_PRI_GET_NON_PAUSE(bp, pri_join_mask)) {
1282 cos_data->data[0].strict =
1283 BNX2X_DCBX_STRICT_COS_HIGHEST;
1284 cos_data->data[1].strict =
1285 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(
1286 BNX2X_DCBX_STRICT_COS_HIGHEST);
1287 } else {
1288 cos_data->data[0].strict =
1289 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(
1290 BNX2X_DCBX_STRICT_COS_HIGHEST);
1291 cos_data->data[1].strict =
1292 BNX2X_DCBX_STRICT_COS_HIGHEST;
1293 }
1294 /* Pauseable */
1295 cos_data->data[0].pausable = true;
1296 /* Non pause-able.*/
1297 cos_data->data[1].pausable = false;
1298 } else {
1299 /* If there are only pauseable priorities or
1300 * only non-pauseable,* the lower priorities go
1301 * to the first queue and the higherpriorities go
1302 * to the second queue.
1303 */
1304 cos_data->data[0].pausable =
1305 cos_data->data[1].pausable =
1306 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
1307
1308 for (i = 0 ; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++) {
1309 pri_tested = 1 << bp->dcbx_port_params.
1310 app.traffic_type_priority[i];
1311 /* Remove priority tested */
1312 pri_mask_without_pri =
1313 (pri_join_mask & ((u8)(~pri_tested)));
1314 if (pri_mask_without_pri < pri_tested)
1315 break;
1316 }
1317
1318 if (i == LLFC_DRIVER_TRAFFIC_TYPE_MAX)
1319 BNX2X_ERR("Invalid value for pri_join_mask -"
1320 " could not find a priority\n");
1321
1322 cos_data->data[0].pri_join_mask = pri_mask_without_pri;
1323 cos_data->data[1].pri_join_mask = pri_tested;
1324 /* Both queues are strict priority,
1325 * and that with the highest priority
1326 * gets the highest strict priority in the arbiter.
1327 */
1328 cos_data->data[0].strict =
1329 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(
1330 BNX2X_DCBX_STRICT_COS_HIGHEST);
1331 cos_data->data[1].strict =
1332 BNX2X_DCBX_STRICT_COS_HIGHEST;
1333 }
1334 }
1335 }
1336
1337 static void bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params(
1338 struct bnx2x *bp,
1339 struct pg_help_data *pg_help_data,
1340 struct dcbx_ets_feature *ets,
1341 struct cos_help_data *cos_data,
1342 u32 *pg_pri_orginal_spread,
1343 u32 pri_join_mask,
1344 u8 num_of_dif_pri)
1345 {
1346 u8 i = 0;
1347 u8 pg[DCBX_COS_MAX_NUM_E2] = { 0 };
1348
1349 /* If there are both pauseable and non-pauseable priorities,
1350 * the pauseable priorities go to the first queue and
1351 * the non-pauseable priorities go to the second queue.
1352 */
1353 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) {
1354 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp,
1355 pg_help_data->data[0].pg_priority) ||
1356 IS_DCBX_PFC_PRI_MIX_PAUSE(bp,
1357 pg_help_data->data[1].pg_priority)) {
1358 /* If one PG contains both pauseable and
1359 * non-pauseable priorities then ETS is disabled.
1360 */
1361 bnx2x_dcbx_separate_pauseable_from_non(bp, cos_data,
1362 pg_pri_orginal_spread, ets);
1363 bp->dcbx_port_params.ets.enabled = false;
1364 return;
1365 }
1366
1367 /* Pauseable */
1368 cos_data->data[0].pausable = true;
1369 /* Non pauseable. */
1370 cos_data->data[1].pausable = false;
1371 if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp,
1372 pg_help_data->data[0].pg_priority)) {
1373 /* 0 is pauseable */
1374 cos_data->data[0].pri_join_mask =
1375 pg_help_data->data[0].pg_priority;
1376 pg[0] = pg_help_data->data[0].pg;
1377 cos_data->data[1].pri_join_mask =
1378 pg_help_data->data[1].pg_priority;
1379 pg[1] = pg_help_data->data[1].pg;
1380 } else {/* 1 is pauseable */
1381 cos_data->data[0].pri_join_mask =
1382 pg_help_data->data[1].pg_priority;
1383 pg[0] = pg_help_data->data[1].pg;
1384 cos_data->data[1].pri_join_mask =
1385 pg_help_data->data[0].pg_priority;
1386 pg[1] = pg_help_data->data[0].pg;
1387 }
1388 } else {
1389 /* If there are only pauseable priorities or
1390 * only non-pauseable, each PG goes to a queue.
1391 */
1392 cos_data->data[0].pausable = cos_data->data[1].pausable =
1393 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
1394 cos_data->data[0].pri_join_mask =
1395 pg_help_data->data[0].pg_priority;
1396 pg[0] = pg_help_data->data[0].pg;
1397 cos_data->data[1].pri_join_mask =
1398 pg_help_data->data[1].pg_priority;
1399 pg[1] = pg_help_data->data[1].pg;
1400 }
1401
1402 /* There can be only one strict pg */
1403 for (i = 0 ; i < ARRAY_SIZE(pg); i++) {
1404 if (pg[i] < DCBX_MAX_NUM_PG_BW_ENTRIES)
1405 cos_data->data[i].cos_bw =
1406 DCBX_PG_BW_GET(ets->pg_bw_tbl, pg[i]);
1407 else
1408 cos_data->data[i].strict =
1409 BNX2X_DCBX_STRICT_COS_HIGHEST;
1410 }
1411 }
1412
1413 static int bnx2x_dcbx_join_pgs(
1414 struct bnx2x *bp,
1415 struct dcbx_ets_feature *ets,
1416 struct pg_help_data *pg_help_data,
1417 u8 required_num_of_pg)
1418 {
1419 u8 entry_joined = pg_help_data->num_of_pg - 1;
1420 u8 entry_removed = entry_joined + 1;
1421 u8 pg_joined = 0;
1422
1423 if (required_num_of_pg == 0 || ARRAY_SIZE(pg_help_data->data)
1424 <= pg_help_data->num_of_pg) {
1425
1426 BNX2X_ERR("required_num_of_pg can't be zero\n");
1427 return -EINVAL;
1428 }
1429
1430 while (required_num_of_pg < pg_help_data->num_of_pg) {
1431 entry_joined = pg_help_data->num_of_pg - 2;
1432 entry_removed = entry_joined + 1;
1433 /* protect index */
1434 entry_removed %= ARRAY_SIZE(pg_help_data->data);
1435
1436 pg_help_data->data[entry_joined].pg_priority |=
1437 pg_help_data->data[entry_removed].pg_priority;
1438
1439 pg_help_data->data[entry_joined].num_of_dif_pri +=
1440 pg_help_data->data[entry_removed].num_of_dif_pri;
1441
1442 if (pg_help_data->data[entry_joined].pg == DCBX_STRICT_PRI_PG ||
1443 pg_help_data->data[entry_removed].pg == DCBX_STRICT_PRI_PG)
1444 /* Entries joined strict priority rules */
1445 pg_help_data->data[entry_joined].pg =
1446 DCBX_STRICT_PRI_PG;
1447 else {
1448 /* Entries can be joined join BW */
1449 pg_joined = DCBX_PG_BW_GET(ets->pg_bw_tbl,
1450 pg_help_data->data[entry_joined].pg) +
1451 DCBX_PG_BW_GET(ets->pg_bw_tbl,
1452 pg_help_data->data[entry_removed].pg);
1453
1454 DCBX_PG_BW_SET(ets->pg_bw_tbl,
1455 pg_help_data->data[entry_joined].pg, pg_joined);
1456 }
1457 /* Joined the entries */
1458 pg_help_data->num_of_pg--;
1459 }
1460
1461 return 0;
1462 }
1463
1464 static void bnx2x_dcbx_2cos_limit_cee_three_pg_to_cos_params(
1465 struct bnx2x *bp,
1466 struct pg_help_data *pg_help_data,
1467 struct dcbx_ets_feature *ets,
1468 struct cos_help_data *cos_data,
1469 u32 *pg_pri_orginal_spread,
1470 u32 pri_join_mask,
1471 u8 num_of_dif_pri)
1472 {
1473 u8 i = 0;
1474 u32 pri_tested = 0;
1475 u8 entry = 0;
1476 u8 pg_entry = 0;
1477 bool b_found_strict = false;
1478 u8 num_of_pri = LLFC_DRIVER_TRAFFIC_TYPE_MAX;
1479
1480 cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0;
1481 /* If there are both pauseable and non-pauseable priorities,
1482 * the pauseable priorities go to the first queue and the
1483 * non-pauseable priorities go to the second queue.
1484 */
1485 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask))
1486 bnx2x_dcbx_separate_pauseable_from_non(bp,
1487 cos_data, pg_pri_orginal_spread, ets);
1488 else {
1489 /* If two BW-limited PG-s were combined to one queue,
1490 * the BW is their sum.
1491 *
1492 * If there are only pauseable priorities or only non-pauseable,
1493 * and there are both BW-limited and non-BW-limited PG-s,
1494 * the BW-limited PG/s go to one queue and the non-BW-limited
1495 * PG/s go to the second queue.
1496 *
1497 * If there are only pauseable priorities or only non-pauseable
1498 * and all are BW limited, then two priorities go to the first
1499 * queue and one priority goes to the second queue.
1500 *
1501 * We will join this two cases:
1502 * if one is BW limited it will go to the secoend queue
1503 * otherwise the last priority will get it
1504 */
1505
1506 cos_data->data[0].pausable = cos_data->data[1].pausable =
1507 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
1508
1509 for (i = 0 ; i < num_of_pri; i++) {
1510 pri_tested = 1 << bp->dcbx_port_params.
1511 app.traffic_type_priority[i];
1512 pg_entry = (u8)pg_pri_orginal_spread[bp->
1513 dcbx_port_params.app.traffic_type_priority[i]];
1514
1515 if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES) {
1516 entry = 0;
1517
1518 if (i == (num_of_pri-1) &&
1519 false == b_found_strict)
1520 /* last entry will be handled separately
1521 * If no priority is strict than last
1522 * enty goes to last queue.*/
1523 entry = 1;
1524 cos_data->data[entry].pri_join_mask |=
1525 pri_tested;
1526 bnx2x_dcbx_add_to_cos_bw(bp,
1527 &cos_data->data[entry],
1528 DCBX_PG_BW_GET(ets->pg_bw_tbl,
1529 pg_entry));
1530 } else {
1531 b_found_strict = true;
1532 cos_data->data[1].pri_join_mask |= pri_tested;
1533 /* If we join a group and one is strict
1534 * than the bw rulls */
1535 cos_data->data[1].strict =
1536 BNX2X_DCBX_STRICT_COS_HIGHEST;
1537 }
1538 }
1539 }
1540 }
1541
1542
1543 static void bnx2x_dcbx_2cos_limit_cee_fill_cos_params(struct bnx2x *bp,
1544 struct pg_help_data *help_data,
1545 struct dcbx_ets_feature *ets,
1546 struct cos_help_data *cos_data,
1547 u32 *pg_pri_orginal_spread,
1548 u32 pri_join_mask,
1549 u8 num_of_dif_pri)
1550 {
1551
1552 /* default E2 settings */
1553 cos_data->num_of_cos = DCBX_COS_MAX_NUM_E2;
1554
1555 switch (help_data->num_of_pg) {
1556 case 1:
1557 bnx2x_dcbx_2cos_limit_cee_single_pg_to_cos_params(
1558 bp,
1559 help_data,
1560 cos_data,
1561 pri_join_mask,
1562 num_of_dif_pri);
1563 break;
1564 case 2:
1565 bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params(
1566 bp,
1567 help_data,
1568 ets,
1569 cos_data,
1570 pg_pri_orginal_spread,
1571 pri_join_mask,
1572 num_of_dif_pri);
1573 break;
1574
1575 case 3:
1576 bnx2x_dcbx_2cos_limit_cee_three_pg_to_cos_params(
1577 bp,
1578 help_data,
1579 ets,
1580 cos_data,
1581 pg_pri_orginal_spread,
1582 pri_join_mask,
1583 num_of_dif_pri);
1584 break;
1585 default:
1586 BNX2X_ERR("Wrong pg_help_data.num_of_pg\n");
1587 bnx2x_dcbx_ets_disabled_entry_data(bp,
1588 cos_data, pri_join_mask);
1589 }
1590 }
1591
1592 static int bnx2x_dcbx_spread_strict_pri(struct bnx2x *bp,
1593 struct cos_help_data *cos_data,
1594 u8 entry,
1595 u8 num_spread_of_entries,
1596 u8 strict_app_pris)
1597 {
1598 u8 strict_pri = BNX2X_DCBX_STRICT_COS_HIGHEST;
1599 u8 num_of_app_pri = MAX_PFC_PRIORITIES;
1600 u8 app_pri_bit = 0;
1601
1602 while (num_spread_of_entries && num_of_app_pri > 0) {
1603 app_pri_bit = 1 << (num_of_app_pri - 1);
1604 if (app_pri_bit & strict_app_pris) {
1605 struct cos_entry_help_data *data = &cos_data->
1606 data[entry];
1607 num_spread_of_entries--;
1608 if (num_spread_of_entries == 0) {
1609 /* last entry needed put all the entries left */
1610 data->cos_bw = DCBX_INVALID_COS_BW;
1611 data->strict = strict_pri;
1612 data->pri_join_mask = strict_app_pris;
1613 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp,
1614 data->pri_join_mask);
1615 } else {
1616 strict_app_pris &= ~app_pri_bit;
1617
1618 data->cos_bw = DCBX_INVALID_COS_BW;
1619 data->strict = strict_pri;
1620 data->pri_join_mask = app_pri_bit;
1621 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp,
1622 data->pri_join_mask);
1623 }
1624
1625 strict_pri =
1626 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(strict_pri);
1627 entry++;
1628 }
1629
1630 num_of_app_pri--;
1631 }
1632
1633 if (num_spread_of_entries)
1634 return -EINVAL;
1635
1636 return 0;
1637 }
1638
1639 static u8 bnx2x_dcbx_cee_fill_strict_pri(struct bnx2x *bp,
1640 struct cos_help_data *cos_data,
1641 u8 entry,
1642 u8 num_spread_of_entries,
1643 u8 strict_app_pris)
1644 {
1645
1646 if (bnx2x_dcbx_spread_strict_pri(bp, cos_data, entry,
1647 num_spread_of_entries,
1648 strict_app_pris)) {
1649 struct cos_entry_help_data *data = &cos_data->
1650 data[entry];
1651 /* Fill BW entry */
1652 data->cos_bw = DCBX_INVALID_COS_BW;
1653 data->strict = BNX2X_DCBX_STRICT_COS_HIGHEST;
1654 data->pri_join_mask = strict_app_pris;
1655 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp,
1656 data->pri_join_mask);
1657 return 1;
1658 }
1659
1660 return num_spread_of_entries;
1661 }
1662
1663 static void bnx2x_dcbx_cee_fill_cos_params(struct bnx2x *bp,
1664 struct pg_help_data *help_data,
1665 struct dcbx_ets_feature *ets,
1666 struct cos_help_data *cos_data,
1667 u32 pri_join_mask)
1668
1669 {
1670 u8 need_num_of_entries = 0;
1671 u8 i = 0;
1672 u8 entry = 0;
1673
1674 /*
1675 * if the number of requested PG-s in CEE is greater than 3
1676 * then the results are not determined since this is a violation
1677 * of the standard.
1678 */
1679 if (help_data->num_of_pg > DCBX_COS_MAX_NUM_E3B0) {
1680 if (bnx2x_dcbx_join_pgs(bp, ets, help_data,
1681 DCBX_COS_MAX_NUM_E3B0)) {
1682 BNX2X_ERR("Unable to reduce the number of PGs -"
1683 "we will disables ETS\n");
1684 bnx2x_dcbx_ets_disabled_entry_data(bp, cos_data,
1685 pri_join_mask);
1686 return;
1687 }
1688 }
1689
1690 for (i = 0 ; i < help_data->num_of_pg; i++) {
1691 struct pg_entry_help_data *pg = &help_data->data[i];
1692 if (pg->pg < DCBX_MAX_NUM_PG_BW_ENTRIES) {
1693 struct cos_entry_help_data *data = &cos_data->
1694 data[entry];
1695 /* Fill BW entry */
1696 data->cos_bw = DCBX_PG_BW_GET(ets->pg_bw_tbl, pg->pg);
1697 data->strict = BNX2X_DCBX_STRICT_INVALID;
1698 data->pri_join_mask = pg->pg_priority;
1699 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp,
1700 data->pri_join_mask);
1701
1702 entry++;
1703 } else {
1704 need_num_of_entries = min_t(u8,
1705 (u8)pg->num_of_dif_pri,
1706 (u8)DCBX_COS_MAX_NUM_E3B0 -
1707 help_data->num_of_pg + 1);
1708 /*
1709 * If there are still VOQ-s which have no associated PG,
1710 * then associate these VOQ-s to PG15. These PG-s will
1711 * be used for SP between priorities on PG15.
1712 */
1713 entry += bnx2x_dcbx_cee_fill_strict_pri(bp, cos_data,
1714 entry, need_num_of_entries, pg->pg_priority);
1715 }
1716 }
1717
1718 /* the entry will represent the number of COSes used */
1719 cos_data->num_of_cos = entry;
1720 }
1721 static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp,
1722 struct pg_help_data *help_data,
1723 struct dcbx_ets_feature *ets,
1724 u32 *pg_pri_orginal_spread)
1725 {
1726 struct cos_help_data cos_data;
1727 u8 i = 0;
1728 u32 pri_join_mask = 0;
1729 u8 num_of_dif_pri = 0;
1730
1731 memset(&cos_data, 0, sizeof(cos_data));
1732
1733 /* Validate the pg value */
1734 for (i = 0; i < help_data->num_of_pg ; i++) {
1735 if (DCBX_STRICT_PRIORITY != help_data->data[i].pg &&
1736 DCBX_MAX_NUM_PG_BW_ENTRIES <= help_data->data[i].pg)
1737 BNX2X_ERR("Invalid pg[%d] data %x\n", i,
1738 help_data->data[i].pg);
1739 pri_join_mask |= help_data->data[i].pg_priority;
1740 num_of_dif_pri += help_data->data[i].num_of_dif_pri;
1741 }
1742
1743 /* defaults */
1744 cos_data.num_of_cos = 1;
1745 for (i = 0; i < ARRAY_SIZE(cos_data.data); i++) {
1746 cos_data.data[i].pri_join_mask = 0;
1747 cos_data.data[i].pausable = false;
1748 cos_data.data[i].strict = BNX2X_DCBX_STRICT_INVALID;
1749 cos_data.data[i].cos_bw = DCBX_INVALID_COS_BW;
1750 }
1751
1752 if (CHIP_IS_E3B0(bp))
1753 bnx2x_dcbx_cee_fill_cos_params(bp, help_data, ets,
1754 &cos_data, pri_join_mask);
1755 else /* E2 + E3A0 */
1756 bnx2x_dcbx_2cos_limit_cee_fill_cos_params(bp,
1757 help_data, ets,
1758 &cos_data,
1759 pg_pri_orginal_spread,
1760 pri_join_mask,
1761 num_of_dif_pri);
1762
1763 for (i = 0; i < cos_data.num_of_cos ; i++) {
1764 struct bnx2x_dcbx_cos_params *p =
1765 &bp->dcbx_port_params.ets.cos_params[i];
1766
1767 p->strict = cos_data.data[i].strict;
1768 p->bw_tbl = cos_data.data[i].cos_bw;
1769 p->pri_bitmask = cos_data.data[i].pri_join_mask;
1770 p->pauseable = cos_data.data[i].pausable;
1771
1772 /* sanity */
1773 if (p->bw_tbl != DCBX_INVALID_COS_BW ||
1774 p->strict != BNX2X_DCBX_STRICT_INVALID) {
1775 if (p->pri_bitmask == 0)
1776 BNX2X_ERR("Invalid pri_bitmask for %d\n", i);
1777
1778 if (CHIP_IS_E2(bp) || CHIP_IS_E3A0(bp)) {
1779
1780 if (p->pauseable &&
1781 DCBX_PFC_PRI_GET_NON_PAUSE(bp,
1782 p->pri_bitmask) != 0)
1783 BNX2X_ERR("Inconsistent config for "
1784 "pausable COS %d\n", i);
1785
1786 if (!p->pauseable &&
1787 DCBX_PFC_PRI_GET_PAUSE(bp,
1788 p->pri_bitmask) != 0)
1789 BNX2X_ERR("Inconsistent config for "
1790 "nonpausable COS %d\n", i);
1791 }
1792 }
1793
1794 if (p->pauseable)
1795 DP(NETIF_MSG_LINK, "COS %d PAUSABLE prijoinmask 0x%x\n",
1796 i, cos_data.data[i].pri_join_mask);
1797 else
1798 DP(NETIF_MSG_LINK, "COS %d NONPAUSABLE prijoinmask "
1799 "0x%x\n",
1800 i, cos_data.data[i].pri_join_mask);
1801 }
1802
1803 bp->dcbx_port_params.ets.num_of_cos = cos_data.num_of_cos ;
1804 }
1805
1806 static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp,
1807 u32 *set_configuration_ets_pg,
1808 u32 *pri_pg_tbl)
1809 {
1810 int i;
1811
1812 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) {
1813 set_configuration_ets_pg[i] = DCBX_PRI_PG_GET(pri_pg_tbl, i);
1814
1815 DP(NETIF_MSG_LINK, "set_configuration_ets_pg[%d] = 0x%x\n",
1816 i, set_configuration_ets_pg[i]);
1817 }
1818 }
1819
1820 static void bnx2x_dcbx_fw_struct(struct bnx2x *bp,
1821 struct bnx2x_func_tx_start_params *pfc_fw_cfg)
1822 {
1823 u16 pri_bit = 0;
1824 u8 cos = 0, pri = 0;
1825 struct priority_cos *tt2cos;
1826 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
1827
1828 memset(pfc_fw_cfg, 0, sizeof(*pfc_fw_cfg));
1829
1830 /* to disable DCB - the structure must be zeroed */
1831 if (bp->dcbx_error & DCBX_REMOTE_MIB_ERROR)
1832 return;
1833
1834 /*shortcut*/
1835 tt2cos = pfc_fw_cfg->traffic_type_to_priority_cos;
1836
1837 /* Fw version should be incremented each update */
1838 pfc_fw_cfg->dcb_version = ++bp->dcb_version;
1839 pfc_fw_cfg->dcb_enabled = 1;
1840
1841 /* Fill priority parameters */
1842 for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) {
1843 tt2cos[pri].priority = ttp[pri];
1844 pri_bit = 1 << tt2cos[pri].priority;
1845
1846 /* Fill COS parameters based on COS calculated to
1847 * make it more general for future use */
1848 for (cos = 0; cos < bp->dcbx_port_params.ets.num_of_cos; cos++)
1849 if (bp->dcbx_port_params.ets.cos_params[cos].
1850 pri_bitmask & pri_bit)
1851 tt2cos[pri].cos = cos;
1852 }
1853
1854 /* we never want the FW to add a 0 vlan tag */
1855 pfc_fw_cfg->dont_add_pri_0_en = 1;
1856
1857 bnx2x_dcbx_print_cos_params(bp, pfc_fw_cfg);
1858 }
1859
1860 void bnx2x_dcbx_pmf_update(struct bnx2x *bp)
1861 {
1862 /* if we need to syncronize DCBX result from prev PMF
1863 * read it from shmem and update bp accordingly
1864 */
1865 if (SHMEM2_HAS(bp, drv_flags) &&
1866 GET_FLAGS(SHMEM2_RD(bp, drv_flags), DRV_FLAGS_DCB_CONFIGURED)) {
1867 /* Read neg results if dcbx is in the FW */
1868 if (bnx2x_dcbx_read_shmem_neg_results(bp))
1869 return;
1870
1871 bnx2x_dump_dcbx_drv_param(bp, &bp->dcbx_local_feat,
1872 bp->dcbx_error);
1873 bnx2x_get_dcbx_drv_param(bp, &bp->dcbx_local_feat,
1874 bp->dcbx_error);
1875 }
1876 }
1877
1878 /* DCB netlink */
1879 #ifdef BCM_DCBNL
1880
1881 #define BNX2X_DCBX_CAPS (DCB_CAP_DCBX_LLD_MANAGED | \
1882 DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_STATIC)
1883
1884 static inline bool bnx2x_dcbnl_set_valid(struct bnx2x *bp)
1885 {
1886 /* validate dcbnl call that may change HW state:
1887 * DCB is on and DCBX mode was SUCCESSFULLY set by the user.
1888 */
1889 return bp->dcb_state && bp->dcbx_mode_uset;
1890 }
1891
1892 static u8 bnx2x_dcbnl_get_state(struct net_device *netdev)
1893 {
1894 struct bnx2x *bp = netdev_priv(netdev);
1895 DP(NETIF_MSG_LINK, "state = %d\n", bp->dcb_state);
1896 return bp->dcb_state;
1897 }
1898
1899 static u8 bnx2x_dcbnl_set_state(struct net_device *netdev, u8 state)
1900 {
1901 struct bnx2x *bp = netdev_priv(netdev);
1902 DP(NETIF_MSG_LINK, "state = %s\n", state ? "on" : "off");
1903
1904 bnx2x_dcbx_set_state(bp, (state ? true : false), bp->dcbx_enabled);
1905 return 0;
1906 }
1907
1908 static void bnx2x_dcbnl_get_perm_hw_addr(struct net_device *netdev,
1909 u8 *perm_addr)
1910 {
1911 struct bnx2x *bp = netdev_priv(netdev);
1912 DP(NETIF_MSG_LINK, "GET-PERM-ADDR\n");
1913
1914 /* first the HW mac address */
1915 memcpy(perm_addr, netdev->dev_addr, netdev->addr_len);
1916
1917 #ifdef BCM_CNIC
1918 /* second SAN address */
1919 memcpy(perm_addr+netdev->addr_len, bp->fip_mac, netdev->addr_len);
1920 #endif
1921 }
1922
1923 static void bnx2x_dcbnl_set_pg_tccfg_tx(struct net_device *netdev, int prio,
1924 u8 prio_type, u8 pgid, u8 bw_pct,
1925 u8 up_map)
1926 {
1927 struct bnx2x *bp = netdev_priv(netdev);
1928
1929 DP(NETIF_MSG_LINK, "prio[%d] = %d\n", prio, pgid);
1930 if (!bnx2x_dcbnl_set_valid(bp) || prio >= DCBX_MAX_NUM_PRI_PG_ENTRIES)
1931 return;
1932
1933 /**
1934 * bw_pct ingnored - band-width percentage devision between user
1935 * priorities within the same group is not
1936 * standard and hence not supported
1937 *
1938 * prio_type igonred - priority levels within the same group are not
1939 * standard and hence are not supported. According
1940 * to the standard pgid 15 is dedicated to strict
1941 * prioirty traffic (on the port level).
1942 *
1943 * up_map ignored
1944 */
1945
1946 bp->dcbx_config_params.admin_configuration_ets_pg[prio] = pgid;
1947 bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1;
1948 }
1949
1950 static void bnx2x_dcbnl_set_pg_bwgcfg_tx(struct net_device *netdev,
1951 int pgid, u8 bw_pct)
1952 {
1953 struct bnx2x *bp = netdev_priv(netdev);
1954 DP(NETIF_MSG_LINK, "pgid[%d] = %d\n", pgid, bw_pct);
1955
1956 if (!bnx2x_dcbnl_set_valid(bp) || pgid >= DCBX_MAX_NUM_PG_BW_ENTRIES)
1957 return;
1958
1959 bp->dcbx_config_params.admin_configuration_bw_precentage[pgid] = bw_pct;
1960 bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1;
1961 }
1962
1963 static void bnx2x_dcbnl_set_pg_tccfg_rx(struct net_device *netdev, int prio,
1964 u8 prio_type, u8 pgid, u8 bw_pct,
1965 u8 up_map)
1966 {
1967 struct bnx2x *bp = netdev_priv(netdev);
1968 DP(NETIF_MSG_LINK, "Nothing to set; No RX support\n");
1969 }
1970
1971 static void bnx2x_dcbnl_set_pg_bwgcfg_rx(struct net_device *netdev,
1972 int pgid, u8 bw_pct)
1973 {
1974 struct bnx2x *bp = netdev_priv(netdev);
1975 DP(NETIF_MSG_LINK, "Nothing to set; No RX support\n");
1976 }
1977
1978 static void bnx2x_dcbnl_get_pg_tccfg_tx(struct net_device *netdev, int prio,
1979 u8 *prio_type, u8 *pgid, u8 *bw_pct,
1980 u8 *up_map)
1981 {
1982 struct bnx2x *bp = netdev_priv(netdev);
1983 DP(NETIF_MSG_LINK, "prio = %d\n", prio);
1984
1985 /**
1986 * bw_pct ingnored - band-width percentage devision between user
1987 * priorities within the same group is not
1988 * standard and hence not supported
1989 *
1990 * prio_type igonred - priority levels within the same group are not
1991 * standard and hence are not supported. According
1992 * to the standard pgid 15 is dedicated to strict
1993 * prioirty traffic (on the port level).
1994 *
1995 * up_map ignored
1996 */
1997 *up_map = *bw_pct = *prio_type = *pgid = 0;
1998
1999 if (!bp->dcb_state || prio >= DCBX_MAX_NUM_PRI_PG_ENTRIES)
2000 return;
2001
2002 *pgid = DCBX_PRI_PG_GET(bp->dcbx_local_feat.ets.pri_pg_tbl, prio);
2003 }
2004
2005 static void bnx2x_dcbnl_get_pg_bwgcfg_tx(struct net_device *netdev,
2006 int pgid, u8 *bw_pct)
2007 {
2008 struct bnx2x *bp = netdev_priv(netdev);
2009 DP(NETIF_MSG_LINK, "pgid = %d\n", pgid);
2010
2011 *bw_pct = 0;
2012
2013 if (!bp->dcb_state || pgid >= DCBX_MAX_NUM_PG_BW_ENTRIES)
2014 return;
2015
2016 *bw_pct = DCBX_PG_BW_GET(bp->dcbx_local_feat.ets.pg_bw_tbl, pgid);
2017 }
2018
2019 static void bnx2x_dcbnl_get_pg_tccfg_rx(struct net_device *netdev, int prio,
2020 u8 *prio_type, u8 *pgid, u8 *bw_pct,
2021 u8 *up_map)
2022 {
2023 struct bnx2x *bp = netdev_priv(netdev);
2024 DP(NETIF_MSG_LINK, "Nothing to get; No RX support\n");
2025
2026 *prio_type = *pgid = *bw_pct = *up_map = 0;
2027 }
2028
2029 static void bnx2x_dcbnl_get_pg_bwgcfg_rx(struct net_device *netdev,
2030 int pgid, u8 *bw_pct)
2031 {
2032 struct bnx2x *bp = netdev_priv(netdev);
2033 DP(NETIF_MSG_LINK, "Nothing to get; No RX support\n");
2034
2035 *bw_pct = 0;
2036 }
2037
2038 static void bnx2x_dcbnl_set_pfc_cfg(struct net_device *netdev, int prio,
2039 u8 setting)
2040 {
2041 struct bnx2x *bp = netdev_priv(netdev);
2042 DP(NETIF_MSG_LINK, "prio[%d] = %d\n", prio, setting);
2043
2044 if (!bnx2x_dcbnl_set_valid(bp) || prio >= MAX_PFC_PRIORITIES)
2045 return;
2046
2047 bp->dcbx_config_params.admin_pfc_bitmap |= ((setting ? 1 : 0) << prio);
2048
2049 if (setting)
2050 bp->dcbx_config_params.admin_pfc_tx_enable = 1;
2051 }
2052
2053 static void bnx2x_dcbnl_get_pfc_cfg(struct net_device *netdev, int prio,
2054 u8 *setting)
2055 {
2056 struct bnx2x *bp = netdev_priv(netdev);
2057 DP(NETIF_MSG_LINK, "prio = %d\n", prio);
2058
2059 *setting = 0;
2060
2061 if (!bp->dcb_state || prio >= MAX_PFC_PRIORITIES)
2062 return;
2063
2064 *setting = (bp->dcbx_local_feat.pfc.pri_en_bitmap >> prio) & 0x1;
2065 }
2066
2067 static u8 bnx2x_dcbnl_set_all(struct net_device *netdev)
2068 {
2069 struct bnx2x *bp = netdev_priv(netdev);
2070 int rc = 0;
2071
2072 DP(NETIF_MSG_LINK, "SET-ALL\n");
2073
2074 if (!bnx2x_dcbnl_set_valid(bp))
2075 return 1;
2076
2077 if (bp->recovery_state != BNX2X_RECOVERY_DONE) {
2078 netdev_err(bp->dev, "Handling parity error recovery. "
2079 "Try again later\n");
2080 return 1;
2081 }
2082 if (netif_running(bp->dev)) {
2083 bnx2x_nic_unload(bp, UNLOAD_NORMAL);
2084 rc = bnx2x_nic_load(bp, LOAD_NORMAL);
2085 }
2086 DP(NETIF_MSG_LINK, "set_dcbx_params done (%d)\n", rc);
2087 if (rc)
2088 return 1;
2089
2090 return 0;
2091 }
2092
2093 static u8 bnx2x_dcbnl_get_cap(struct net_device *netdev, int capid, u8 *cap)
2094 {
2095 struct bnx2x *bp = netdev_priv(netdev);
2096 u8 rval = 0;
2097
2098 if (bp->dcb_state) {
2099 switch (capid) {
2100 case DCB_CAP_ATTR_PG:
2101 *cap = true;
2102 break;
2103 case DCB_CAP_ATTR_PFC:
2104 *cap = true;
2105 break;
2106 case DCB_CAP_ATTR_UP2TC:
2107 *cap = false;
2108 break;
2109 case DCB_CAP_ATTR_PG_TCS:
2110 *cap = 0x80; /* 8 priorities for PGs */
2111 break;
2112 case DCB_CAP_ATTR_PFC_TCS:
2113 *cap = 0x80; /* 8 priorities for PFC */
2114 break;
2115 case DCB_CAP_ATTR_GSP:
2116 *cap = true;
2117 break;
2118 case DCB_CAP_ATTR_BCN:
2119 *cap = false;
2120 break;
2121 case DCB_CAP_ATTR_DCBX:
2122 *cap = BNX2X_DCBX_CAPS;
2123 default:
2124 rval = -EINVAL;
2125 break;
2126 }
2127 } else
2128 rval = -EINVAL;
2129
2130 DP(NETIF_MSG_LINK, "capid %d:%x\n", capid, *cap);
2131 return rval;
2132 }
2133
2134 static u8 bnx2x_dcbnl_get_numtcs(struct net_device *netdev, int tcid, u8 *num)
2135 {
2136 struct bnx2x *bp = netdev_priv(netdev);
2137 u8 rval = 0;
2138
2139 DP(NETIF_MSG_LINK, "tcid %d\n", tcid);
2140
2141 if (bp->dcb_state) {
2142 switch (tcid) {
2143 case DCB_NUMTCS_ATTR_PG:
2144 *num = CHIP_IS_E3B0(bp) ? DCBX_COS_MAX_NUM_E3B0 :
2145 DCBX_COS_MAX_NUM_E2;
2146 break;
2147 case DCB_NUMTCS_ATTR_PFC:
2148 *num = CHIP_IS_E3B0(bp) ? DCBX_COS_MAX_NUM_E3B0 :
2149 DCBX_COS_MAX_NUM_E2;
2150 break;
2151 default:
2152 rval = -EINVAL;
2153 break;
2154 }
2155 } else
2156 rval = -EINVAL;
2157
2158 return rval;
2159 }
2160
2161 static u8 bnx2x_dcbnl_set_numtcs(struct net_device *netdev, int tcid, u8 num)
2162 {
2163 struct bnx2x *bp = netdev_priv(netdev);
2164 DP(NETIF_MSG_LINK, "num tcs = %d; Not supported\n", num);
2165 return -EINVAL;
2166 }
2167
2168 static u8 bnx2x_dcbnl_get_pfc_state(struct net_device *netdev)
2169 {
2170 struct bnx2x *bp = netdev_priv(netdev);
2171 DP(NETIF_MSG_LINK, "state = %d\n", bp->dcbx_local_feat.pfc.enabled);
2172
2173 if (!bp->dcb_state)
2174 return 0;
2175
2176 return bp->dcbx_local_feat.pfc.enabled;
2177 }
2178
2179 static void bnx2x_dcbnl_set_pfc_state(struct net_device *netdev, u8 state)
2180 {
2181 struct bnx2x *bp = netdev_priv(netdev);
2182 DP(NETIF_MSG_LINK, "state = %s\n", state ? "on" : "off");
2183
2184 if (!bnx2x_dcbnl_set_valid(bp))
2185 return;
2186
2187 bp->dcbx_config_params.admin_pfc_tx_enable =
2188 bp->dcbx_config_params.admin_pfc_enable = (state ? 1 : 0);
2189 }
2190
2191 static void bnx2x_admin_app_set_ent(
2192 struct bnx2x_admin_priority_app_table *app_ent,
2193 u8 idtype, u16 idval, u8 up)
2194 {
2195 app_ent->valid = 1;
2196
2197 switch (idtype) {
2198 case DCB_APP_IDTYPE_ETHTYPE:
2199 app_ent->traffic_type = TRAFFIC_TYPE_ETH;
2200 break;
2201 case DCB_APP_IDTYPE_PORTNUM:
2202 app_ent->traffic_type = TRAFFIC_TYPE_PORT;
2203 break;
2204 default:
2205 break; /* never gets here */
2206 }
2207 app_ent->app_id = idval;
2208 app_ent->priority = up;
2209 }
2210
2211 static bool bnx2x_admin_app_is_equal(
2212 struct bnx2x_admin_priority_app_table *app_ent,
2213 u8 idtype, u16 idval)
2214 {
2215 if (!app_ent->valid)
2216 return false;
2217
2218 switch (idtype) {
2219 case DCB_APP_IDTYPE_ETHTYPE:
2220 if (app_ent->traffic_type != TRAFFIC_TYPE_ETH)
2221 return false;
2222 break;
2223 case DCB_APP_IDTYPE_PORTNUM:
2224 if (app_ent->traffic_type != TRAFFIC_TYPE_PORT)
2225 return false;
2226 break;
2227 default:
2228 return false;
2229 }
2230 if (app_ent->app_id != idval)
2231 return false;
2232
2233 return true;
2234 }
2235
2236 static int bnx2x_set_admin_app_up(struct bnx2x *bp, u8 idtype, u16 idval, u8 up)
2237 {
2238 int i, ff;
2239
2240 /* iterate over the app entries looking for idtype and idval */
2241 for (i = 0, ff = -1; i < 4; i++) {
2242 struct bnx2x_admin_priority_app_table *app_ent =
2243 &bp->dcbx_config_params.admin_priority_app_table[i];
2244 if (bnx2x_admin_app_is_equal(app_ent, idtype, idval))
2245 break;
2246
2247 if (ff < 0 && !app_ent->valid)
2248 ff = i;
2249 }
2250 if (i < 4)
2251 /* if found overwrite up */
2252 bp->dcbx_config_params.
2253 admin_priority_app_table[i].priority = up;
2254 else if (ff >= 0)
2255 /* not found use first-free */
2256 bnx2x_admin_app_set_ent(
2257 &bp->dcbx_config_params.admin_priority_app_table[ff],
2258 idtype, idval, up);
2259 else
2260 /* app table is full */
2261 return -EBUSY;
2262
2263 /* up configured, if not 0 make sure feature is enabled */
2264 if (up)
2265 bp->dcbx_config_params.admin_application_priority_tx_enable = 1;
2266
2267 return 0;
2268 }
2269
2270 static u8 bnx2x_dcbnl_set_app_up(struct net_device *netdev, u8 idtype,
2271 u16 idval, u8 up)
2272 {
2273 struct bnx2x *bp = netdev_priv(netdev);
2274
2275 DP(NETIF_MSG_LINK, "app_type %d, app_id %x, prio bitmap %d\n",
2276 idtype, idval, up);
2277
2278 if (!bnx2x_dcbnl_set_valid(bp))
2279 return -EINVAL;
2280
2281 /* verify idtype */
2282 switch (idtype) {
2283 case DCB_APP_IDTYPE_ETHTYPE:
2284 case DCB_APP_IDTYPE_PORTNUM:
2285 break;
2286 default:
2287 return -EINVAL;
2288 }
2289 return bnx2x_set_admin_app_up(bp, idtype, idval, up);
2290 }
2291
2292 static u8 bnx2x_dcbnl_get_dcbx(struct net_device *netdev)
2293 {
2294 struct bnx2x *bp = netdev_priv(netdev);
2295 u8 state;
2296
2297 state = DCB_CAP_DCBX_LLD_MANAGED | DCB_CAP_DCBX_VER_CEE;
2298
2299 if (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_OFF)
2300 state |= DCB_CAP_DCBX_STATIC;
2301
2302 return state;
2303 }
2304
2305 static u8 bnx2x_dcbnl_set_dcbx(struct net_device *netdev, u8 state)
2306 {
2307 struct bnx2x *bp = netdev_priv(netdev);
2308 DP(NETIF_MSG_LINK, "state = %02x\n", state);
2309
2310 /* set dcbx mode */
2311
2312 if ((state & BNX2X_DCBX_CAPS) != state) {
2313 BNX2X_ERR("Requested DCBX mode %x is beyond advertised "
2314 "capabilities\n", state);
2315 return 1;
2316 }
2317
2318 if (bp->dcb_state != BNX2X_DCB_STATE_ON) {
2319 BNX2X_ERR("DCB turned off, DCBX configuration is invalid\n");
2320 return 1;
2321 }
2322
2323 if (state & DCB_CAP_DCBX_STATIC)
2324 bp->dcbx_enabled = BNX2X_DCBX_ENABLED_ON_NEG_OFF;
2325 else
2326 bp->dcbx_enabled = BNX2X_DCBX_ENABLED_ON_NEG_ON;
2327
2328 bp->dcbx_mode_uset = true;
2329 return 0;
2330 }
2331
2332 static u8 bnx2x_dcbnl_get_featcfg(struct net_device *netdev, int featid,
2333 u8 *flags)
2334 {
2335 struct bnx2x *bp = netdev_priv(netdev);
2336 u8 rval = 0;
2337
2338 DP(NETIF_MSG_LINK, "featid %d\n", featid);
2339
2340 if (bp->dcb_state) {
2341 *flags = 0;
2342 switch (featid) {
2343 case DCB_FEATCFG_ATTR_PG:
2344 if (bp->dcbx_local_feat.ets.enabled)
2345 *flags |= DCB_FEATCFG_ENABLE;
2346 if (bp->dcbx_error & DCBX_LOCAL_ETS_ERROR)
2347 *flags |= DCB_FEATCFG_ERROR;
2348 break;
2349 case DCB_FEATCFG_ATTR_PFC:
2350 if (bp->dcbx_local_feat.pfc.enabled)
2351 *flags |= DCB_FEATCFG_ENABLE;
2352 if (bp->dcbx_error & (DCBX_LOCAL_PFC_ERROR |
2353 DCBX_LOCAL_PFC_MISMATCH))
2354 *flags |= DCB_FEATCFG_ERROR;
2355 break;
2356 case DCB_FEATCFG_ATTR_APP:
2357 if (bp->dcbx_local_feat.app.enabled)
2358 *flags |= DCB_FEATCFG_ENABLE;
2359 if (bp->dcbx_error & (DCBX_LOCAL_APP_ERROR |
2360 DCBX_LOCAL_APP_MISMATCH))
2361 *flags |= DCB_FEATCFG_ERROR;
2362 break;
2363 default:
2364 rval = -EINVAL;
2365 break;
2366 }
2367 } else
2368 rval = -EINVAL;
2369
2370 return rval;
2371 }
2372
2373 static u8 bnx2x_dcbnl_set_featcfg(struct net_device *netdev, int featid,
2374 u8 flags)
2375 {
2376 struct bnx2x *bp = netdev_priv(netdev);
2377 u8 rval = 0;
2378
2379 DP(NETIF_MSG_LINK, "featid = %d flags = %02x\n", featid, flags);
2380
2381 /* ignore the 'advertise' flag */
2382 if (bnx2x_dcbnl_set_valid(bp)) {
2383 switch (featid) {
2384 case DCB_FEATCFG_ATTR_PG:
2385 bp->dcbx_config_params.admin_ets_enable =
2386 flags & DCB_FEATCFG_ENABLE ? 1 : 0;
2387 bp->dcbx_config_params.admin_ets_willing =
2388 flags & DCB_FEATCFG_WILLING ? 1 : 0;
2389 break;
2390 case DCB_FEATCFG_ATTR_PFC:
2391 bp->dcbx_config_params.admin_pfc_enable =
2392 flags & DCB_FEATCFG_ENABLE ? 1 : 0;
2393 bp->dcbx_config_params.admin_pfc_willing =
2394 flags & DCB_FEATCFG_WILLING ? 1 : 0;
2395 break;
2396 case DCB_FEATCFG_ATTR_APP:
2397 /* ignore enable, always enabled */
2398 bp->dcbx_config_params.admin_app_priority_willing =
2399 flags & DCB_FEATCFG_WILLING ? 1 : 0;
2400 break;
2401 default:
2402 rval = -EINVAL;
2403 break;
2404 }
2405 } else
2406 rval = -EINVAL;
2407
2408 return rval;
2409 }
2410
2411 static int bnx2x_peer_appinfo(struct net_device *netdev,
2412 struct dcb_peer_app_info *info, u16* app_count)
2413 {
2414 int i;
2415 struct bnx2x *bp = netdev_priv(netdev);
2416
2417 DP(NETIF_MSG_LINK, "APP-INFO\n");
2418
2419 info->willing = (bp->dcbx_remote_flags & DCBX_APP_REM_WILLING) ?: 0;
2420 info->error = (bp->dcbx_remote_flags & DCBX_APP_RX_ERROR) ?: 0;
2421 *app_count = 0;
2422
2423 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++)
2424 if (bp->dcbx_remote_feat.app.app_pri_tbl[i].appBitfield &
2425 DCBX_APP_ENTRY_VALID)
2426 (*app_count)++;
2427 return 0;
2428 }
2429
2430 static int bnx2x_peer_apptable(struct net_device *netdev,
2431 struct dcb_app *table)
2432 {
2433 int i, j;
2434 struct bnx2x *bp = netdev_priv(netdev);
2435
2436 DP(NETIF_MSG_LINK, "APP-TABLE\n");
2437
2438 for (i = 0, j = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
2439 struct dcbx_app_priority_entry *ent =
2440 &bp->dcbx_remote_feat.app.app_pri_tbl[i];
2441
2442 if (ent->appBitfield & DCBX_APP_ENTRY_VALID) {
2443 table[j].selector = bnx2x_dcbx_dcbnl_app_idtype(ent);
2444 table[j].priority = bnx2x_dcbx_dcbnl_app_up(ent);
2445 table[j++].protocol = ent->app_id;
2446 }
2447 }
2448 return 0;
2449 }
2450
2451 static int bnx2x_cee_peer_getpg(struct net_device *netdev, struct cee_pg *pg)
2452 {
2453 int i;
2454 struct bnx2x *bp = netdev_priv(netdev);
2455
2456 pg->willing = (bp->dcbx_remote_flags & DCBX_ETS_REM_WILLING) ?: 0;
2457
2458 for (i = 0; i < CEE_DCBX_MAX_PGS; i++) {
2459 pg->pg_bw[i] =
2460 DCBX_PG_BW_GET(bp->dcbx_remote_feat.ets.pg_bw_tbl, i);
2461 pg->prio_pg[i] =
2462 DCBX_PRI_PG_GET(bp->dcbx_remote_feat.ets.pri_pg_tbl, i);
2463 }
2464 return 0;
2465 }
2466
2467 static int bnx2x_cee_peer_getpfc(struct net_device *netdev,
2468 struct cee_pfc *pfc)
2469 {
2470 struct bnx2x *bp = netdev_priv(netdev);
2471 pfc->tcs_supported = bp->dcbx_remote_feat.pfc.pfc_caps;
2472 pfc->pfc_en = bp->dcbx_remote_feat.pfc.pri_en_bitmap;
2473 return 0;
2474 }
2475
2476 const struct dcbnl_rtnl_ops bnx2x_dcbnl_ops = {
2477 .getstate = bnx2x_dcbnl_get_state,
2478 .setstate = bnx2x_dcbnl_set_state,
2479 .getpermhwaddr = bnx2x_dcbnl_get_perm_hw_addr,
2480 .setpgtccfgtx = bnx2x_dcbnl_set_pg_tccfg_tx,
2481 .setpgbwgcfgtx = bnx2x_dcbnl_set_pg_bwgcfg_tx,
2482 .setpgtccfgrx = bnx2x_dcbnl_set_pg_tccfg_rx,
2483 .setpgbwgcfgrx = bnx2x_dcbnl_set_pg_bwgcfg_rx,
2484 .getpgtccfgtx = bnx2x_dcbnl_get_pg_tccfg_tx,
2485 .getpgbwgcfgtx = bnx2x_dcbnl_get_pg_bwgcfg_tx,
2486 .getpgtccfgrx = bnx2x_dcbnl_get_pg_tccfg_rx,
2487 .getpgbwgcfgrx = bnx2x_dcbnl_get_pg_bwgcfg_rx,
2488 .setpfccfg = bnx2x_dcbnl_set_pfc_cfg,
2489 .getpfccfg = bnx2x_dcbnl_get_pfc_cfg,
2490 .setall = bnx2x_dcbnl_set_all,
2491 .getcap = bnx2x_dcbnl_get_cap,
2492 .getnumtcs = bnx2x_dcbnl_get_numtcs,
2493 .setnumtcs = bnx2x_dcbnl_set_numtcs,
2494 .getpfcstate = bnx2x_dcbnl_get_pfc_state,
2495 .setpfcstate = bnx2x_dcbnl_set_pfc_state,
2496 .setapp = bnx2x_dcbnl_set_app_up,
2497 .getdcbx = bnx2x_dcbnl_get_dcbx,
2498 .setdcbx = bnx2x_dcbnl_set_dcbx,
2499 .getfeatcfg = bnx2x_dcbnl_get_featcfg,
2500 .setfeatcfg = bnx2x_dcbnl_set_featcfg,
2501 .peer_getappinfo = bnx2x_peer_appinfo,
2502 .peer_getapptable = bnx2x_peer_apptable,
2503 .cee_peer_getpg = bnx2x_cee_peer_getpg,
2504 .cee_peer_getpfc = bnx2x_cee_peer_getpfc,
2505 };
2506
2507 #endif /* BCM_DCBNL */
linux-next