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cris: add arch/cris/include/asm/serial.h
[linux-2.6/next.git] / drivers / net / e1000e / e1000.h
blob8533ad7f3559030444d962d82ce3e1f43439e48e
1 /*******************************************************************************
2
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2011 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 /* Linux PRO/1000 Ethernet Driver main header file */
30
31 #ifndef _E1000_H_
32 #define _E1000_H_
33
34 #include <linux/bitops.h>
35 #include <linux/types.h>
36 #include <linux/timer.h>
37 #include <linux/workqueue.h>
38 #include <linux/io.h>
39 #include <linux/netdevice.h>
40 #include <linux/pci.h>
41 #include <linux/pci-aspm.h>
42 #include <linux/crc32.h>
43 #include <linux/if_vlan.h>
44
45 #include "hw.h"
46
47 struct e1000_info;
48
49 #define e_dbg(format, arg...) \
50 netdev_dbg(hw->adapter->netdev, format, ## arg)
51 #define e_err(format, arg...) \
52 netdev_err(adapter->netdev, format, ## arg)
53 #define e_info(format, arg...) \
54 netdev_info(adapter->netdev, format, ## arg)
55 #define e_warn(format, arg...) \
56 netdev_warn(adapter->netdev, format, ## arg)
57 #define e_notice(format, arg...) \
58 netdev_notice(adapter->netdev, format, ## arg)
59
60
61 /* Interrupt modes, as used by the IntMode parameter */
62 #define E1000E_INT_MODE_LEGACY 0
63 #define E1000E_INT_MODE_MSI 1
64 #define E1000E_INT_MODE_MSIX 2
65
66 /* Tx/Rx descriptor defines */
67 #define E1000_DEFAULT_TXD 256
68 #define E1000_MAX_TXD 4096
69 #define E1000_MIN_TXD 64
70
71 #define E1000_DEFAULT_RXD 256
72 #define E1000_MAX_RXD 4096
73 #define E1000_MIN_RXD 64
74
75 #define E1000_MIN_ITR_USECS 10 /* 100000 irq/sec */
76 #define E1000_MAX_ITR_USECS 10000 /* 100 irq/sec */
77
78 /* Early Receive defines */
79 #define E1000_ERT_2048 0x100
80
81 #define E1000_FC_PAUSE_TIME 0x0680 /* 858 usec */
82
83 /* How many Tx Descriptors do we need to call netif_wake_queue ? */
84 /* How many Rx Buffers do we bundle into one write to the hardware ? */
85 #define E1000_RX_BUFFER_WRITE 16 /* Must be power of 2 */
86
87 #define AUTO_ALL_MODES 0
88 #define E1000_EEPROM_APME 0x0400
89
90 #define E1000_MNG_VLAN_NONE (-1)
91
92 /* Number of packet split data buffers (not including the header buffer) */
93 #define PS_PAGE_BUFFERS (MAX_PS_BUFFERS - 1)
94
95 #define DEFAULT_JUMBO 9234
96
97 /* BM/HV Specific Registers */
98 #define BM_PORT_CTRL_PAGE 769
99
100 #define PHY_UPPER_SHIFT 21
101 #define BM_PHY_REG(page, reg) \
102 (((reg) & MAX_PHY_REG_ADDRESS) |\
103 (((page) & 0xFFFF) << PHY_PAGE_SHIFT) |\
104 (((reg) & ~MAX_PHY_REG_ADDRESS) << (PHY_UPPER_SHIFT - PHY_PAGE_SHIFT)))
105
106 /* PHY Wakeup Registers and defines */
107 #define BM_PORT_GEN_CFG PHY_REG(BM_PORT_CTRL_PAGE, 17)
108 #define BM_RCTL PHY_REG(BM_WUC_PAGE, 0)
109 #define BM_WUC PHY_REG(BM_WUC_PAGE, 1)
110 #define BM_WUFC PHY_REG(BM_WUC_PAGE, 2)
111 #define BM_WUS PHY_REG(BM_WUC_PAGE, 3)
112 #define BM_RAR_L(_i) (BM_PHY_REG(BM_WUC_PAGE, 16 + ((_i) << 2)))
113 #define BM_RAR_M(_i) (BM_PHY_REG(BM_WUC_PAGE, 17 + ((_i) << 2)))
114 #define BM_RAR_H(_i) (BM_PHY_REG(BM_WUC_PAGE, 18 + ((_i) << 2)))
115 #define BM_RAR_CTRL(_i) (BM_PHY_REG(BM_WUC_PAGE, 19 + ((_i) << 2)))
116 #define BM_MTA(_i) (BM_PHY_REG(BM_WUC_PAGE, 128 + ((_i) << 1)))
117
118 #define BM_RCTL_UPE 0x0001 /* Unicast Promiscuous Mode */
119 #define BM_RCTL_MPE 0x0002 /* Multicast Promiscuous Mode */
120 #define BM_RCTL_MO_SHIFT 3 /* Multicast Offset Shift */
121 #define BM_RCTL_MO_MASK (3 << 3) /* Multicast Offset Mask */
122 #define BM_RCTL_BAM 0x0020 /* Broadcast Accept Mode */
123 #define BM_RCTL_PMCF 0x0040 /* Pass MAC Control Frames */
124 #define BM_RCTL_RFCE 0x0080 /* Rx Flow Control Enable */
125
126 #define HV_STATS_PAGE 778
127 #define HV_SCC_UPPER PHY_REG(HV_STATS_PAGE, 16) /* Single Collision Count */
128 #define HV_SCC_LOWER PHY_REG(HV_STATS_PAGE, 17)
129 #define HV_ECOL_UPPER PHY_REG(HV_STATS_PAGE, 18) /* Excessive Coll. Count */
130 #define HV_ECOL_LOWER PHY_REG(HV_STATS_PAGE, 19)
131 #define HV_MCC_UPPER PHY_REG(HV_STATS_PAGE, 20) /* Multiple Coll. Count */
132 #define HV_MCC_LOWER PHY_REG(HV_STATS_PAGE, 21)
133 #define HV_LATECOL_UPPER PHY_REG(HV_STATS_PAGE, 23) /* Late Collision Count */
134 #define HV_LATECOL_LOWER PHY_REG(HV_STATS_PAGE, 24)
135 #define HV_COLC_UPPER PHY_REG(HV_STATS_PAGE, 25) /* Collision Count */
136 #define HV_COLC_LOWER PHY_REG(HV_STATS_PAGE, 26)
137 #define HV_DC_UPPER PHY_REG(HV_STATS_PAGE, 27) /* Defer Count */
138 #define HV_DC_LOWER PHY_REG(HV_STATS_PAGE, 28)
139 #define HV_TNCRS_UPPER PHY_REG(HV_STATS_PAGE, 29) /* Transmit with no CRS */
140 #define HV_TNCRS_LOWER PHY_REG(HV_STATS_PAGE, 30)
141
142 #define E1000_FCRTV_PCH 0x05F40 /* PCH Flow Control Refresh Timer Value */
143
144 /* BM PHY Copper Specific Status */
145 #define BM_CS_STATUS 17
146 #define BM_CS_STATUS_LINK_UP 0x0400
147 #define BM_CS_STATUS_RESOLVED 0x0800
148 #define BM_CS_STATUS_SPEED_MASK 0xC000
149 #define BM_CS_STATUS_SPEED_1000 0x8000
150
151 /* 82577 Mobile Phy Status Register */
152 #define HV_M_STATUS 26
153 #define HV_M_STATUS_AUTONEG_COMPLETE 0x1000
154 #define HV_M_STATUS_SPEED_MASK 0x0300
155 #define HV_M_STATUS_SPEED_1000 0x0200
156 #define HV_M_STATUS_LINK_UP 0x0040
157
158 #define E1000_ICH_FWSM_PCIM2PCI 0x01000000 /* ME PCIm-to-PCI active */
159 #define E1000_ICH_FWSM_PCIM2PCI_COUNT 2000
160
161 /* Time to wait before putting the device into D3 if there's no link (in ms). */
162 #define LINK_TIMEOUT 100
163
164 #define DEFAULT_RDTR 0
165 #define DEFAULT_RADV 8
166 #define BURST_RDTR 0x20
167 #define BURST_RADV 0x20
168
169 /*
170 * in the case of WTHRESH, it appears at least the 82571/2 hardware
171 * writes back 4 descriptors when WTHRESH=5, and 3 descriptors when
172 * WTHRESH=4, and since we want 64 bytes at a time written back, set
173 * it to 5
174 */
175 #define E1000_TXDCTL_DMA_BURST_ENABLE \
176 (E1000_TXDCTL_GRAN | /* set descriptor granularity */ \
177 E1000_TXDCTL_COUNT_DESC | \
178 (5 << 16) | /* wthresh must be +1 more than desired */\
179 (1 << 8) | /* hthresh */ \
180 0x1f) /* pthresh */
181
182 #define E1000_RXDCTL_DMA_BURST_ENABLE \
183 (0x01000000 | /* set descriptor granularity */ \
184 (4 << 16) | /* set writeback threshold */ \
185 (4 << 8) | /* set prefetch threshold */ \
186 0x20) /* set hthresh */
187
188 #define E1000_TIDV_FPD (1 << 31)
189 #define E1000_RDTR_FPD (1 << 31)
190
191 enum e1000_boards {
192 board_82571,
193 board_82572,
194 board_82573,
195 board_82574,
196 board_82583,
197 board_80003es2lan,
198 board_ich8lan,
199 board_ich9lan,
200 board_ich10lan,
201 board_pchlan,
202 board_pch2lan,
203 };
204
205 struct e1000_ps_page {
206 struct page *page;
207 u64 dma; /* must be u64 - written to hw */
208 };
209
210 /*
211 * wrappers around a pointer to a socket buffer,
212 * so a DMA handle can be stored along with the buffer
213 */
214 struct e1000_buffer {
215 dma_addr_t dma;
216 struct sk_buff *skb;
217 union {
218 /* Tx */
219 struct {
220 unsigned long time_stamp;
221 u16 length;
222 u16 next_to_watch;
223 unsigned int segs;
224 unsigned int bytecount;
225 u16 mapped_as_page;
226 };
227 /* Rx */
228 struct {
229 /* arrays of page information for packet split */
230 struct e1000_ps_page *ps_pages;
231 struct page *page;
232 };
233 };
234 };
235
236 struct e1000_ring {
237 void *desc; /* pointer to ring memory */
238 dma_addr_t dma; /* phys address of ring */
239 unsigned int size; /* length of ring in bytes */
240 unsigned int count; /* number of desc. in ring */
241
242 u16 next_to_use;
243 u16 next_to_clean;
244
245 u16 head;
246 u16 tail;
247
248 /* array of buffer information structs */
249 struct e1000_buffer *buffer_info;
250
251 char name[IFNAMSIZ + 5];
252 u32 ims_val;
253 u32 itr_val;
254 u16 itr_register;
255 int set_itr;
256
257 struct sk_buff *rx_skb_top;
258 };
259
260 /* PHY register snapshot values */
261 struct e1000_phy_regs {
262 u16 bmcr; /* basic mode control register */
263 u16 bmsr; /* basic mode status register */
264 u16 advertise; /* auto-negotiation advertisement */
265 u16 lpa; /* link partner ability register */
266 u16 expansion; /* auto-negotiation expansion reg */
267 u16 ctrl1000; /* 1000BASE-T control register */
268 u16 stat1000; /* 1000BASE-T status register */
269 u16 estatus; /* extended status register */
270 };
271
272 /* board specific private data structure */
273 struct e1000_adapter {
274 struct timer_list watchdog_timer;
275 struct timer_list phy_info_timer;
276 struct timer_list blink_timer;
277
278 struct work_struct reset_task;
279 struct work_struct watchdog_task;
280
281 const struct e1000_info *ei;
282
283 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
284 u32 bd_number;
285 u32 rx_buffer_len;
286 u16 mng_vlan_id;
287 u16 link_speed;
288 u16 link_duplex;
289 u16 eeprom_vers;
290
291 /* track device up/down/testing state */
292 unsigned long state;
293
294 /* Interrupt Throttle Rate */
295 u32 itr;
296 u32 itr_setting;
297 u16 tx_itr;
298 u16 rx_itr;
299
300 /*
301 * Tx
302 */
303 struct e1000_ring *tx_ring /* One per active queue */
304 ____cacheline_aligned_in_smp;
305
306 struct napi_struct napi;
307
308 unsigned int restart_queue;
309 u32 txd_cmd;
310
311 bool detect_tx_hung;
312 u8 tx_timeout_factor;
313
314 u32 tx_int_delay;
315 u32 tx_abs_int_delay;
316
317 unsigned int total_tx_bytes;
318 unsigned int total_tx_packets;
319 unsigned int total_rx_bytes;
320 unsigned int total_rx_packets;
321
322 /* Tx stats */
323 u64 tpt_old;
324 u64 colc_old;
325 u32 gotc;
326 u64 gotc_old;
327 u32 tx_timeout_count;
328 u32 tx_fifo_head;
329 u32 tx_head_addr;
330 u32 tx_fifo_size;
331 u32 tx_dma_failed;
332
333 /*
334 * Rx
335 */
336 bool (*clean_rx) (struct e1000_adapter *adapter,
337 int *work_done, int work_to_do)
338 ____cacheline_aligned_in_smp;
339 void (*alloc_rx_buf) (struct e1000_adapter *adapter,
340 int cleaned_count, gfp_t gfp);
341 struct e1000_ring *rx_ring;
342
343 u32 rx_int_delay;
344 u32 rx_abs_int_delay;
345
346 /* Rx stats */
347 u64 hw_csum_err;
348 u64 hw_csum_good;
349 u64 rx_hdr_split;
350 u32 gorc;
351 u64 gorc_old;
352 u32 alloc_rx_buff_failed;
353 u32 rx_dma_failed;
354
355 unsigned int rx_ps_pages;
356 u16 rx_ps_bsize0;
357 u32 max_frame_size;
358 u32 min_frame_size;
359
360 /* OS defined structs */
361 struct net_device *netdev;
362 struct pci_dev *pdev;
363
364 /* structs defined in e1000_hw.h */
365 struct e1000_hw hw;
366
367 spinlock_t stats64_lock;
368 struct e1000_hw_stats stats;
369 struct e1000_phy_info phy_info;
370 struct e1000_phy_stats phy_stats;
371
372 /* Snapshot of PHY registers */
373 struct e1000_phy_regs phy_regs;
374
375 struct e1000_ring test_tx_ring;
376 struct e1000_ring test_rx_ring;
377 u32 test_icr;
378
379 u32 msg_enable;
380 unsigned int num_vectors;
381 struct msix_entry *msix_entries;
382 int int_mode;
383 u32 eiac_mask;
384
385 u32 eeprom_wol;
386 u32 wol;
387 u32 pba;
388 u32 max_hw_frame_size;
389
390 bool fc_autoneg;
391
392 unsigned int flags;
393 unsigned int flags2;
394 struct work_struct downshift_task;
395 struct work_struct update_phy_task;
396 struct work_struct print_hang_task;
397
398 bool idle_check;
399 int phy_hang_count;
400 };
401
402 struct e1000_info {
403 enum e1000_mac_type mac;
404 unsigned int flags;
405 unsigned int flags2;
406 u32 pba;
407 u32 max_hw_frame_size;
408 s32 (*get_variants)(struct e1000_adapter *);
409 struct e1000_mac_operations *mac_ops;
410 struct e1000_phy_operations *phy_ops;
411 struct e1000_nvm_operations *nvm_ops;
412 };
413
414 /* hardware capability, feature, and workaround flags */
415 #define FLAG_HAS_AMT (1 << 0)
416 #define FLAG_HAS_FLASH (1 << 1)
417 #define FLAG_HAS_HW_VLAN_FILTER (1 << 2)
418 #define FLAG_HAS_WOL (1 << 3)
419 #define FLAG_HAS_ERT (1 << 4)
420 #define FLAG_HAS_CTRLEXT_ON_LOAD (1 << 5)
421 #define FLAG_HAS_SWSM_ON_LOAD (1 << 6)
422 #define FLAG_HAS_JUMBO_FRAMES (1 << 7)
423 #define FLAG_READ_ONLY_NVM (1 << 8)
424 #define FLAG_IS_ICH (1 << 9)
425 #define FLAG_HAS_MSIX (1 << 10)
426 #define FLAG_HAS_SMART_POWER_DOWN (1 << 11)
427 #define FLAG_IS_QUAD_PORT_A (1 << 12)
428 #define FLAG_IS_QUAD_PORT (1 << 13)
429 #define FLAG_TIPG_MEDIUM_FOR_80003ESLAN (1 << 14)
430 #define FLAG_APME_IN_WUC (1 << 15)
431 #define FLAG_APME_IN_CTRL3 (1 << 16)
432 #define FLAG_APME_CHECK_PORT_B (1 << 17)
433 #define FLAG_DISABLE_FC_PAUSE_TIME (1 << 18)
434 #define FLAG_NO_WAKE_UCAST (1 << 19)
435 #define FLAG_MNG_PT_ENABLED (1 << 20)
436 #define FLAG_RESET_OVERWRITES_LAA (1 << 21)
437 #define FLAG_TARC_SPEED_MODE_BIT (1 << 22)
438 #define FLAG_TARC_SET_BIT_ZERO (1 << 23)
439 #define FLAG_RX_NEEDS_RESTART (1 << 24)
440 #define FLAG_LSC_GIG_SPEED_DROP (1 << 25)
441 #define FLAG_SMART_POWER_DOWN (1 << 26)
442 #define FLAG_MSI_ENABLED (1 << 27)
443 #define FLAG_RX_CSUM_ENABLED (1 << 28)
444 #define FLAG_TSO_FORCE (1 << 29)
445 #define FLAG_RX_RESTART_NOW (1 << 30)
446 #define FLAG_MSI_TEST_FAILED (1 << 31)
447
448 /* CRC Stripping defines */
449 #define FLAG2_CRC_STRIPPING (1 << 0)
450 #define FLAG2_HAS_PHY_WAKEUP (1 << 1)
451 #define FLAG2_IS_DISCARDING (1 << 2)
452 #define FLAG2_DISABLE_ASPM_L1 (1 << 3)
453 #define FLAG2_HAS_PHY_STATS (1 << 4)
454 #define FLAG2_HAS_EEE (1 << 5)
455 #define FLAG2_DMA_BURST (1 << 6)
456 #define FLAG2_DISABLE_ASPM_L0S (1 << 7)
457 #define FLAG2_DISABLE_AIM (1 << 8)
458 #define FLAG2_CHECK_PHY_HANG (1 << 9)
459 #define FLAG2_NO_DISABLE_RX (1 << 10)
460 #define FLAG2_PCIM2PCI_ARBITER_WA (1 << 11)
461
462 #define E1000_RX_DESC_PS(R, i) \
463 (&(((union e1000_rx_desc_packet_split *)((R).desc))[i]))
464 #define E1000_GET_DESC(R, i, type) (&(((struct type *)((R).desc))[i]))
465 #define E1000_RX_DESC(R, i) E1000_GET_DESC(R, i, e1000_rx_desc)
466 #define E1000_TX_DESC(R, i) E1000_GET_DESC(R, i, e1000_tx_desc)
467 #define E1000_CONTEXT_DESC(R, i) E1000_GET_DESC(R, i, e1000_context_desc)
468
469 enum e1000_state_t {
470 __E1000_TESTING,
471 __E1000_RESETTING,
472 __E1000_DOWN
473 };
474
475 enum latency_range {
476 lowest_latency = 0,
477 low_latency = 1,
478 bulk_latency = 2,
479 latency_invalid = 255
480 };
481
482 extern char e1000e_driver_name[];
483 extern const char e1000e_driver_version[];
484
485 extern void e1000e_check_options(struct e1000_adapter *adapter);
486 extern void e1000e_set_ethtool_ops(struct net_device *netdev);
487
488 extern int e1000e_up(struct e1000_adapter *adapter);
489 extern void e1000e_down(struct e1000_adapter *adapter);
490 extern void e1000e_reinit_locked(struct e1000_adapter *adapter);
491 extern void e1000e_reset(struct e1000_adapter *adapter);
492 extern void e1000e_power_up_phy(struct e1000_adapter *adapter);
493 extern int e1000e_setup_rx_resources(struct e1000_adapter *adapter);
494 extern int e1000e_setup_tx_resources(struct e1000_adapter *adapter);
495 extern void e1000e_free_rx_resources(struct e1000_adapter *adapter);
496 extern void e1000e_free_tx_resources(struct e1000_adapter *adapter);
497 extern struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev,
498 struct rtnl_link_stats64
499 *stats);
500 extern void e1000e_set_interrupt_capability(struct e1000_adapter *adapter);
501 extern void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter);
502 extern void e1000e_get_hw_control(struct e1000_adapter *adapter);
503 extern void e1000e_release_hw_control(struct e1000_adapter *adapter);
504
505 extern unsigned int copybreak;
506
507 extern char *e1000e_get_hw_dev_name(struct e1000_hw *hw);
508
509 extern struct e1000_info e1000_82571_info;
510 extern struct e1000_info e1000_82572_info;
511 extern struct e1000_info e1000_82573_info;
512 extern struct e1000_info e1000_82574_info;
513 extern struct e1000_info e1000_82583_info;
514 extern struct e1000_info e1000_ich8_info;
515 extern struct e1000_info e1000_ich9_info;
516 extern struct e1000_info e1000_ich10_info;
517 extern struct e1000_info e1000_pch_info;
518 extern struct e1000_info e1000_pch2_info;
519 extern struct e1000_info e1000_es2_info;
520
521 extern s32 e1000_read_pba_string_generic(struct e1000_hw *hw, u8 *pba_num,
522 u32 pba_num_size);
523
524 extern s32 e1000e_commit_phy(struct e1000_hw *hw);
525
526 extern bool e1000e_enable_mng_pass_thru(struct e1000_hw *hw);
527
528 extern bool e1000e_get_laa_state_82571(struct e1000_hw *hw);
529 extern void e1000e_set_laa_state_82571(struct e1000_hw *hw, bool state);
530
531 extern void e1000e_write_protect_nvm_ich8lan(struct e1000_hw *hw);
532 extern void e1000e_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw,
533 bool state);
534 extern void e1000e_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw);
535 extern void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw *hw);
536 extern void e1000_suspend_workarounds_ich8lan(struct e1000_hw *hw);
537 extern void e1000_resume_workarounds_pchlan(struct e1000_hw *hw);
538 extern s32 e1000_configure_k1_ich8lan(struct e1000_hw *hw, bool k1_enable);
539 extern s32 e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw *hw, bool enable);
540 extern void e1000_copy_rx_addrs_to_phy_ich8lan(struct e1000_hw *hw);
541
542 extern s32 e1000e_check_for_copper_link(struct e1000_hw *hw);
543 extern s32 e1000e_check_for_fiber_link(struct e1000_hw *hw);
544 extern s32 e1000e_check_for_serdes_link(struct e1000_hw *hw);
545 extern s32 e1000e_setup_led_generic(struct e1000_hw *hw);
546 extern s32 e1000e_cleanup_led_generic(struct e1000_hw *hw);
547 extern s32 e1000e_led_on_generic(struct e1000_hw *hw);
548 extern s32 e1000e_led_off_generic(struct e1000_hw *hw);
549 extern s32 e1000e_get_bus_info_pcie(struct e1000_hw *hw);
550 extern void e1000_set_lan_id_multi_port_pcie(struct e1000_hw *hw);
551 extern void e1000_set_lan_id_single_port(struct e1000_hw *hw);
552 extern s32 e1000e_get_speed_and_duplex_copper(struct e1000_hw *hw, u16 *speed, u16 *duplex);
553 extern s32 e1000e_get_speed_and_duplex_fiber_serdes(struct e1000_hw *hw, u16 *speed, u16 *duplex);
554 extern s32 e1000e_disable_pcie_master(struct e1000_hw *hw);
555 extern s32 e1000e_get_auto_rd_done(struct e1000_hw *hw);
556 extern s32 e1000e_id_led_init(struct e1000_hw *hw);
557 extern void e1000e_clear_hw_cntrs_base(struct e1000_hw *hw);
558 extern s32 e1000e_setup_fiber_serdes_link(struct e1000_hw *hw);
559 extern s32 e1000e_copper_link_setup_m88(struct e1000_hw *hw);
560 extern s32 e1000e_copper_link_setup_igp(struct e1000_hw *hw);
561 extern s32 e1000e_setup_link(struct e1000_hw *hw);
562 extern void e1000_clear_vfta_generic(struct e1000_hw *hw);
563 extern void e1000e_init_rx_addrs(struct e1000_hw *hw, u16 rar_count);
564 extern void e1000e_update_mc_addr_list_generic(struct e1000_hw *hw,
565 u8 *mc_addr_list,
566 u32 mc_addr_count);
567 extern void e1000e_rar_set(struct e1000_hw *hw, u8 *addr, u32 index);
568 extern s32 e1000e_set_fc_watermarks(struct e1000_hw *hw);
569 extern void e1000e_set_pcie_no_snoop(struct e1000_hw *hw, u32 no_snoop);
570 extern s32 e1000e_get_hw_semaphore(struct e1000_hw *hw);
571 extern s32 e1000e_valid_led_default(struct e1000_hw *hw, u16 *data);
572 extern void e1000e_config_collision_dist(struct e1000_hw *hw);
573 extern s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw);
574 extern s32 e1000e_force_mac_fc(struct e1000_hw *hw);
575 extern s32 e1000e_blink_led_generic(struct e1000_hw *hw);
576 extern void e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value);
577 extern s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw);
578 extern void e1000e_reset_adaptive(struct e1000_hw *hw);
579 extern void e1000e_update_adaptive(struct e1000_hw *hw);
580
581 extern s32 e1000e_setup_copper_link(struct e1000_hw *hw);
582 extern s32 e1000e_get_phy_id(struct e1000_hw *hw);
583 extern void e1000e_put_hw_semaphore(struct e1000_hw *hw);
584 extern s32 e1000e_check_reset_block_generic(struct e1000_hw *hw);
585 extern s32 e1000e_phy_force_speed_duplex_igp(struct e1000_hw *hw);
586 extern s32 e1000e_get_cable_length_igp_2(struct e1000_hw *hw);
587 extern s32 e1000e_get_phy_info_igp(struct e1000_hw *hw);
588 extern s32 e1000_set_page_igp(struct e1000_hw *hw, u16 page);
589 extern s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data);
590 extern s32 e1000e_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset,
591 u16 *data);
592 extern s32 e1000e_phy_hw_reset_generic(struct e1000_hw *hw);
593 extern s32 e1000e_set_d3_lplu_state(struct e1000_hw *hw, bool active);
594 extern s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data);
595 extern s32 e1000e_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset,
596 u16 data);
597 extern s32 e1000e_phy_sw_reset(struct e1000_hw *hw);
598 extern s32 e1000e_phy_force_speed_duplex_m88(struct e1000_hw *hw);
599 extern s32 e1000e_get_cfg_done(struct e1000_hw *hw);
600 extern s32 e1000e_get_cable_length_m88(struct e1000_hw *hw);
601 extern s32 e1000e_get_phy_info_m88(struct e1000_hw *hw);
602 extern s32 e1000e_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data);
603 extern s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data);
604 extern s32 e1000e_phy_init_script_igp3(struct e1000_hw *hw);
605 extern enum e1000_phy_type e1000e_get_phy_type_from_id(u32 phy_id);
606 extern s32 e1000e_determine_phy_address(struct e1000_hw *hw);
607 extern s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data);
608 extern s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data);
609 extern s32 e1000_enable_phy_wakeup_reg_access_bm(struct e1000_hw *hw,
610 u16 *phy_reg);
611 extern s32 e1000_disable_phy_wakeup_reg_access_bm(struct e1000_hw *hw,
612 u16 *phy_reg);
613 extern s32 e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data);
614 extern s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data);
615 extern void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl);
616 extern s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data);
617 extern s32 e1000e_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset,
618 u16 data);
619 extern s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data);
620 extern s32 e1000e_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset,
621 u16 *data);
622 extern s32 e1000e_phy_has_link_generic(struct e1000_hw *hw, u32 iterations,
623 u32 usec_interval, bool *success);
624 extern s32 e1000e_phy_reset_dsp(struct e1000_hw *hw);
625 extern void e1000_power_up_phy_copper(struct e1000_hw *hw);
626 extern void e1000_power_down_phy_copper(struct e1000_hw *hw);
627 extern s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data);
628 extern s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data);
629 extern s32 e1000e_check_downshift(struct e1000_hw *hw);
630 extern s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data);
631 extern s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset,
632 u16 *data);
633 extern s32 e1000_read_phy_reg_page_hv(struct e1000_hw *hw, u32 offset,
634 u16 *data);
635 extern s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data);
636 extern s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset,
637 u16 data);
638 extern s32 e1000_write_phy_reg_page_hv(struct e1000_hw *hw, u32 offset,
639 u16 data);
640 extern s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw);
641 extern s32 e1000_copper_link_setup_82577(struct e1000_hw *hw);
642 extern s32 e1000_check_polarity_82577(struct e1000_hw *hw);
643 extern s32 e1000_get_phy_info_82577(struct e1000_hw *hw);
644 extern s32 e1000_phy_force_speed_duplex_82577(struct e1000_hw *hw);
645 extern s32 e1000_get_cable_length_82577(struct e1000_hw *hw);
646
647 extern s32 e1000_check_polarity_m88(struct e1000_hw *hw);
648 extern s32 e1000_get_phy_info_ife(struct e1000_hw *hw);
649 extern s32 e1000_check_polarity_ife(struct e1000_hw *hw);
650 extern s32 e1000_phy_force_speed_duplex_ife(struct e1000_hw *hw);
651 extern s32 e1000_check_polarity_igp(struct e1000_hw *hw);
652 extern bool e1000_check_phy_82574(struct e1000_hw *hw);
653
654 static inline s32 e1000_phy_hw_reset(struct e1000_hw *hw)
655 {
656 return hw->phy.ops.reset(hw);
657 }
658
659 static inline s32 e1000_check_reset_block(struct e1000_hw *hw)
660 {
661 return hw->phy.ops.check_reset_block(hw);
662 }
663
664 static inline s32 e1e_rphy(struct e1000_hw *hw, u32 offset, u16 *data)
665 {
666 return hw->phy.ops.read_reg(hw, offset, data);
667 }
668
669 static inline s32 e1e_wphy(struct e1000_hw *hw, u32 offset, u16 data)
670 {
671 return hw->phy.ops.write_reg(hw, offset, data);
672 }
673
674 static inline s32 e1000_get_cable_length(struct e1000_hw *hw)
675 {
676 return hw->phy.ops.get_cable_length(hw);
677 }
678
679 extern s32 e1000e_acquire_nvm(struct e1000_hw *hw);
680 extern s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
681 extern s32 e1000e_update_nvm_checksum_generic(struct e1000_hw *hw);
682 extern s32 e1000e_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg);
683 extern s32 e1000e_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
684 extern s32 e1000e_validate_nvm_checksum_generic(struct e1000_hw *hw);
685 extern void e1000e_release_nvm(struct e1000_hw *hw);
686 extern void e1000e_reload_nvm(struct e1000_hw *hw);
687 extern s32 e1000_read_mac_addr_generic(struct e1000_hw *hw);
688
689 static inline s32 e1000e_read_mac_addr(struct e1000_hw *hw)
690 {
691 if (hw->mac.ops.read_mac_addr)
692 return hw->mac.ops.read_mac_addr(hw);
693
694 return e1000_read_mac_addr_generic(hw);
695 }
696
697 static inline s32 e1000_validate_nvm_checksum(struct e1000_hw *hw)
698 {
699 return hw->nvm.ops.validate(hw);
700 }
701
702 static inline s32 e1000e_update_nvm_checksum(struct e1000_hw *hw)
703 {
704 return hw->nvm.ops.update(hw);
705 }
706
707 static inline s32 e1000_read_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
708 {
709 return hw->nvm.ops.read(hw, offset, words, data);
710 }
711
712 static inline s32 e1000_write_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
713 {
714 return hw->nvm.ops.write(hw, offset, words, data);
715 }
716
717 static inline s32 e1000_get_phy_info(struct e1000_hw *hw)
718 {
719 return hw->phy.ops.get_info(hw);
720 }
721
722 static inline s32 e1000e_check_mng_mode(struct e1000_hw *hw)
723 {
724 return hw->mac.ops.check_mng_mode(hw);
725 }
726
727 extern bool e1000e_check_mng_mode_generic(struct e1000_hw *hw);
728 extern bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw);
729 extern s32 e1000e_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length);
730
731 static inline u32 __er32(struct e1000_hw *hw, unsigned long reg)
732 {
733 return readl(hw->hw_addr + reg);
734 }
735
736 static inline void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
737 {
738 writel(val, hw->hw_addr + reg);
739 }
740
741 #endif /* _E1000_H_ */
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