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Add linux-next specific files for 20110421
[linux-2.6/next.git] / drivers / usb / gadget / s3c2410_udc.c
blob6d8b04061d5d6772f076c9792315a8ee8c42499d
1 /*
2 * linux/drivers/usb/gadget/s3c2410_udc.c
3 *
4 * Samsung S3C24xx series on-chip full speed USB device controllers
5 *
6 * Copyright (C) 2004-2007 Herbert Pötzl - Arnaud Patard
7 * Additional cleanups by Ben Dooks <ben-linux@fluff.org>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 */
24
25 #include <linux/module.h>
26 #include <linux/kernel.h>
27 #include <linux/delay.h>
28 #include <linux/ioport.h>
29 #include <linux/sched.h>
30 #include <linux/slab.h>
31 #include <linux/errno.h>
32 #include <linux/init.h>
33 #include <linux/timer.h>
34 #include <linux/list.h>
35 #include <linux/interrupt.h>
36 #include <linux/platform_device.h>
37 #include <linux/clk.h>
38 #include <linux/gpio.h>
39
40 #include <linux/debugfs.h>
41 #include <linux/seq_file.h>
42
43 #include <linux/usb.h>
44 #include <linux/usb/gadget.h>
45
46 #include <asm/byteorder.h>
47 #include <asm/io.h>
48 #include <asm/irq.h>
49 #include <asm/system.h>
50 #include <asm/unaligned.h>
51 #include <mach/irqs.h>
52
53 #include <mach/hardware.h>
54
55 #include <plat/regs-udc.h>
56 #include <plat/udc.h>
57
58
59 #include "s3c2410_udc.h"
60
61 #define DRIVER_DESC "S3C2410 USB Device Controller Gadget"
62 #define DRIVER_VERSION "29 Apr 2007"
63 #define DRIVER_AUTHOR "Herbert Pötzl <herbert@13thfloor.at>, " \
64 "Arnaud Patard <arnaud.patard@rtp-net.org>"
65
66 static const char gadget_name[] = "s3c2410_udc";
67 static const char driver_desc[] = DRIVER_DESC;
68
69 static struct s3c2410_udc *the_controller;
70 static struct clk *udc_clock;
71 static struct clk *usb_bus_clock;
72 static void __iomem *base_addr;
73 static u64 rsrc_start;
74 static u64 rsrc_len;
75 static struct dentry *s3c2410_udc_debugfs_root;
76
77 static inline u32 udc_read(u32 reg)
78 {
79 return readb(base_addr + reg);
80 }
81
82 static inline void udc_write(u32 value, u32 reg)
83 {
84 writeb(value, base_addr + reg);
85 }
86
87 static inline void udc_writeb(void __iomem *base, u32 value, u32 reg)
88 {
89 writeb(value, base + reg);
90 }
91
92 static struct s3c2410_udc_mach_info *udc_info;
93
94 /*************************** DEBUG FUNCTION ***************************/
95 #define DEBUG_NORMAL 1
96 #define DEBUG_VERBOSE 2
97
98 #ifdef CONFIG_USB_S3C2410_DEBUG
99 #define USB_S3C2410_DEBUG_LEVEL 0
100
101 static uint32_t s3c2410_ticks = 0;
102
103 static int dprintk(int level, const char *fmt, ...)
104 {
105 static char printk_buf[1024];
106 static long prevticks;
107 static int invocation;
108 va_list args;
109 int len;
110
111 if (level > USB_S3C2410_DEBUG_LEVEL)
112 return 0;
113
114 if (s3c2410_ticks != prevticks) {
115 prevticks = s3c2410_ticks;
116 invocation = 0;
117 }
118
119 len = scnprintf(printk_buf,
120 sizeof(printk_buf), "%1lu.%02d USB: ",
121 prevticks, invocation++);
122
123 va_start(args, fmt);
124 len = vscnprintf(printk_buf+len,
125 sizeof(printk_buf)-len, fmt, args);
126 va_end(args);
127
128 return printk(KERN_DEBUG "%s", printk_buf);
129 }
130 #else
131 static int dprintk(int level, const char *fmt, ...)
132 {
133 return 0;
134 }
135 #endif
136 static int s3c2410_udc_debugfs_seq_show(struct seq_file *m, void *p)
137 {
138 u32 addr_reg,pwr_reg,ep_int_reg,usb_int_reg;
139 u32 ep_int_en_reg, usb_int_en_reg, ep0_csr;
140 u32 ep1_i_csr1,ep1_i_csr2,ep1_o_csr1,ep1_o_csr2;
141 u32 ep2_i_csr1,ep2_i_csr2,ep2_o_csr1,ep2_o_csr2;
142
143 addr_reg = udc_read(S3C2410_UDC_FUNC_ADDR_REG);
144 pwr_reg = udc_read(S3C2410_UDC_PWR_REG);
145 ep_int_reg = udc_read(S3C2410_UDC_EP_INT_REG);
146 usb_int_reg = udc_read(S3C2410_UDC_USB_INT_REG);
147 ep_int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
148 usb_int_en_reg = udc_read(S3C2410_UDC_USB_INT_EN_REG);
149 udc_write(0, S3C2410_UDC_INDEX_REG);
150 ep0_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
151 udc_write(1, S3C2410_UDC_INDEX_REG);
152 ep1_i_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
153 ep1_i_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
154 ep1_o_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
155 ep1_o_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
156 udc_write(2, S3C2410_UDC_INDEX_REG);
157 ep2_i_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
158 ep2_i_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
159 ep2_o_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
160 ep2_o_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
161
162 seq_printf(m, "FUNC_ADDR_REG : 0x%04X\n"
163 "PWR_REG : 0x%04X\n"
164 "EP_INT_REG : 0x%04X\n"
165 "USB_INT_REG : 0x%04X\n"
166 "EP_INT_EN_REG : 0x%04X\n"
167 "USB_INT_EN_REG : 0x%04X\n"
168 "EP0_CSR : 0x%04X\n"
169 "EP1_I_CSR1 : 0x%04X\n"
170 "EP1_I_CSR2 : 0x%04X\n"
171 "EP1_O_CSR1 : 0x%04X\n"
172 "EP1_O_CSR2 : 0x%04X\n"
173 "EP2_I_CSR1 : 0x%04X\n"
174 "EP2_I_CSR2 : 0x%04X\n"
175 "EP2_O_CSR1 : 0x%04X\n"
176 "EP2_O_CSR2 : 0x%04X\n",
177 addr_reg,pwr_reg,ep_int_reg,usb_int_reg,
178 ep_int_en_reg, usb_int_en_reg, ep0_csr,
179 ep1_i_csr1,ep1_i_csr2,ep1_o_csr1,ep1_o_csr2,
180 ep2_i_csr1,ep2_i_csr2,ep2_o_csr1,ep2_o_csr2
181 );
182
183 return 0;
184 }
185
186 static int s3c2410_udc_debugfs_fops_open(struct inode *inode,
187 struct file *file)
188 {
189 return single_open(file, s3c2410_udc_debugfs_seq_show, NULL);
190 }
191
192 static const struct file_operations s3c2410_udc_debugfs_fops = {
193 .open = s3c2410_udc_debugfs_fops_open,
194 .read = seq_read,
195 .llseek = seq_lseek,
196 .release = single_release,
197 .owner = THIS_MODULE,
198 };
199
200 /* io macros */
201
202 static inline void s3c2410_udc_clear_ep0_opr(void __iomem *base)
203 {
204 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
205 udc_writeb(base, S3C2410_UDC_EP0_CSR_SOPKTRDY,
206 S3C2410_UDC_EP0_CSR_REG);
207 }
208
209 static inline void s3c2410_udc_clear_ep0_sst(void __iomem *base)
210 {
211 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
212 writeb(0x00, base + S3C2410_UDC_EP0_CSR_REG);
213 }
214
215 static inline void s3c2410_udc_clear_ep0_se(void __iomem *base)
216 {
217 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
218 udc_writeb(base, S3C2410_UDC_EP0_CSR_SSE, S3C2410_UDC_EP0_CSR_REG);
219 }
220
221 static inline void s3c2410_udc_set_ep0_ipr(void __iomem *base)
222 {
223 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
224 udc_writeb(base, S3C2410_UDC_EP0_CSR_IPKRDY, S3C2410_UDC_EP0_CSR_REG);
225 }
226
227 static inline void s3c2410_udc_set_ep0_de(void __iomem *base)
228 {
229 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
230 udc_writeb(base, S3C2410_UDC_EP0_CSR_DE, S3C2410_UDC_EP0_CSR_REG);
231 }
232
233 inline void s3c2410_udc_set_ep0_ss(void __iomem *b)
234 {
235 udc_writeb(b, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
236 udc_writeb(b, S3C2410_UDC_EP0_CSR_SENDSTL, S3C2410_UDC_EP0_CSR_REG);
237 }
238
239 static inline void s3c2410_udc_set_ep0_de_out(void __iomem *base)
240 {
241 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
242
243 udc_writeb(base,(S3C2410_UDC_EP0_CSR_SOPKTRDY
244 | S3C2410_UDC_EP0_CSR_DE),
245 S3C2410_UDC_EP0_CSR_REG);
246 }
247
248 static inline void s3c2410_udc_set_ep0_sse_out(void __iomem *base)
249 {
250 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
251 udc_writeb(base, (S3C2410_UDC_EP0_CSR_SOPKTRDY
252 | S3C2410_UDC_EP0_CSR_SSE),
253 S3C2410_UDC_EP0_CSR_REG);
254 }
255
256 static inline void s3c2410_udc_set_ep0_de_in(void __iomem *base)
257 {
258 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
259 udc_writeb(base, (S3C2410_UDC_EP0_CSR_IPKRDY
260 | S3C2410_UDC_EP0_CSR_DE),
261 S3C2410_UDC_EP0_CSR_REG);
262 }
263
264 /*------------------------- I/O ----------------------------------*/
265
266 /*
267 * s3c2410_udc_done
268 */
269 static void s3c2410_udc_done(struct s3c2410_ep *ep,
270 struct s3c2410_request *req, int status)
271 {
272 unsigned halted = ep->halted;
273
274 list_del_init(&req->queue);
275
276 if (likely (req->req.status == -EINPROGRESS))
277 req->req.status = status;
278 else
279 status = req->req.status;
280
281 ep->halted = 1;
282 req->req.complete(&ep->ep, &req->req);
283 ep->halted = halted;
284 }
285
286 static void s3c2410_udc_nuke(struct s3c2410_udc *udc,
287 struct s3c2410_ep *ep, int status)
288 {
289 /* Sanity check */
290 if (&ep->queue == NULL)
291 return;
292
293 while (!list_empty (&ep->queue)) {
294 struct s3c2410_request *req;
295 req = list_entry (ep->queue.next, struct s3c2410_request,
296 queue);
297 s3c2410_udc_done(ep, req, status);
298 }
299 }
300
301 static inline void s3c2410_udc_clear_ep_state(struct s3c2410_udc *dev)
302 {
303 unsigned i;
304
305 /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint
306 * fifos, and pending transactions mustn't be continued in any case.
307 */
308
309 for (i = 1; i < S3C2410_ENDPOINTS; i++)
310 s3c2410_udc_nuke(dev, &dev->ep[i], -ECONNABORTED);
311 }
312
313 static inline int s3c2410_udc_fifo_count_out(void)
314 {
315 int tmp;
316
317 tmp = udc_read(S3C2410_UDC_OUT_FIFO_CNT2_REG) << 8;
318 tmp |= udc_read(S3C2410_UDC_OUT_FIFO_CNT1_REG);
319 return tmp;
320 }
321
322 /*
323 * s3c2410_udc_write_packet
324 */
325 static inline int s3c2410_udc_write_packet(int fifo,
326 struct s3c2410_request *req,
327 unsigned max)
328 {
329 unsigned len = min(req->req.length - req->req.actual, max);
330 u8 *buf = req->req.buf + req->req.actual;
331
332 prefetch(buf);
333
334 dprintk(DEBUG_VERBOSE, "%s %d %d %d %d\n", __func__,
335 req->req.actual, req->req.length, len, req->req.actual + len);
336
337 req->req.actual += len;
338
339 udelay(5);
340 writesb(base_addr + fifo, buf, len);
341 return len;
342 }
343
344 /*
345 * s3c2410_udc_write_fifo
346 *
347 * return: 0 = still running, 1 = completed, negative = errno
348 */
349 static int s3c2410_udc_write_fifo(struct s3c2410_ep *ep,
350 struct s3c2410_request *req)
351 {
352 unsigned count;
353 int is_last;
354 u32 idx;
355 int fifo_reg;
356 u32 ep_csr;
357
358 idx = ep->bEndpointAddress & 0x7F;
359 switch (idx) {
360 default:
361 idx = 0;
362 case 0:
363 fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
364 break;
365 case 1:
366 fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
367 break;
368 case 2:
369 fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
370 break;
371 case 3:
372 fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
373 break;
374 case 4:
375 fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
376 break;
377 }
378
379 count = s3c2410_udc_write_packet(fifo_reg, req, ep->ep.maxpacket);
380
381 /* last packet is often short (sometimes a zlp) */
382 if (count != ep->ep.maxpacket)
383 is_last = 1;
384 else if (req->req.length != req->req.actual || req->req.zero)
385 is_last = 0;
386 else
387 is_last = 2;
388
389 /* Only ep0 debug messages are interesting */
390 if (idx == 0)
391 dprintk(DEBUG_NORMAL,
392 "Written ep%d %d.%d of %d b [last %d,z %d]\n",
393 idx, count, req->req.actual, req->req.length,
394 is_last, req->req.zero);
395
396 if (is_last) {
397 /* The order is important. It prevents sending 2 packets
398 * at the same time */
399
400 if (idx == 0) {
401 /* Reset signal => no need to say 'data sent' */
402 if (! (udc_read(S3C2410_UDC_USB_INT_REG)
403 & S3C2410_UDC_USBINT_RESET))
404 s3c2410_udc_set_ep0_de_in(base_addr);
405 ep->dev->ep0state=EP0_IDLE;
406 } else {
407 udc_write(idx, S3C2410_UDC_INDEX_REG);
408 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
409 udc_write(idx, S3C2410_UDC_INDEX_REG);
410 udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
411 S3C2410_UDC_IN_CSR1_REG);
412 }
413
414 s3c2410_udc_done(ep, req, 0);
415 is_last = 1;
416 } else {
417 if (idx == 0) {
418 /* Reset signal => no need to say 'data sent' */
419 if (! (udc_read(S3C2410_UDC_USB_INT_REG)
420 & S3C2410_UDC_USBINT_RESET))
421 s3c2410_udc_set_ep0_ipr(base_addr);
422 } else {
423 udc_write(idx, S3C2410_UDC_INDEX_REG);
424 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
425 udc_write(idx, S3C2410_UDC_INDEX_REG);
426 udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
427 S3C2410_UDC_IN_CSR1_REG);
428 }
429 }
430
431 return is_last;
432 }
433
434 static inline int s3c2410_udc_read_packet(int fifo, u8 *buf,
435 struct s3c2410_request *req, unsigned avail)
436 {
437 unsigned len;
438
439 len = min(req->req.length - req->req.actual, avail);
440 req->req.actual += len;
441
442 readsb(fifo + base_addr, buf, len);
443 return len;
444 }
445
446 /*
447 * return: 0 = still running, 1 = queue empty, negative = errno
448 */
449 static int s3c2410_udc_read_fifo(struct s3c2410_ep *ep,
450 struct s3c2410_request *req)
451 {
452 u8 *buf;
453 u32 ep_csr;
454 unsigned bufferspace;
455 int is_last=1;
456 unsigned avail;
457 int fifo_count = 0;
458 u32 idx;
459 int fifo_reg;
460
461 idx = ep->bEndpointAddress & 0x7F;
462
463 switch (idx) {
464 default:
465 idx = 0;
466 case 0:
467 fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
468 break;
469 case 1:
470 fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
471 break;
472 case 2:
473 fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
474 break;
475 case 3:
476 fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
477 break;
478 case 4:
479 fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
480 break;
481 }
482
483 if (!req->req.length)
484 return 1;
485
486 buf = req->req.buf + req->req.actual;
487 bufferspace = req->req.length - req->req.actual;
488 if (!bufferspace) {
489 dprintk(DEBUG_NORMAL, "%s: buffer full!\n", __func__);
490 return -1;
491 }
492
493 udc_write(idx, S3C2410_UDC_INDEX_REG);
494
495 fifo_count = s3c2410_udc_fifo_count_out();
496 dprintk(DEBUG_NORMAL, "%s fifo count : %d\n", __func__, fifo_count);
497
498 if (fifo_count > ep->ep.maxpacket)
499 avail = ep->ep.maxpacket;
500 else
501 avail = fifo_count;
502
503 fifo_count = s3c2410_udc_read_packet(fifo_reg, buf, req, avail);
504
505 /* checking this with ep0 is not accurate as we already
506 * read a control request
507 **/
508 if (idx != 0 && fifo_count < ep->ep.maxpacket) {
509 is_last = 1;
510 /* overflowed this request? flush extra data */
511 if (fifo_count != avail)
512 req->req.status = -EOVERFLOW;
513 } else {
514 is_last = (req->req.length <= req->req.actual) ? 1 : 0;
515 }
516
517 udc_write(idx, S3C2410_UDC_INDEX_REG);
518 fifo_count = s3c2410_udc_fifo_count_out();
519
520 /* Only ep0 debug messages are interesting */
521 if (idx == 0)
522 dprintk(DEBUG_VERBOSE, "%s fifo count : %d [last %d]\n",
523 __func__, fifo_count,is_last);
524
525 if (is_last) {
526 if (idx == 0) {
527 s3c2410_udc_set_ep0_de_out(base_addr);
528 ep->dev->ep0state = EP0_IDLE;
529 } else {
530 udc_write(idx, S3C2410_UDC_INDEX_REG);
531 ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
532 udc_write(idx, S3C2410_UDC_INDEX_REG);
533 udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
534 S3C2410_UDC_OUT_CSR1_REG);
535 }
536
537 s3c2410_udc_done(ep, req, 0);
538 } else {
539 if (idx == 0) {
540 s3c2410_udc_clear_ep0_opr(base_addr);
541 } else {
542 udc_write(idx, S3C2410_UDC_INDEX_REG);
543 ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
544 udc_write(idx, S3C2410_UDC_INDEX_REG);
545 udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
546 S3C2410_UDC_OUT_CSR1_REG);
547 }
548 }
549
550 return is_last;
551 }
552
553 static int s3c2410_udc_read_fifo_crq(struct usb_ctrlrequest *crq)
554 {
555 unsigned char *outbuf = (unsigned char*)crq;
556 int bytes_read = 0;
557
558 udc_write(0, S3C2410_UDC_INDEX_REG);
559
560 bytes_read = s3c2410_udc_fifo_count_out();
561
562 dprintk(DEBUG_NORMAL, "%s: fifo_count=%d\n", __func__, bytes_read);
563
564 if (bytes_read > sizeof(struct usb_ctrlrequest))
565 bytes_read = sizeof(struct usb_ctrlrequest);
566
567 readsb(S3C2410_UDC_EP0_FIFO_REG + base_addr, outbuf, bytes_read);
568
569 dprintk(DEBUG_VERBOSE, "%s: len=%d %02x:%02x {%x,%x,%x}\n", __func__,
570 bytes_read, crq->bRequest, crq->bRequestType,
571 crq->wValue, crq->wIndex, crq->wLength);
572
573 return bytes_read;
574 }
575
576 static int s3c2410_udc_get_status(struct s3c2410_udc *dev,
577 struct usb_ctrlrequest *crq)
578 {
579 u16 status = 0;
580 u8 ep_num = crq->wIndex & 0x7F;
581 u8 is_in = crq->wIndex & USB_DIR_IN;
582
583 switch (crq->bRequestType & USB_RECIP_MASK) {
584 case USB_RECIP_INTERFACE:
585 break;
586
587 case USB_RECIP_DEVICE:
588 status = dev->devstatus;
589 break;
590
591 case USB_RECIP_ENDPOINT:
592 if (ep_num > 4 || crq->wLength > 2)
593 return 1;
594
595 if (ep_num == 0) {
596 udc_write(0, S3C2410_UDC_INDEX_REG);
597 status = udc_read(S3C2410_UDC_IN_CSR1_REG);
598 status = status & S3C2410_UDC_EP0_CSR_SENDSTL;
599 } else {
600 udc_write(ep_num, S3C2410_UDC_INDEX_REG);
601 if (is_in) {
602 status = udc_read(S3C2410_UDC_IN_CSR1_REG);
603 status = status & S3C2410_UDC_ICSR1_SENDSTL;
604 } else {
605 status = udc_read(S3C2410_UDC_OUT_CSR1_REG);
606 status = status & S3C2410_UDC_OCSR1_SENDSTL;
607 }
608 }
609
610 status = status ? 1 : 0;
611 break;
612
613 default:
614 return 1;
615 }
616
617 /* Seems to be needed to get it working. ouch :( */
618 udelay(5);
619 udc_write(status & 0xFF, S3C2410_UDC_EP0_FIFO_REG);
620 udc_write(status >> 8, S3C2410_UDC_EP0_FIFO_REG);
621 s3c2410_udc_set_ep0_de_in(base_addr);
622
623 return 0;
624 }
625 /*------------------------- usb state machine -------------------------------*/
626 static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value);
627
628 static void s3c2410_udc_handle_ep0_idle(struct s3c2410_udc *dev,
629 struct s3c2410_ep *ep,
630 struct usb_ctrlrequest *crq,
631 u32 ep0csr)
632 {
633 int len, ret, tmp;
634
635 /* start control request? */
636 if (!(ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY))
637 return;
638
639 s3c2410_udc_nuke(dev, ep, -EPROTO);
640
641 len = s3c2410_udc_read_fifo_crq(crq);
642 if (len != sizeof(*crq)) {
643 dprintk(DEBUG_NORMAL, "setup begin: fifo READ ERROR"
644 " wanted %d bytes got %d. Stalling out...\n",
645 sizeof(*crq), len);
646 s3c2410_udc_set_ep0_ss(base_addr);
647 return;
648 }
649
650 dprintk(DEBUG_NORMAL, "bRequest = %d bRequestType %d wLength = %d\n",
651 crq->bRequest, crq->bRequestType, crq->wLength);
652
653 /* cope with automagic for some standard requests. */
654 dev->req_std = (crq->bRequestType & USB_TYPE_MASK)
655 == USB_TYPE_STANDARD;
656 dev->req_config = 0;
657 dev->req_pending = 1;
658
659 switch (crq->bRequest) {
660 case USB_REQ_SET_CONFIGURATION:
661 dprintk(DEBUG_NORMAL, "USB_REQ_SET_CONFIGURATION ... \n");
662
663 if (crq->bRequestType == USB_RECIP_DEVICE) {
664 dev->req_config = 1;
665 s3c2410_udc_set_ep0_de_out(base_addr);
666 }
667 break;
668
669 case USB_REQ_SET_INTERFACE:
670 dprintk(DEBUG_NORMAL, "USB_REQ_SET_INTERFACE ... \n");
671
672 if (crq->bRequestType == USB_RECIP_INTERFACE) {
673 dev->req_config = 1;
674 s3c2410_udc_set_ep0_de_out(base_addr);
675 }
676 break;
677
678 case USB_REQ_SET_ADDRESS:
679 dprintk(DEBUG_NORMAL, "USB_REQ_SET_ADDRESS ... \n");
680
681 if (crq->bRequestType == USB_RECIP_DEVICE) {
682 tmp = crq->wValue & 0x7F;
683 dev->address = tmp;
684 udc_write((tmp | S3C2410_UDC_FUNCADDR_UPDATE),
685 S3C2410_UDC_FUNC_ADDR_REG);
686 s3c2410_udc_set_ep0_de_out(base_addr);
687 return;
688 }
689 break;
690
691 case USB_REQ_GET_STATUS:
692 dprintk(DEBUG_NORMAL, "USB_REQ_GET_STATUS ... \n");
693 s3c2410_udc_clear_ep0_opr(base_addr);
694
695 if (dev->req_std) {
696 if (!s3c2410_udc_get_status(dev, crq)) {
697 return;
698 }
699 }
700 break;
701
702 case USB_REQ_CLEAR_FEATURE:
703 s3c2410_udc_clear_ep0_opr(base_addr);
704
705 if (crq->bRequestType != USB_RECIP_ENDPOINT)
706 break;
707
708 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
709 break;
710
711 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 0);
712 s3c2410_udc_set_ep0_de_out(base_addr);
713 return;
714
715 case USB_REQ_SET_FEATURE:
716 s3c2410_udc_clear_ep0_opr(base_addr);
717
718 if (crq->bRequestType != USB_RECIP_ENDPOINT)
719 break;
720
721 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
722 break;
723
724 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 1);
725 s3c2410_udc_set_ep0_de_out(base_addr);
726 return;
727
728 default:
729 s3c2410_udc_clear_ep0_opr(base_addr);
730 break;
731 }
732
733 if (crq->bRequestType & USB_DIR_IN)
734 dev->ep0state = EP0_IN_DATA_PHASE;
735 else
736 dev->ep0state = EP0_OUT_DATA_PHASE;
737
738 if (!dev->driver)
739 return;
740
741 /* deliver the request to the gadget driver */
742 ret = dev->driver->setup(&dev->gadget, crq);
743 if (ret < 0) {
744 if (dev->req_config) {
745 dprintk(DEBUG_NORMAL, "config change %02x fail %d?\n",
746 crq->bRequest, ret);
747 return;
748 }
749
750 if (ret == -EOPNOTSUPP)
751 dprintk(DEBUG_NORMAL, "Operation not supported\n");
752 else
753 dprintk(DEBUG_NORMAL,
754 "dev->driver->setup failed. (%d)\n", ret);
755
756 udelay(5);
757 s3c2410_udc_set_ep0_ss(base_addr);
758 s3c2410_udc_set_ep0_de_out(base_addr);
759 dev->ep0state = EP0_IDLE;
760 /* deferred i/o == no response yet */
761 } else if (dev->req_pending) {
762 dprintk(DEBUG_VERBOSE, "dev->req_pending... what now?\n");
763 dev->req_pending=0;
764 }
765
766 dprintk(DEBUG_VERBOSE, "ep0state %s\n", ep0states[dev->ep0state]);
767 }
768
769 static void s3c2410_udc_handle_ep0(struct s3c2410_udc *dev)
770 {
771 u32 ep0csr;
772 struct s3c2410_ep *ep = &dev->ep[0];
773 struct s3c2410_request *req;
774 struct usb_ctrlrequest crq;
775
776 if (list_empty(&ep->queue))
777 req = NULL;
778 else
779 req = list_entry(ep->queue.next, struct s3c2410_request, queue);
780
781 /* We make the assumption that S3C2410_UDC_IN_CSR1_REG equal to
782 * S3C2410_UDC_EP0_CSR_REG when index is zero */
783
784 udc_write(0, S3C2410_UDC_INDEX_REG);
785 ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
786
787 dprintk(DEBUG_NORMAL, "ep0csr %x ep0state %s\n",
788 ep0csr, ep0states[dev->ep0state]);
789
790 /* clear stall status */
791 if (ep0csr & S3C2410_UDC_EP0_CSR_SENTSTL) {
792 s3c2410_udc_nuke(dev, ep, -EPIPE);
793 dprintk(DEBUG_NORMAL, "... clear SENT_STALL ...\n");
794 s3c2410_udc_clear_ep0_sst(base_addr);
795 dev->ep0state = EP0_IDLE;
796 return;
797 }
798
799 /* clear setup end */
800 if (ep0csr & S3C2410_UDC_EP0_CSR_SE) {
801 dprintk(DEBUG_NORMAL, "... serviced SETUP_END ...\n");
802 s3c2410_udc_nuke(dev, ep, 0);
803 s3c2410_udc_clear_ep0_se(base_addr);
804 dev->ep0state = EP0_IDLE;
805 }
806
807 switch (dev->ep0state) {
808 case EP0_IDLE:
809 s3c2410_udc_handle_ep0_idle(dev, ep, &crq, ep0csr);
810 break;
811
812 case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */
813 dprintk(DEBUG_NORMAL, "EP0_IN_DATA_PHASE ... what now?\n");
814 if (!(ep0csr & S3C2410_UDC_EP0_CSR_IPKRDY) && req) {
815 s3c2410_udc_write_fifo(ep, req);
816 }
817 break;
818
819 case EP0_OUT_DATA_PHASE: /* SET_DESCRIPTOR etc */
820 dprintk(DEBUG_NORMAL, "EP0_OUT_DATA_PHASE ... what now?\n");
821 if ((ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY) && req ) {
822 s3c2410_udc_read_fifo(ep,req);
823 }
824 break;
825
826 case EP0_END_XFER:
827 dprintk(DEBUG_NORMAL, "EP0_END_XFER ... what now?\n");
828 dev->ep0state = EP0_IDLE;
829 break;
830
831 case EP0_STALL:
832 dprintk(DEBUG_NORMAL, "EP0_STALL ... what now?\n");
833 dev->ep0state = EP0_IDLE;
834 break;
835 }
836 }
837
838 /*
839 * handle_ep - Manage I/O endpoints
840 */
841
842 static void s3c2410_udc_handle_ep(struct s3c2410_ep *ep)
843 {
844 struct s3c2410_request *req;
845 int is_in = ep->bEndpointAddress & USB_DIR_IN;
846 u32 ep_csr1;
847 u32 idx;
848
849 if (likely (!list_empty(&ep->queue)))
850 req = list_entry(ep->queue.next,
851 struct s3c2410_request, queue);
852 else
853 req = NULL;
854
855 idx = ep->bEndpointAddress & 0x7F;
856
857 if (is_in) {
858 udc_write(idx, S3C2410_UDC_INDEX_REG);
859 ep_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
860 dprintk(DEBUG_VERBOSE, "ep%01d write csr:%02x %d\n",
861 idx, ep_csr1, req ? 1 : 0);
862
863 if (ep_csr1 & S3C2410_UDC_ICSR1_SENTSTL) {
864 dprintk(DEBUG_VERBOSE, "st\n");
865 udc_write(idx, S3C2410_UDC_INDEX_REG);
866 udc_write(ep_csr1 & ~S3C2410_UDC_ICSR1_SENTSTL,
867 S3C2410_UDC_IN_CSR1_REG);
868 return;
869 }
870
871 if (!(ep_csr1 & S3C2410_UDC_ICSR1_PKTRDY) && req) {
872 s3c2410_udc_write_fifo(ep,req);
873 }
874 } else {
875 udc_write(idx, S3C2410_UDC_INDEX_REG);
876 ep_csr1 = udc_read(S3C2410_UDC_OUT_CSR1_REG);
877 dprintk(DEBUG_VERBOSE, "ep%01d rd csr:%02x\n", idx, ep_csr1);
878
879 if (ep_csr1 & S3C2410_UDC_OCSR1_SENTSTL) {
880 udc_write(idx, S3C2410_UDC_INDEX_REG);
881 udc_write(ep_csr1 & ~S3C2410_UDC_OCSR1_SENTSTL,
882 S3C2410_UDC_OUT_CSR1_REG);
883 return;
884 }
885
886 if ((ep_csr1 & S3C2410_UDC_OCSR1_PKTRDY) && req) {
887 s3c2410_udc_read_fifo(ep,req);
888 }
889 }
890 }
891
892 #include <mach/regs-irq.h>
893
894 /*
895 * s3c2410_udc_irq - interrupt handler
896 */
897 static irqreturn_t s3c2410_udc_irq(int dummy, void *_dev)
898 {
899 struct s3c2410_udc *dev = _dev;
900 int usb_status;
901 int usbd_status;
902 int pwr_reg;
903 int ep0csr;
904 int i;
905 u32 idx, idx2;
906 unsigned long flags;
907
908 spin_lock_irqsave(&dev->lock, flags);
909
910 /* Driver connected ? */
911 if (!dev->driver) {
912 /* Clear interrupts */
913 udc_write(udc_read(S3C2410_UDC_USB_INT_REG),
914 S3C2410_UDC_USB_INT_REG);
915 udc_write(udc_read(S3C2410_UDC_EP_INT_REG),
916 S3C2410_UDC_EP_INT_REG);
917 }
918
919 /* Save index */
920 idx = udc_read(S3C2410_UDC_INDEX_REG);
921
922 /* Read status registers */
923 usb_status = udc_read(S3C2410_UDC_USB_INT_REG);
924 usbd_status = udc_read(S3C2410_UDC_EP_INT_REG);
925 pwr_reg = udc_read(S3C2410_UDC_PWR_REG);
926
927 udc_writeb(base_addr, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
928 ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
929
930 dprintk(DEBUG_NORMAL, "usbs=%02x, usbds=%02x, pwr=%02x ep0csr=%02x\n",
931 usb_status, usbd_status, pwr_reg, ep0csr);
932
933 /*
934 * Now, handle interrupts. There's two types :
935 * - Reset, Resume, Suspend coming -> usb_int_reg
936 * - EP -> ep_int_reg
937 */
938
939 /* RESET */
940 if (usb_status & S3C2410_UDC_USBINT_RESET) {
941 /* two kind of reset :
942 * - reset start -> pwr reg = 8
943 * - reset end -> pwr reg = 0
944 **/
945 dprintk(DEBUG_NORMAL, "USB reset csr %x pwr %x\n",
946 ep0csr, pwr_reg);
947
948 dev->gadget.speed = USB_SPEED_UNKNOWN;
949 udc_write(0x00, S3C2410_UDC_INDEX_REG);
950 udc_write((dev->ep[0].ep.maxpacket & 0x7ff) >> 3,
951 S3C2410_UDC_MAXP_REG);
952 dev->address = 0;
953
954 dev->ep0state = EP0_IDLE;
955 dev->gadget.speed = USB_SPEED_FULL;
956
957 /* clear interrupt */
958 udc_write(S3C2410_UDC_USBINT_RESET,
959 S3C2410_UDC_USB_INT_REG);
960
961 udc_write(idx, S3C2410_UDC_INDEX_REG);
962 spin_unlock_irqrestore(&dev->lock, flags);
963 return IRQ_HANDLED;
964 }
965
966 /* RESUME */
967 if (usb_status & S3C2410_UDC_USBINT_RESUME) {
968 dprintk(DEBUG_NORMAL, "USB resume\n");
969
970 /* clear interrupt */
971 udc_write(S3C2410_UDC_USBINT_RESUME,
972 S3C2410_UDC_USB_INT_REG);
973
974 if (dev->gadget.speed != USB_SPEED_UNKNOWN
975 && dev->driver
976 && dev->driver->resume)
977 dev->driver->resume(&dev->gadget);
978 }
979
980 /* SUSPEND */
981 if (usb_status & S3C2410_UDC_USBINT_SUSPEND) {
982 dprintk(DEBUG_NORMAL, "USB suspend\n");
983
984 /* clear interrupt */
985 udc_write(S3C2410_UDC_USBINT_SUSPEND,
986 S3C2410_UDC_USB_INT_REG);
987
988 if (dev->gadget.speed != USB_SPEED_UNKNOWN
989 && dev->driver
990 && dev->driver->suspend)
991 dev->driver->suspend(&dev->gadget);
992
993 dev->ep0state = EP0_IDLE;
994 }
995
996 /* EP */
997 /* control traffic */
998 /* check on ep0csr != 0 is not a good idea as clearing in_pkt_ready
999 * generate an interrupt
1000 */
1001 if (usbd_status & S3C2410_UDC_INT_EP0) {
1002 dprintk(DEBUG_VERBOSE, "USB ep0 irq\n");
1003 /* Clear the interrupt bit by setting it to 1 */
1004 udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_REG);
1005 s3c2410_udc_handle_ep0(dev);
1006 }
1007
1008 /* endpoint data transfers */
1009 for (i = 1; i < S3C2410_ENDPOINTS; i++) {
1010 u32 tmp = 1 << i;
1011 if (usbd_status & tmp) {
1012 dprintk(DEBUG_VERBOSE, "USB ep%d irq\n", i);
1013
1014 /* Clear the interrupt bit by setting it to 1 */
1015 udc_write(tmp, S3C2410_UDC_EP_INT_REG);
1016 s3c2410_udc_handle_ep(&dev->ep[i]);
1017 }
1018 }
1019
1020 /* what else causes this interrupt? a receive! who is it? */
1021 if (!usb_status && !usbd_status && !pwr_reg && !ep0csr) {
1022 for (i = 1; i < S3C2410_ENDPOINTS; i++) {
1023 idx2 = udc_read(S3C2410_UDC_INDEX_REG);
1024 udc_write(i, S3C2410_UDC_INDEX_REG);
1025
1026 if (udc_read(S3C2410_UDC_OUT_CSR1_REG) & 0x1)
1027 s3c2410_udc_handle_ep(&dev->ep[i]);
1028
1029 /* restore index */
1030 udc_write(idx2, S3C2410_UDC_INDEX_REG);
1031 }
1032 }
1033
1034 dprintk(DEBUG_VERBOSE, "irq: %d s3c2410_udc_done.\n", IRQ_USBD);
1035
1036 /* Restore old index */
1037 udc_write(idx, S3C2410_UDC_INDEX_REG);
1038
1039 spin_unlock_irqrestore(&dev->lock, flags);
1040
1041 return IRQ_HANDLED;
1042 }
1043 /*------------------------- s3c2410_ep_ops ----------------------------------*/
1044
1045 static inline struct s3c2410_ep *to_s3c2410_ep(struct usb_ep *ep)
1046 {
1047 return container_of(ep, struct s3c2410_ep, ep);
1048 }
1049
1050 static inline struct s3c2410_udc *to_s3c2410_udc(struct usb_gadget *gadget)
1051 {
1052 return container_of(gadget, struct s3c2410_udc, gadget);
1053 }
1054
1055 static inline struct s3c2410_request *to_s3c2410_req(struct usb_request *req)
1056 {
1057 return container_of(req, struct s3c2410_request, req);
1058 }
1059
1060 /*
1061 * s3c2410_udc_ep_enable
1062 */
1063 static int s3c2410_udc_ep_enable(struct usb_ep *_ep,
1064 const struct usb_endpoint_descriptor *desc)
1065 {
1066 struct s3c2410_udc *dev;
1067 struct s3c2410_ep *ep;
1068 u32 max, tmp;
1069 unsigned long flags;
1070 u32 csr1,csr2;
1071 u32 int_en_reg;
1072
1073 ep = to_s3c2410_ep(_ep);
1074
1075 if (!_ep || !desc || ep->desc
1076 || _ep->name == ep0name
1077 || desc->bDescriptorType != USB_DT_ENDPOINT)
1078 return -EINVAL;
1079
1080 dev = ep->dev;
1081 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
1082 return -ESHUTDOWN;
1083
1084 max = le16_to_cpu(desc->wMaxPacketSize) & 0x1fff;
1085
1086 local_irq_save (flags);
1087 _ep->maxpacket = max & 0x7ff;
1088 ep->desc = desc;
1089 ep->halted = 0;
1090 ep->bEndpointAddress = desc->bEndpointAddress;
1091
1092 /* set max packet */
1093 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1094 udc_write(max >> 3, S3C2410_UDC_MAXP_REG);
1095
1096 /* set type, direction, address; reset fifo counters */
1097 if (desc->bEndpointAddress & USB_DIR_IN) {
1098 csr1 = S3C2410_UDC_ICSR1_FFLUSH|S3C2410_UDC_ICSR1_CLRDT;
1099 csr2 = S3C2410_UDC_ICSR2_MODEIN|S3C2410_UDC_ICSR2_DMAIEN;
1100
1101 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1102 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1103 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1104 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1105 } else {
1106 /* don't flush in fifo or it will cause endpoint interrupt */
1107 csr1 = S3C2410_UDC_ICSR1_CLRDT;
1108 csr2 = S3C2410_UDC_ICSR2_DMAIEN;
1109
1110 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1111 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1112 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1113 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1114
1115 csr1 = S3C2410_UDC_OCSR1_FFLUSH | S3C2410_UDC_OCSR1_CLRDT;
1116 csr2 = S3C2410_UDC_OCSR2_DMAIEN;
1117
1118 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1119 udc_write(csr1, S3C2410_UDC_OUT_CSR1_REG);
1120 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1121 udc_write(csr2, S3C2410_UDC_OUT_CSR2_REG);
1122 }
1123
1124 /* enable irqs */
1125 int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1126 udc_write(int_en_reg | (1 << ep->num), S3C2410_UDC_EP_INT_EN_REG);
1127
1128 /* print some debug message */
1129 tmp = desc->bEndpointAddress;
1130 dprintk (DEBUG_NORMAL, "enable %s(%d) ep%x%s-blk max %02x\n",
1131 _ep->name,ep->num, tmp,
1132 desc->bEndpointAddress & USB_DIR_IN ? "in" : "out", max);
1133
1134 local_irq_restore (flags);
1135 s3c2410_udc_set_halt(_ep, 0);
1136
1137 return 0;
1138 }
1139
1140 /*
1141 * s3c2410_udc_ep_disable
1142 */
1143 static int s3c2410_udc_ep_disable(struct usb_ep *_ep)
1144 {
1145 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1146 unsigned long flags;
1147 u32 int_en_reg;
1148
1149 if (!_ep || !ep->desc) {
1150 dprintk(DEBUG_NORMAL, "%s not enabled\n",
1151 _ep ? ep->ep.name : NULL);
1152 return -EINVAL;
1153 }
1154
1155 local_irq_save(flags);
1156
1157 dprintk(DEBUG_NORMAL, "ep_disable: %s\n", _ep->name);
1158
1159 ep->desc = NULL;
1160 ep->halted = 1;
1161
1162 s3c2410_udc_nuke (ep->dev, ep, -ESHUTDOWN);
1163
1164 /* disable irqs */
1165 int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1166 udc_write(int_en_reg & ~(1<<ep->num), S3C2410_UDC_EP_INT_EN_REG);
1167
1168 local_irq_restore(flags);
1169
1170 dprintk(DEBUG_NORMAL, "%s disabled\n", _ep->name);
1171
1172 return 0;
1173 }
1174
1175 /*
1176 * s3c2410_udc_alloc_request
1177 */
1178 static struct usb_request *
1179 s3c2410_udc_alloc_request(struct usb_ep *_ep, gfp_t mem_flags)
1180 {
1181 struct s3c2410_request *req;
1182
1183 dprintk(DEBUG_VERBOSE,"%s(%p,%d)\n", __func__, _ep, mem_flags);
1184
1185 if (!_ep)
1186 return NULL;
1187
1188 req = kzalloc (sizeof(struct s3c2410_request), mem_flags);
1189 if (!req)
1190 return NULL;
1191
1192 INIT_LIST_HEAD (&req->queue);
1193 return &req->req;
1194 }
1195
1196 /*
1197 * s3c2410_udc_free_request
1198 */
1199 static void
1200 s3c2410_udc_free_request(struct usb_ep *_ep, struct usb_request *_req)
1201 {
1202 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1203 struct s3c2410_request *req = to_s3c2410_req(_req);
1204
1205 dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1206
1207 if (!ep || !_req || (!ep->desc && _ep->name != ep0name))
1208 return;
1209
1210 WARN_ON (!list_empty (&req->queue));
1211 kfree(req);
1212 }
1213
1214 /*
1215 * s3c2410_udc_queue
1216 */
1217 static int s3c2410_udc_queue(struct usb_ep *_ep, struct usb_request *_req,
1218 gfp_t gfp_flags)
1219 {
1220 struct s3c2410_request *req = to_s3c2410_req(_req);
1221 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1222 struct s3c2410_udc *dev;
1223 u32 ep_csr = 0;
1224 int fifo_count = 0;
1225 unsigned long flags;
1226
1227 if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) {
1228 dprintk(DEBUG_NORMAL, "%s: invalid args\n", __func__);
1229 return -EINVAL;
1230 }
1231
1232 dev = ep->dev;
1233 if (unlikely (!dev->driver
1234 || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1235 return -ESHUTDOWN;
1236 }
1237
1238 local_irq_save (flags);
1239
1240 if (unlikely(!_req || !_req->complete
1241 || !_req->buf || !list_empty(&req->queue))) {
1242 if (!_req)
1243 dprintk(DEBUG_NORMAL, "%s: 1 X X X\n", __func__);
1244 else {
1245 dprintk(DEBUG_NORMAL, "%s: 0 %01d %01d %01d\n",
1246 __func__, !_req->complete,!_req->buf,
1247 !list_empty(&req->queue));
1248 }
1249
1250 local_irq_restore(flags);
1251 return -EINVAL;
1252 }
1253
1254 _req->status = -EINPROGRESS;
1255 _req->actual = 0;
1256
1257 dprintk(DEBUG_VERBOSE, "%s: ep%x len %d\n",
1258 __func__, ep->bEndpointAddress, _req->length);
1259
1260 if (ep->bEndpointAddress) {
1261 udc_write(ep->bEndpointAddress & 0x7F, S3C2410_UDC_INDEX_REG);
1262
1263 ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)
1264 ? S3C2410_UDC_IN_CSR1_REG
1265 : S3C2410_UDC_OUT_CSR1_REG);
1266 fifo_count = s3c2410_udc_fifo_count_out();
1267 } else {
1268 udc_write(0, S3C2410_UDC_INDEX_REG);
1269 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
1270 fifo_count = s3c2410_udc_fifo_count_out();
1271 }
1272
1273 /* kickstart this i/o queue? */
1274 if (list_empty(&ep->queue) && !ep->halted) {
1275 if (ep->bEndpointAddress == 0 /* ep0 */) {
1276 switch (dev->ep0state) {
1277 case EP0_IN_DATA_PHASE:
1278 if (!(ep_csr&S3C2410_UDC_EP0_CSR_IPKRDY)
1279 && s3c2410_udc_write_fifo(ep,
1280 req)) {
1281 dev->ep0state = EP0_IDLE;
1282 req = NULL;
1283 }
1284 break;
1285
1286 case EP0_OUT_DATA_PHASE:
1287 if ((!_req->length)
1288 || ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1289 && s3c2410_udc_read_fifo(ep,
1290 req))) {
1291 dev->ep0state = EP0_IDLE;
1292 req = NULL;
1293 }
1294 break;
1295
1296 default:
1297 local_irq_restore(flags);
1298 return -EL2HLT;
1299 }
1300 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0
1301 && (!(ep_csr&S3C2410_UDC_OCSR1_PKTRDY))
1302 && s3c2410_udc_write_fifo(ep, req)) {
1303 req = NULL;
1304 } else if ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1305 && fifo_count
1306 && s3c2410_udc_read_fifo(ep, req)) {
1307 req = NULL;
1308 }
1309 }
1310
1311 /* pio or dma irq handler advances the queue. */
1312 if (likely (req != 0))
1313 list_add_tail(&req->queue, &ep->queue);
1314
1315 local_irq_restore(flags);
1316
1317 dprintk(DEBUG_VERBOSE, "%s ok\n", __func__);
1318 return 0;
1319 }
1320
1321 /*
1322 * s3c2410_udc_dequeue
1323 */
1324 static int s3c2410_udc_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1325 {
1326 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1327 struct s3c2410_udc *udc;
1328 int retval = -EINVAL;
1329 unsigned long flags;
1330 struct s3c2410_request *req = NULL;
1331
1332 dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1333
1334 if (!the_controller->driver)
1335 return -ESHUTDOWN;
1336
1337 if (!_ep || !_req)
1338 return retval;
1339
1340 udc = to_s3c2410_udc(ep->gadget);
1341
1342 local_irq_save (flags);
1343
1344 list_for_each_entry (req, &ep->queue, queue) {
1345 if (&req->req == _req) {
1346 list_del_init (&req->queue);
1347 _req->status = -ECONNRESET;
1348 retval = 0;
1349 break;
1350 }
1351 }
1352
1353 if (retval == 0) {
1354 dprintk(DEBUG_VERBOSE,
1355 "dequeued req %p from %s, len %d buf %p\n",
1356 req, _ep->name, _req->length, _req->buf);
1357
1358 s3c2410_udc_done(ep, req, -ECONNRESET);
1359 }
1360
1361 local_irq_restore (flags);
1362 return retval;
1363 }
1364
1365 /*
1366 * s3c2410_udc_set_halt
1367 */
1368 static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value)
1369 {
1370 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1371 u32 ep_csr = 0;
1372 unsigned long flags;
1373 u32 idx;
1374
1375 if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) {
1376 dprintk(DEBUG_NORMAL, "%s: inval 2\n", __func__);
1377 return -EINVAL;
1378 }
1379
1380 local_irq_save (flags);
1381
1382 idx = ep->bEndpointAddress & 0x7F;
1383
1384 if (idx == 0) {
1385 s3c2410_udc_set_ep0_ss(base_addr);
1386 s3c2410_udc_set_ep0_de_out(base_addr);
1387 } else {
1388 udc_write(idx, S3C2410_UDC_INDEX_REG);
1389 ep_csr = udc_read((ep->bEndpointAddress &USB_DIR_IN)
1390 ? S3C2410_UDC_IN_CSR1_REG
1391 : S3C2410_UDC_OUT_CSR1_REG);
1392
1393 if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
1394 if (value)
1395 udc_write(ep_csr | S3C2410_UDC_ICSR1_SENDSTL,
1396 S3C2410_UDC_IN_CSR1_REG);
1397 else {
1398 ep_csr &= ~S3C2410_UDC_ICSR1_SENDSTL;
1399 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1400 ep_csr |= S3C2410_UDC_ICSR1_CLRDT;
1401 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1402 }
1403 } else {
1404 if (value)
1405 udc_write(ep_csr | S3C2410_UDC_OCSR1_SENDSTL,
1406 S3C2410_UDC_OUT_CSR1_REG);
1407 else {
1408 ep_csr &= ~S3C2410_UDC_OCSR1_SENDSTL;
1409 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1410 ep_csr |= S3C2410_UDC_OCSR1_CLRDT;
1411 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1412 }
1413 }
1414 }
1415
1416 ep->halted = value ? 1 : 0;
1417 local_irq_restore (flags);
1418
1419 return 0;
1420 }
1421
1422 static const struct usb_ep_ops s3c2410_ep_ops = {
1423 .enable = s3c2410_udc_ep_enable,
1424 .disable = s3c2410_udc_ep_disable,
1425
1426 .alloc_request = s3c2410_udc_alloc_request,
1427 .free_request = s3c2410_udc_free_request,
1428
1429 .queue = s3c2410_udc_queue,
1430 .dequeue = s3c2410_udc_dequeue,
1431
1432 .set_halt = s3c2410_udc_set_halt,
1433 };
1434
1435 /*------------------------- usb_gadget_ops ----------------------------------*/
1436
1437 /*
1438 * s3c2410_udc_get_frame
1439 */
1440 static int s3c2410_udc_get_frame(struct usb_gadget *_gadget)
1441 {
1442 int tmp;
1443
1444 dprintk(DEBUG_VERBOSE, "%s()\n", __func__);
1445
1446 tmp = udc_read(S3C2410_UDC_FRAME_NUM2_REG) << 8;
1447 tmp |= udc_read(S3C2410_UDC_FRAME_NUM1_REG);
1448 return tmp;
1449 }
1450
1451 /*
1452 * s3c2410_udc_wakeup
1453 */
1454 static int s3c2410_udc_wakeup(struct usb_gadget *_gadget)
1455 {
1456 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1457 return 0;
1458 }
1459
1460 /*
1461 * s3c2410_udc_set_selfpowered
1462 */
1463 static int s3c2410_udc_set_selfpowered(struct usb_gadget *gadget, int value)
1464 {
1465 struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1466
1467 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1468
1469 if (value)
1470 udc->devstatus |= (1 << USB_DEVICE_SELF_POWERED);
1471 else
1472 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1473
1474 return 0;
1475 }
1476
1477 static void s3c2410_udc_disable(struct s3c2410_udc *dev);
1478 static void s3c2410_udc_enable(struct s3c2410_udc *dev);
1479
1480 static int s3c2410_udc_set_pullup(struct s3c2410_udc *udc, int is_on)
1481 {
1482 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1483
1484 if (udc_info && (udc_info->udc_command ||
1485 gpio_is_valid(udc_info->pullup_pin))) {
1486
1487 if (is_on)
1488 s3c2410_udc_enable(udc);
1489 else {
1490 if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1491 if (udc->driver && udc->driver->disconnect)
1492 udc->driver->disconnect(&udc->gadget);
1493
1494 }
1495 s3c2410_udc_disable(udc);
1496 }
1497 }
1498 else
1499 return -EOPNOTSUPP;
1500
1501 return 0;
1502 }
1503
1504 static int s3c2410_udc_vbus_session(struct usb_gadget *gadget, int is_active)
1505 {
1506 struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1507
1508 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1509
1510 udc->vbus = (is_active != 0);
1511 s3c2410_udc_set_pullup(udc, is_active);
1512 return 0;
1513 }
1514
1515 static int s3c2410_udc_pullup(struct usb_gadget *gadget, int is_on)
1516 {
1517 struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1518
1519 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1520
1521 s3c2410_udc_set_pullup(udc, is_on ? 0 : 1);
1522 return 0;
1523 }
1524
1525 static irqreturn_t s3c2410_udc_vbus_irq(int irq, void *_dev)
1526 {
1527 struct s3c2410_udc *dev = _dev;
1528 unsigned int value;
1529
1530 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1531
1532 value = gpio_get_value(udc_info->vbus_pin) ? 1 : 0;
1533 if (udc_info->vbus_pin_inverted)
1534 value = !value;
1535
1536 if (value != dev->vbus)
1537 s3c2410_udc_vbus_session(&dev->gadget, value);
1538
1539 return IRQ_HANDLED;
1540 }
1541
1542 static int s3c2410_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1543 {
1544 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1545
1546 if (udc_info && udc_info->vbus_draw) {
1547 udc_info->vbus_draw(ma);
1548 return 0;
1549 }
1550
1551 return -ENOTSUPP;
1552 }
1553
1554 static const struct usb_gadget_ops s3c2410_ops = {
1555 .get_frame = s3c2410_udc_get_frame,
1556 .wakeup = s3c2410_udc_wakeup,
1557 .set_selfpowered = s3c2410_udc_set_selfpowered,
1558 .pullup = s3c2410_udc_pullup,
1559 .vbus_session = s3c2410_udc_vbus_session,
1560 .vbus_draw = s3c2410_vbus_draw,
1561 };
1562
1563 static void s3c2410_udc_command(enum s3c2410_udc_cmd_e cmd)
1564 {
1565 if (!udc_info)
1566 return;
1567
1568 if (udc_info->udc_command) {
1569 udc_info->udc_command(S3C2410_UDC_P_DISABLE);
1570 } else if (gpio_is_valid(udc_info->pullup_pin)) {
1571 int value;
1572
1573 switch (cmd) {
1574 case S3C2410_UDC_P_ENABLE:
1575 value = 1;
1576 break;
1577 case S3C2410_UDC_P_DISABLE:
1578 value = 0;
1579 break;
1580 default:
1581 return;
1582 }
1583 value ^= udc_info->pullup_pin_inverted;
1584
1585 gpio_set_value(udc_info->pullup_pin, value);
1586 }
1587 }
1588
1589 /*------------------------- gadget driver handling---------------------------*/
1590 /*
1591 * s3c2410_udc_disable
1592 */
1593 static void s3c2410_udc_disable(struct s3c2410_udc *dev)
1594 {
1595 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1596
1597 /* Disable all interrupts */
1598 udc_write(0x00, S3C2410_UDC_USB_INT_EN_REG);
1599 udc_write(0x00, S3C2410_UDC_EP_INT_EN_REG);
1600
1601 /* Clear the interrupt registers */
1602 udc_write(S3C2410_UDC_USBINT_RESET
1603 | S3C2410_UDC_USBINT_RESUME
1604 | S3C2410_UDC_USBINT_SUSPEND,
1605 S3C2410_UDC_USB_INT_REG);
1606
1607 udc_write(0x1F, S3C2410_UDC_EP_INT_REG);
1608
1609 /* Good bye, cruel world */
1610 s3c2410_udc_command(S3C2410_UDC_P_DISABLE);
1611
1612 /* Set speed to unknown */
1613 dev->gadget.speed = USB_SPEED_UNKNOWN;
1614 }
1615
1616 /*
1617 * s3c2410_udc_reinit
1618 */
1619 static void s3c2410_udc_reinit(struct s3c2410_udc *dev)
1620 {
1621 u32 i;
1622
1623 /* device/ep0 records init */
1624 INIT_LIST_HEAD (&dev->gadget.ep_list);
1625 INIT_LIST_HEAD (&dev->gadget.ep0->ep_list);
1626 dev->ep0state = EP0_IDLE;
1627
1628 for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1629 struct s3c2410_ep *ep = &dev->ep[i];
1630
1631 if (i != 0)
1632 list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list);
1633
1634 ep->dev = dev;
1635 ep->desc = NULL;
1636 ep->halted = 0;
1637 INIT_LIST_HEAD (&ep->queue);
1638 }
1639 }
1640
1641 /*
1642 * s3c2410_udc_enable
1643 */
1644 static void s3c2410_udc_enable(struct s3c2410_udc *dev)
1645 {
1646 int i;
1647
1648 dprintk(DEBUG_NORMAL, "s3c2410_udc_enable called\n");
1649
1650 /* dev->gadget.speed = USB_SPEED_UNKNOWN; */
1651 dev->gadget.speed = USB_SPEED_FULL;
1652
1653 /* Set MAXP for all endpoints */
1654 for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1655 udc_write(i, S3C2410_UDC_INDEX_REG);
1656 udc_write((dev->ep[i].ep.maxpacket & 0x7ff) >> 3,
1657 S3C2410_UDC_MAXP_REG);
1658 }
1659
1660 /* Set default power state */
1661 udc_write(DEFAULT_POWER_STATE, S3C2410_UDC_PWR_REG);
1662
1663 /* Enable reset and suspend interrupt interrupts */
1664 udc_write(S3C2410_UDC_USBINT_RESET | S3C2410_UDC_USBINT_SUSPEND,
1665 S3C2410_UDC_USB_INT_EN_REG);
1666
1667 /* Enable ep0 interrupt */
1668 udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_EN_REG);
1669
1670 /* time to say "hello, world" */
1671 s3c2410_udc_command(S3C2410_UDC_P_ENABLE);
1672 }
1673
1674 /*
1675 * usb_gadget_probe_driver
1676 */
1677 int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
1678 int (*bind)(struct usb_gadget *))
1679 {
1680 struct s3c2410_udc *udc = the_controller;
1681 int retval;
1682
1683 dprintk(DEBUG_NORMAL, "%s() '%s'\n", __func__, driver->driver.name);
1684
1685 /* Sanity checks */
1686 if (!udc)
1687 return -ENODEV;
1688
1689 if (udc->driver)
1690 return -EBUSY;
1691
1692 if (!bind || !driver->setup || driver->speed < USB_SPEED_FULL) {
1693 printk(KERN_ERR "Invalid driver: bind %p setup %p speed %d\n",
1694 bind, driver->setup, driver->speed);
1695 return -EINVAL;
1696 }
1697 #if defined(MODULE)
1698 if (!driver->unbind) {
1699 printk(KERN_ERR "Invalid driver: no unbind method\n");
1700 return -EINVAL;
1701 }
1702 #endif
1703
1704 /* Hook the driver */
1705 udc->driver = driver;
1706 udc->gadget.dev.driver = &driver->driver;
1707
1708 /* Bind the driver */
1709 if ((retval = device_add(&udc->gadget.dev)) != 0) {
1710 printk(KERN_ERR "Error in device_add() : %d\n",retval);
1711 goto register_error;
1712 }
1713
1714 dprintk(DEBUG_NORMAL, "binding gadget driver '%s'\n",
1715 driver->driver.name);
1716
1717 if ((retval = bind(&udc->gadget)) != 0) {
1718 device_del(&udc->gadget.dev);
1719 goto register_error;
1720 }
1721
1722 /* Enable udc */
1723 s3c2410_udc_enable(udc);
1724
1725 return 0;
1726
1727 register_error:
1728 udc->driver = NULL;
1729 udc->gadget.dev.driver = NULL;
1730 return retval;
1731 }
1732 EXPORT_SYMBOL(usb_gadget_probe_driver);
1733
1734 /*
1735 * usb_gadget_unregister_driver
1736 */
1737 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1738 {
1739 struct s3c2410_udc *udc = the_controller;
1740
1741 if (!udc)
1742 return -ENODEV;
1743
1744 if (!driver || driver != udc->driver || !driver->unbind)
1745 return -EINVAL;
1746
1747 dprintk(DEBUG_NORMAL, "usb_gadget_unregister_driver() '%s'\n",
1748 driver->driver.name);
1749
1750 /* report disconnect */
1751 if (driver->disconnect)
1752 driver->disconnect(&udc->gadget);
1753
1754 driver->unbind(&udc->gadget);
1755
1756 device_del(&udc->gadget.dev);
1757 udc->driver = NULL;
1758
1759 /* Disable udc */
1760 s3c2410_udc_disable(udc);
1761
1762 return 0;
1763 }
1764
1765 /*---------------------------------------------------------------------------*/
1766 static struct s3c2410_udc memory = {
1767 .gadget = {
1768 .ops = &s3c2410_ops,
1769 .ep0 = &memory.ep[0].ep,
1770 .name = gadget_name,
1771 .dev = {
1772 .init_name = "gadget",
1773 },
1774 },
1775
1776 /* control endpoint */
1777 .ep[0] = {
1778 .num = 0,
1779 .ep = {
1780 .name = ep0name,
1781 .ops = &s3c2410_ep_ops,
1782 .maxpacket = EP0_FIFO_SIZE,
1783 },
1784 .dev = &memory,
1785 },
1786
1787 /* first group of endpoints */
1788 .ep[1] = {
1789 .num = 1,
1790 .ep = {
1791 .name = "ep1-bulk",
1792 .ops = &s3c2410_ep_ops,
1793 .maxpacket = EP_FIFO_SIZE,
1794 },
1795 .dev = &memory,
1796 .fifo_size = EP_FIFO_SIZE,
1797 .bEndpointAddress = 1,
1798 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1799 },
1800 .ep[2] = {
1801 .num = 2,
1802 .ep = {
1803 .name = "ep2-bulk",
1804 .ops = &s3c2410_ep_ops,
1805 .maxpacket = EP_FIFO_SIZE,
1806 },
1807 .dev = &memory,
1808 .fifo_size = EP_FIFO_SIZE,
1809 .bEndpointAddress = 2,
1810 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1811 },
1812 .ep[3] = {
1813 .num = 3,
1814 .ep = {
1815 .name = "ep3-bulk",
1816 .ops = &s3c2410_ep_ops,
1817 .maxpacket = EP_FIFO_SIZE,
1818 },
1819 .dev = &memory,
1820 .fifo_size = EP_FIFO_SIZE,
1821 .bEndpointAddress = 3,
1822 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1823 },
1824 .ep[4] = {
1825 .num = 4,
1826 .ep = {
1827 .name = "ep4-bulk",
1828 .ops = &s3c2410_ep_ops,
1829 .maxpacket = EP_FIFO_SIZE,
1830 },
1831 .dev = &memory,
1832 .fifo_size = EP_FIFO_SIZE,
1833 .bEndpointAddress = 4,
1834 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1835 }
1836
1837 };
1838
1839 /*
1840 * probe - binds to the platform device
1841 */
1842 static int s3c2410_udc_probe(struct platform_device *pdev)
1843 {
1844 struct s3c2410_udc *udc = &memory;
1845 struct device *dev = &pdev->dev;
1846 int retval;
1847 int irq;
1848
1849 dev_dbg(dev, "%s()\n", __func__);
1850
1851 usb_bus_clock = clk_get(NULL, "usb-bus-gadget");
1852 if (IS_ERR(usb_bus_clock)) {
1853 dev_err(dev, "failed to get usb bus clock source\n");
1854 return PTR_ERR(usb_bus_clock);
1855 }
1856
1857 clk_enable(usb_bus_clock);
1858
1859 udc_clock = clk_get(NULL, "usb-device");
1860 if (IS_ERR(udc_clock)) {
1861 dev_err(dev, "failed to get udc clock source\n");
1862 return PTR_ERR(udc_clock);
1863 }
1864
1865 clk_enable(udc_clock);
1866
1867 mdelay(10);
1868
1869 dev_dbg(dev, "got and enabled clocks\n");
1870
1871 if (strncmp(pdev->name, "s3c2440", 7) == 0) {
1872 dev_info(dev, "S3C2440: increasing FIFO to 128 bytes\n");
1873 memory.ep[1].fifo_size = S3C2440_EP_FIFO_SIZE;
1874 memory.ep[2].fifo_size = S3C2440_EP_FIFO_SIZE;
1875 memory.ep[3].fifo_size = S3C2440_EP_FIFO_SIZE;
1876 memory.ep[4].fifo_size = S3C2440_EP_FIFO_SIZE;
1877 }
1878
1879 spin_lock_init (&udc->lock);
1880 udc_info = pdev->dev.platform_data;
1881
1882 rsrc_start = S3C2410_PA_USBDEV;
1883 rsrc_len = S3C24XX_SZ_USBDEV;
1884
1885 if (!request_mem_region(rsrc_start, rsrc_len, gadget_name))
1886 return -EBUSY;
1887
1888 base_addr = ioremap(rsrc_start, rsrc_len);
1889 if (!base_addr) {
1890 retval = -ENOMEM;
1891 goto err_mem;
1892 }
1893
1894 device_initialize(&udc->gadget.dev);
1895 udc->gadget.dev.parent = &pdev->dev;
1896 udc->gadget.dev.dma_mask = pdev->dev.dma_mask;
1897
1898 the_controller = udc;
1899 platform_set_drvdata(pdev, udc);
1900
1901 s3c2410_udc_disable(udc);
1902 s3c2410_udc_reinit(udc);
1903
1904 /* irq setup after old hardware state is cleaned up */
1905 retval = request_irq(IRQ_USBD, s3c2410_udc_irq,
1906 IRQF_DISABLED, gadget_name, udc);
1907
1908 if (retval != 0) {
1909 dev_err(dev, "cannot get irq %i, err %d\n", IRQ_USBD, retval);
1910 retval = -EBUSY;
1911 goto err_map;
1912 }
1913
1914 dev_dbg(dev, "got irq %i\n", IRQ_USBD);
1915
1916 if (udc_info && udc_info->vbus_pin > 0) {
1917 retval = gpio_request(udc_info->vbus_pin, "udc vbus");
1918 if (retval < 0) {
1919 dev_err(dev, "cannot claim vbus pin\n");
1920 goto err_int;
1921 }
1922
1923 irq = gpio_to_irq(udc_info->vbus_pin);
1924 if (irq < 0) {
1925 dev_err(dev, "no irq for gpio vbus pin\n");
1926 goto err_gpio_claim;
1927 }
1928
1929 retval = request_irq(irq, s3c2410_udc_vbus_irq,
1930 IRQF_DISABLED | IRQF_TRIGGER_RISING
1931 | IRQF_TRIGGER_FALLING | IRQF_SHARED,
1932 gadget_name, udc);
1933
1934 if (retval != 0) {
1935 dev_err(dev, "can't get vbus irq %d, err %d\n",
1936 irq, retval);
1937 retval = -EBUSY;
1938 goto err_gpio_claim;
1939 }
1940
1941 dev_dbg(dev, "got irq %i\n", irq);
1942 } else {
1943 udc->vbus = 1;
1944 }
1945
1946 if (udc_info && !udc_info->udc_command &&
1947 gpio_is_valid(udc_info->pullup_pin)) {
1948
1949 retval = gpio_request_one(udc_info->pullup_pin,
1950 udc_info->vbus_pin_inverted ?
1951 GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW,
1952 "udc pullup");
1953 if (retval)
1954 goto err_vbus_irq;
1955 }
1956
1957 if (s3c2410_udc_debugfs_root) {
1958 udc->regs_info = debugfs_create_file("registers", S_IRUGO,
1959 s3c2410_udc_debugfs_root,
1960 udc, &s3c2410_udc_debugfs_fops);
1961 if (!udc->regs_info)
1962 dev_warn(dev, "debugfs file creation failed\n");
1963 }
1964
1965 dev_dbg(dev, "probe ok\n");
1966
1967 return 0;
1968
1969 err_vbus_irq:
1970 if (udc_info && udc_info->vbus_pin > 0)
1971 free_irq(gpio_to_irq(udc_info->vbus_pin), udc);
1972 err_gpio_claim:
1973 if (udc_info && udc_info->vbus_pin > 0)
1974 gpio_free(udc_info->vbus_pin);
1975 err_int:
1976 free_irq(IRQ_USBD, udc);
1977 err_map:
1978 iounmap(base_addr);
1979 err_mem:
1980 release_mem_region(rsrc_start, rsrc_len);
1981
1982 return retval;
1983 }
1984
1985 /*
1986 * s3c2410_udc_remove
1987 */
1988 static int s3c2410_udc_remove(struct platform_device *pdev)
1989 {
1990 struct s3c2410_udc *udc = platform_get_drvdata(pdev);
1991 unsigned int irq;
1992
1993 dev_dbg(&pdev->dev, "%s()\n", __func__);
1994 if (udc->driver)
1995 return -EBUSY;
1996
1997 debugfs_remove(udc->regs_info);
1998
1999 if (udc_info && !udc_info->udc_command &&
2000 gpio_is_valid(udc_info->pullup_pin))
2001 gpio_free(udc_info->pullup_pin);
2002
2003 if (udc_info && udc_info->vbus_pin > 0) {
2004 irq = gpio_to_irq(udc_info->vbus_pin);
2005 free_irq(irq, udc);
2006 }
2007
2008 free_irq(IRQ_USBD, udc);
2009
2010 iounmap(base_addr);
2011 release_mem_region(rsrc_start, rsrc_len);
2012
2013 platform_set_drvdata(pdev, NULL);
2014
2015 if (!IS_ERR(udc_clock) && udc_clock != NULL) {
2016 clk_disable(udc_clock);
2017 clk_put(udc_clock);
2018 udc_clock = NULL;
2019 }
2020
2021 if (!IS_ERR(usb_bus_clock) && usb_bus_clock != NULL) {
2022 clk_disable(usb_bus_clock);
2023 clk_put(usb_bus_clock);
2024 usb_bus_clock = NULL;
2025 }
2026
2027 dev_dbg(&pdev->dev, "%s: remove ok\n", __func__);
2028 return 0;
2029 }
2030
2031 #ifdef CONFIG_PM
2032 static int s3c2410_udc_suspend(struct platform_device *pdev, pm_message_t message)
2033 {
2034 s3c2410_udc_command(S3C2410_UDC_P_DISABLE);
2035
2036 return 0;
2037 }
2038
2039 static int s3c2410_udc_resume(struct platform_device *pdev)
2040 {
2041 s3c2410_udc_command(S3C2410_UDC_P_ENABLE);
2042
2043 return 0;
2044 }
2045 #else
2046 #define s3c2410_udc_suspend NULL
2047 #define s3c2410_udc_resume NULL
2048 #endif
2049
2050 static struct platform_driver udc_driver_2410 = {
2051 .driver = {
2052 .name = "s3c2410-usbgadget",
2053 .owner = THIS_MODULE,
2054 },
2055 .probe = s3c2410_udc_probe,
2056 .remove = s3c2410_udc_remove,
2057 .suspend = s3c2410_udc_suspend,
2058 .resume = s3c2410_udc_resume,
2059 };
2060
2061 static struct platform_driver udc_driver_2440 = {
2062 .driver = {
2063 .name = "s3c2440-usbgadget",
2064 .owner = THIS_MODULE,
2065 },
2066 .probe = s3c2410_udc_probe,
2067 .remove = s3c2410_udc_remove,
2068 .suspend = s3c2410_udc_suspend,
2069 .resume = s3c2410_udc_resume,
2070 };
2071
2072 static int __init udc_init(void)
2073 {
2074 int retval;
2075
2076 dprintk(DEBUG_NORMAL, "%s: version %s\n", gadget_name, DRIVER_VERSION);
2077
2078 s3c2410_udc_debugfs_root = debugfs_create_dir(gadget_name, NULL);
2079 if (IS_ERR(s3c2410_udc_debugfs_root)) {
2080 printk(KERN_ERR "%s: debugfs dir creation failed %ld\n",
2081 gadget_name, PTR_ERR(s3c2410_udc_debugfs_root));
2082 s3c2410_udc_debugfs_root = NULL;
2083 }
2084
2085 retval = platform_driver_register(&udc_driver_2410);
2086 if (retval)
2087 goto err;
2088
2089 retval = platform_driver_register(&udc_driver_2440);
2090 if (retval)
2091 goto err;
2092
2093 return 0;
2094
2095 err:
2096 debugfs_remove(s3c2410_udc_debugfs_root);
2097 return retval;
2098 }
2099
2100 static void __exit udc_exit(void)
2101 {
2102 platform_driver_unregister(&udc_driver_2410);
2103 platform_driver_unregister(&udc_driver_2440);
2104 debugfs_remove(s3c2410_udc_debugfs_root);
2105 }
2106
2107 EXPORT_SYMBOL(usb_gadget_unregister_driver);
2108
2109 module_init(udc_init);
2110 module_exit(udc_exit);
2111
2112 MODULE_AUTHOR(DRIVER_AUTHOR);
2113 MODULE_DESCRIPTION(DRIVER_DESC);
2114 MODULE_VERSION(DRIVER_VERSION);
2115 MODULE_LICENSE("GPL");
2116 MODULE_ALIAS("platform:s3c2410-usbgadget");
2117 MODULE_ALIAS("platform:s3c2440-usbgadget");
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