Add linux-next specific files for 20110421
[linux-2.6/next.git] / drivers / usb / host / uhci-hcd.c
blob83344d688ff045c8879b6db2ee0cab3d0006694b
1 /*
2 * Universal Host Controller Interface driver for USB.
4 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
6 * (C) Copyright 1999 Linus Torvalds
7 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
8 * (C) Copyright 1999 Randy Dunlap
9 * (C) Copyright 1999 Georg Acher, acher@in.tum.de
10 * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
11 * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
12 * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
13 * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
14 * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
15 * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
16 * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu
18 * Intel documents this fairly well, and as far as I know there
19 * are no royalties or anything like that, but even so there are
20 * people who decided that they want to do the same thing in a
21 * completely different way.
25 #include <linux/module.h>
26 #include <linux/pci.h>
27 #include <linux/kernel.h>
28 #include <linux/init.h>
29 #include <linux/delay.h>
30 #include <linux/ioport.h>
31 #include <linux/slab.h>
32 #include <linux/errno.h>
33 #include <linux/unistd.h>
34 #include <linux/interrupt.h>
35 #include <linux/spinlock.h>
36 #include <linux/debugfs.h>
37 #include <linux/pm.h>
38 #include <linux/dmapool.h>
39 #include <linux/dma-mapping.h>
40 #include <linux/usb.h>
41 #include <linux/usb/hcd.h>
42 #include <linux/bitops.h>
43 #include <linux/dmi.h>
45 #include <asm/uaccess.h>
46 #include <asm/io.h>
47 #include <asm/irq.h>
48 #include <asm/system.h>
50 #include "uhci-hcd.h"
51 #include "pci-quirks.h"
54 * Version Information
56 #define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \
57 Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \
58 Alan Stern"
59 #define DRIVER_DESC "USB Universal Host Controller Interface driver"
61 /* for flakey hardware, ignore overcurrent indicators */
62 static int ignore_oc;
63 module_param(ignore_oc, bool, S_IRUGO);
64 MODULE_PARM_DESC(ignore_oc, "ignore hardware overcurrent indications");
67 * debug = 0, no debugging messages
68 * debug = 1, dump failed URBs except for stalls
69 * debug = 2, dump all failed URBs (including stalls)
70 * show all queues in /sys/kernel/debug/uhci/[pci_addr]
71 * debug = 3, show all TDs in URBs when dumping
73 #ifdef DEBUG
74 #define DEBUG_CONFIGURED 1
75 static int debug = 1;
76 module_param(debug, int, S_IRUGO | S_IWUSR);
77 MODULE_PARM_DESC(debug, "Debug level");
79 #else
80 #define DEBUG_CONFIGURED 0
81 #define debug 0
82 #endif
84 static char *errbuf;
85 #define ERRBUF_LEN (32 * 1024)
87 static struct kmem_cache *uhci_up_cachep; /* urb_priv */
89 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state);
90 static void wakeup_rh(struct uhci_hcd *uhci);
91 static void uhci_get_current_frame_number(struct uhci_hcd *uhci);
94 * Calculate the link pointer DMA value for the first Skeleton QH in a frame.
96 static __le32 uhci_frame_skel_link(struct uhci_hcd *uhci, int frame)
98 int skelnum;
101 * The interrupt queues will be interleaved as evenly as possible.
102 * There's not much to be done about period-1 interrupts; they have
103 * to occur in every frame. But we can schedule period-2 interrupts
104 * in odd-numbered frames, period-4 interrupts in frames congruent
105 * to 2 (mod 4), and so on. This way each frame only has two
106 * interrupt QHs, which will help spread out bandwidth utilization.
108 * ffs (Find First bit Set) does exactly what we need:
109 * 1,3,5,... => ffs = 0 => use period-2 QH = skelqh[8],
110 * 2,6,10,... => ffs = 1 => use period-4 QH = skelqh[7], etc.
111 * ffs >= 7 => not on any high-period queue, so use
112 * period-1 QH = skelqh[9].
113 * Add in UHCI_NUMFRAMES to insure at least one bit is set.
115 skelnum = 8 - (int) __ffs(frame | UHCI_NUMFRAMES);
116 if (skelnum <= 1)
117 skelnum = 9;
118 return LINK_TO_QH(uhci->skelqh[skelnum]);
121 #include "uhci-debug.c"
122 #include "uhci-q.c"
123 #include "uhci-hub.c"
126 * Finish up a host controller reset and update the recorded state.
128 static void finish_reset(struct uhci_hcd *uhci)
130 int port;
132 /* HCRESET doesn't affect the Suspend, Reset, and Resume Detect
133 * bits in the port status and control registers.
134 * We have to clear them by hand.
136 for (port = 0; port < uhci->rh_numports; ++port)
137 outw(0, uhci->io_addr + USBPORTSC1 + (port * 2));
139 uhci->port_c_suspend = uhci->resuming_ports = 0;
140 uhci->rh_state = UHCI_RH_RESET;
141 uhci->is_stopped = UHCI_IS_STOPPED;
142 clear_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags);
146 * Last rites for a defunct/nonfunctional controller
147 * or one we don't want to use any more.
149 static void uhci_hc_died(struct uhci_hcd *uhci)
151 uhci_get_current_frame_number(uhci);
152 uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr);
153 finish_reset(uhci);
154 uhci->dead = 1;
156 /* The current frame may already be partway finished */
157 ++uhci->frame_number;
161 * Initialize a controller that was newly discovered or has lost power
162 * or otherwise been reset while it was suspended. In none of these cases
163 * can we be sure of its previous state.
165 static void check_and_reset_hc(struct uhci_hcd *uhci)
167 if (uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr))
168 finish_reset(uhci);
172 * Store the basic register settings needed by the controller.
174 static void configure_hc(struct uhci_hcd *uhci)
176 struct pci_dev *pdev = to_pci_dev(uhci_dev(uhci));
178 /* Set the frame length to the default: 1 ms exactly */
179 outb(USBSOF_DEFAULT, uhci->io_addr + USBSOF);
181 /* Store the frame list base address */
182 outl(uhci->frame_dma_handle, uhci->io_addr + USBFLBASEADD);
184 /* Set the current frame number */
185 outw(uhci->frame_number & UHCI_MAX_SOF_NUMBER,
186 uhci->io_addr + USBFRNUM);
188 /* Enable PIRQ */
189 pci_write_config_word(pdev, USBLEGSUP, USBLEGSUP_DEFAULT);
191 /* Disable platform-specific non-PME# wakeup */
192 if (pdev->vendor == PCI_VENDOR_ID_INTEL)
193 pci_write_config_byte(pdev, USBRES_INTEL, 0);
197 static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
199 int port;
201 /* If we have to ignore overcurrent events then almost by definition
202 * we can't depend on resume-detect interrupts. */
203 if (ignore_oc)
204 return 1;
206 switch (to_pci_dev(uhci_dev(uhci))->vendor) {
207 default:
208 break;
210 case PCI_VENDOR_ID_GENESYS:
211 /* Genesys Logic's GL880S controllers don't generate
212 * resume-detect interrupts.
214 return 1;
216 case PCI_VENDOR_ID_INTEL:
217 /* Some of Intel's USB controllers have a bug that causes
218 * resume-detect interrupts if any port has an over-current
219 * condition. To make matters worse, some motherboards
220 * hardwire unused USB ports' over-current inputs active!
221 * To prevent problems, we will not enable resume-detect
222 * interrupts if any ports are OC.
224 for (port = 0; port < uhci->rh_numports; ++port) {
225 if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
226 USBPORTSC_OC)
227 return 1;
229 break;
231 return 0;
234 static int global_suspend_mode_is_broken(struct uhci_hcd *uhci)
236 int port;
237 const char *sys_info;
238 static char bad_Asus_board[] = "A7V8X";
240 /* One of Asus's motherboards has a bug which causes it to
241 * wake up immediately from suspend-to-RAM if any of the ports
242 * are connected. In such cases we will not set EGSM.
244 sys_info = dmi_get_system_info(DMI_BOARD_NAME);
245 if (sys_info && !strcmp(sys_info, bad_Asus_board)) {
246 for (port = 0; port < uhci->rh_numports; ++port) {
247 if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
248 USBPORTSC_CCS)
249 return 1;
253 return 0;
256 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state)
257 __releases(uhci->lock)
258 __acquires(uhci->lock)
260 int auto_stop;
261 int int_enable, egsm_enable, wakeup_enable;
262 struct usb_device *rhdev = uhci_to_hcd(uhci)->self.root_hub;
264 auto_stop = (new_state == UHCI_RH_AUTO_STOPPED);
265 dev_dbg(&rhdev->dev, "%s%s\n", __func__,
266 (auto_stop ? " (auto-stop)" : ""));
268 /* Start off by assuming Resume-Detect interrupts and EGSM work
269 * and that remote wakeups should be enabled.
271 egsm_enable = USBCMD_EGSM;
272 uhci->RD_enable = 1;
273 int_enable = USBINTR_RESUME;
274 wakeup_enable = 1;
276 /* In auto-stop mode wakeups must always be detected, but
277 * Resume-Detect interrupts may be prohibited. (In the absence
278 * of CONFIG_PM, they are always disallowed.)
280 if (auto_stop) {
281 if (!device_may_wakeup(&rhdev->dev))
282 int_enable = 0;
284 /* In bus-suspend mode wakeups may be disabled, but if they are
285 * allowed then so are Resume-Detect interrupts.
287 } else {
288 #ifdef CONFIG_PM
289 if (!rhdev->do_remote_wakeup)
290 wakeup_enable = 0;
291 #endif
294 /* EGSM causes the root hub to echo a 'K' signal (resume) out any
295 * port which requests a remote wakeup. According to the USB spec,
296 * every hub is supposed to do this. But if we are ignoring
297 * remote-wakeup requests anyway then there's no point to it.
298 * We also shouldn't enable EGSM if it's broken.
300 if (!wakeup_enable || global_suspend_mode_is_broken(uhci))
301 egsm_enable = 0;
303 /* If we're ignoring wakeup events then there's no reason to
304 * enable Resume-Detect interrupts. We also shouldn't enable
305 * them if they are broken or disallowed.
307 * This logic may lead us to enabling RD but not EGSM. The UHCI
308 * spec foolishly says that RD works only when EGSM is on, but
309 * there's no harm in enabling it anyway -- perhaps some chips
310 * will implement it!
312 if (!wakeup_enable || resume_detect_interrupts_are_broken(uhci) ||
313 !int_enable)
314 uhci->RD_enable = int_enable = 0;
316 outw(int_enable, uhci->io_addr + USBINTR);
317 outw(egsm_enable | USBCMD_CF, uhci->io_addr + USBCMD);
318 mb();
319 udelay(5);
321 /* If we're auto-stopping then no devices have been attached
322 * for a while, so there shouldn't be any active URBs and the
323 * controller should stop after a few microseconds. Otherwise
324 * we will give the controller one frame to stop.
326 if (!auto_stop && !(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) {
327 uhci->rh_state = UHCI_RH_SUSPENDING;
328 spin_unlock_irq(&uhci->lock);
329 msleep(1);
330 spin_lock_irq(&uhci->lock);
331 if (uhci->dead)
332 return;
334 if (!(inw(uhci->io_addr + USBSTS) & USBSTS_HCH))
335 dev_warn(uhci_dev(uhci), "Controller not stopped yet!\n");
337 uhci_get_current_frame_number(uhci);
339 uhci->rh_state = new_state;
340 uhci->is_stopped = UHCI_IS_STOPPED;
342 /* If interrupts don't work and remote wakeup is enabled then
343 * the suspended root hub needs to be polled.
345 if (!int_enable && wakeup_enable)
346 set_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags);
347 else
348 clear_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags);
350 uhci_scan_schedule(uhci);
351 uhci_fsbr_off(uhci);
354 static void start_rh(struct uhci_hcd *uhci)
356 uhci->is_stopped = 0;
358 /* Mark it configured and running with a 64-byte max packet.
359 * All interrupts are enabled, even though RESUME won't do anything.
361 outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, uhci->io_addr + USBCMD);
362 outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP,
363 uhci->io_addr + USBINTR);
364 mb();
365 uhci->rh_state = UHCI_RH_RUNNING;
366 set_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags);
369 static void wakeup_rh(struct uhci_hcd *uhci)
370 __releases(uhci->lock)
371 __acquires(uhci->lock)
373 dev_dbg(&uhci_to_hcd(uhci)->self.root_hub->dev,
374 "%s%s\n", __func__,
375 uhci->rh_state == UHCI_RH_AUTO_STOPPED ?
376 " (auto-start)" : "");
378 /* If we are auto-stopped then no devices are attached so there's
379 * no need for wakeup signals. Otherwise we send Global Resume
380 * for 20 ms.
382 if (uhci->rh_state == UHCI_RH_SUSPENDED) {
383 unsigned egsm;
385 /* Keep EGSM on if it was set before */
386 egsm = inw(uhci->io_addr + USBCMD) & USBCMD_EGSM;
387 uhci->rh_state = UHCI_RH_RESUMING;
388 outw(USBCMD_FGR | USBCMD_CF | egsm, uhci->io_addr + USBCMD);
389 spin_unlock_irq(&uhci->lock);
390 msleep(20);
391 spin_lock_irq(&uhci->lock);
392 if (uhci->dead)
393 return;
395 /* End Global Resume and wait for EOP to be sent */
396 outw(USBCMD_CF, uhci->io_addr + USBCMD);
397 mb();
398 udelay(4);
399 if (inw(uhci->io_addr + USBCMD) & USBCMD_FGR)
400 dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n");
403 start_rh(uhci);
405 /* Restart root hub polling */
406 mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies);
409 static irqreturn_t uhci_irq(struct usb_hcd *hcd)
411 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
412 unsigned short status;
415 * Read the interrupt status, and write it back to clear the
416 * interrupt cause. Contrary to the UHCI specification, the
417 * "HC Halted" status bit is persistent: it is RO, not R/WC.
419 status = inw(uhci->io_addr + USBSTS);
420 if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */
421 return IRQ_NONE;
422 outw(status, uhci->io_addr + USBSTS); /* Clear it */
424 if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) {
425 if (status & USBSTS_HSE)
426 dev_err(uhci_dev(uhci), "host system error, "
427 "PCI problems?\n");
428 if (status & USBSTS_HCPE)
429 dev_err(uhci_dev(uhci), "host controller process "
430 "error, something bad happened!\n");
431 if (status & USBSTS_HCH) {
432 spin_lock(&uhci->lock);
433 if (uhci->rh_state >= UHCI_RH_RUNNING) {
434 dev_err(uhci_dev(uhci),
435 "host controller halted, "
436 "very bad!\n");
437 if (debug > 1 && errbuf) {
438 /* Print the schedule for debugging */
439 uhci_sprint_schedule(uhci,
440 errbuf, ERRBUF_LEN);
441 lprintk(errbuf);
443 uhci_hc_died(uhci);
444 usb_hc_died(hcd);
446 /* Force a callback in case there are
447 * pending unlinks */
448 mod_timer(&hcd->rh_timer, jiffies);
450 spin_unlock(&uhci->lock);
454 if (status & USBSTS_RD)
455 usb_hcd_poll_rh_status(hcd);
456 else {
457 spin_lock(&uhci->lock);
458 uhci_scan_schedule(uhci);
459 spin_unlock(&uhci->lock);
462 return IRQ_HANDLED;
466 * Store the current frame number in uhci->frame_number if the controller
467 * is running. Expand from 11 bits (of which we use only 10) to a
468 * full-sized integer.
470 * Like many other parts of the driver, this code relies on being polled
471 * more than once per second as long as the controller is running.
473 static void uhci_get_current_frame_number(struct uhci_hcd *uhci)
475 if (!uhci->is_stopped) {
476 unsigned delta;
478 delta = (inw(uhci->io_addr + USBFRNUM) - uhci->frame_number) &
479 (UHCI_NUMFRAMES - 1);
480 uhci->frame_number += delta;
485 * De-allocate all resources
487 static void release_uhci(struct uhci_hcd *uhci)
489 int i;
491 if (DEBUG_CONFIGURED) {
492 spin_lock_irq(&uhci->lock);
493 uhci->is_initialized = 0;
494 spin_unlock_irq(&uhci->lock);
496 debugfs_remove(uhci->dentry);
499 for (i = 0; i < UHCI_NUM_SKELQH; i++)
500 uhci_free_qh(uhci, uhci->skelqh[i]);
502 uhci_free_td(uhci, uhci->term_td);
504 dma_pool_destroy(uhci->qh_pool);
506 dma_pool_destroy(uhci->td_pool);
508 kfree(uhci->frame_cpu);
510 dma_free_coherent(uhci_dev(uhci),
511 UHCI_NUMFRAMES * sizeof(*uhci->frame),
512 uhci->frame, uhci->frame_dma_handle);
515 static int uhci_init(struct usb_hcd *hcd)
517 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
518 unsigned io_size = (unsigned) hcd->rsrc_len;
519 int port;
521 uhci->io_addr = (unsigned long) hcd->rsrc_start;
523 /* The UHCI spec says devices must have 2 ports, and goes on to say
524 * they may have more but gives no way to determine how many there
525 * are. However according to the UHCI spec, Bit 7 of the port
526 * status and control register is always set to 1. So we try to
527 * use this to our advantage. Another common failure mode when
528 * a nonexistent register is addressed is to return all ones, so
529 * we test for that also.
531 for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) {
532 unsigned int portstatus;
534 portstatus = inw(uhci->io_addr + USBPORTSC1 + (port * 2));
535 if (!(portstatus & 0x0080) || portstatus == 0xffff)
536 break;
538 if (debug)
539 dev_info(uhci_dev(uhci), "detected %d ports\n", port);
541 /* Anything greater than 7 is weird so we'll ignore it. */
542 if (port > UHCI_RH_MAXCHILD) {
543 dev_info(uhci_dev(uhci), "port count misdetected? "
544 "forcing to 2 ports\n");
545 port = 2;
547 uhci->rh_numports = port;
549 /* Kick BIOS off this hardware and reset if the controller
550 * isn't already safely quiescent.
552 check_and_reset_hc(uhci);
553 return 0;
556 /* Make sure the controller is quiescent and that we're not using it
557 * any more. This is mainly for the benefit of programs which, like kexec,
558 * expect the hardware to be idle: not doing DMA or generating IRQs.
560 * This routine may be called in a damaged or failing kernel. Hence we
561 * do not acquire the spinlock before shutting down the controller.
563 static void uhci_shutdown(struct pci_dev *pdev)
565 struct usb_hcd *hcd = pci_get_drvdata(pdev);
567 uhci_hc_died(hcd_to_uhci(hcd));
571 * Allocate a frame list, and then setup the skeleton
573 * The hardware doesn't really know any difference
574 * in the queues, but the order does matter for the
575 * protocols higher up. The order in which the queues
576 * are encountered by the hardware is:
578 * - All isochronous events are handled before any
579 * of the queues. We don't do that here, because
580 * we'll create the actual TD entries on demand.
581 * - The first queue is the high-period interrupt queue.
582 * - The second queue is the period-1 interrupt and async
583 * (low-speed control, full-speed control, then bulk) queue.
584 * - The third queue is the terminating bandwidth reclamation queue,
585 * which contains no members, loops back to itself, and is present
586 * only when FSBR is on and there are no full-speed control or bulk QHs.
588 static int uhci_start(struct usb_hcd *hcd)
590 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
591 int retval = -EBUSY;
592 int i;
593 struct dentry __maybe_unused *dentry;
595 hcd->uses_new_polling = 1;
597 spin_lock_init(&uhci->lock);
598 setup_timer(&uhci->fsbr_timer, uhci_fsbr_timeout,
599 (unsigned long) uhci);
600 INIT_LIST_HEAD(&uhci->idle_qh_list);
601 init_waitqueue_head(&uhci->waitqh);
603 #ifdef UHCI_DEBUG_OPS
604 dentry = debugfs_create_file(hcd->self.bus_name,
605 S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root,
606 uhci, &uhci_debug_operations);
607 if (!dentry) {
608 dev_err(uhci_dev(uhci), "couldn't create uhci debugfs entry\n");
609 return -ENOMEM;
611 uhci->dentry = dentry;
612 #endif
614 uhci->frame = dma_alloc_coherent(uhci_dev(uhci),
615 UHCI_NUMFRAMES * sizeof(*uhci->frame),
616 &uhci->frame_dma_handle, 0);
617 if (!uhci->frame) {
618 dev_err(uhci_dev(uhci), "unable to allocate "
619 "consistent memory for frame list\n");
620 goto err_alloc_frame;
622 memset(uhci->frame, 0, UHCI_NUMFRAMES * sizeof(*uhci->frame));
624 uhci->frame_cpu = kcalloc(UHCI_NUMFRAMES, sizeof(*uhci->frame_cpu),
625 GFP_KERNEL);
626 if (!uhci->frame_cpu) {
627 dev_err(uhci_dev(uhci), "unable to allocate "
628 "memory for frame pointers\n");
629 goto err_alloc_frame_cpu;
632 uhci->td_pool = dma_pool_create("uhci_td", uhci_dev(uhci),
633 sizeof(struct uhci_td), 16, 0);
634 if (!uhci->td_pool) {
635 dev_err(uhci_dev(uhci), "unable to create td dma_pool\n");
636 goto err_create_td_pool;
639 uhci->qh_pool = dma_pool_create("uhci_qh", uhci_dev(uhci),
640 sizeof(struct uhci_qh), 16, 0);
641 if (!uhci->qh_pool) {
642 dev_err(uhci_dev(uhci), "unable to create qh dma_pool\n");
643 goto err_create_qh_pool;
646 uhci->term_td = uhci_alloc_td(uhci);
647 if (!uhci->term_td) {
648 dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n");
649 goto err_alloc_term_td;
652 for (i = 0; i < UHCI_NUM_SKELQH; i++) {
653 uhci->skelqh[i] = uhci_alloc_qh(uhci, NULL, NULL);
654 if (!uhci->skelqh[i]) {
655 dev_err(uhci_dev(uhci), "unable to allocate QH\n");
656 goto err_alloc_skelqh;
661 * 8 Interrupt queues; link all higher int queues to int1 = async
663 for (i = SKEL_ISO + 1; i < SKEL_ASYNC; ++i)
664 uhci->skelqh[i]->link = LINK_TO_QH(uhci->skel_async_qh);
665 uhci->skel_async_qh->link = UHCI_PTR_TERM;
666 uhci->skel_term_qh->link = LINK_TO_QH(uhci->skel_term_qh);
668 /* This dummy TD is to work around a bug in Intel PIIX controllers */
669 uhci_fill_td(uhci->term_td, 0, uhci_explen(0) |
670 (0x7f << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_IN, 0);
671 uhci->term_td->link = UHCI_PTR_TERM;
672 uhci->skel_async_qh->element = uhci->skel_term_qh->element =
673 LINK_TO_TD(uhci->term_td);
676 * Fill the frame list: make all entries point to the proper
677 * interrupt queue.
679 for (i = 0; i < UHCI_NUMFRAMES; i++) {
681 /* Only place we don't use the frame list routines */
682 uhci->frame[i] = uhci_frame_skel_link(uhci, i);
686 * Some architectures require a full mb() to enforce completion of
687 * the memory writes above before the I/O transfers in configure_hc().
689 mb();
691 configure_hc(uhci);
692 uhci->is_initialized = 1;
693 spin_lock_irq(&uhci->lock);
694 start_rh(uhci);
695 spin_unlock_irq(&uhci->lock);
696 return 0;
699 * error exits:
701 err_alloc_skelqh:
702 for (i = 0; i < UHCI_NUM_SKELQH; i++) {
703 if (uhci->skelqh[i])
704 uhci_free_qh(uhci, uhci->skelqh[i]);
707 uhci_free_td(uhci, uhci->term_td);
709 err_alloc_term_td:
710 dma_pool_destroy(uhci->qh_pool);
712 err_create_qh_pool:
713 dma_pool_destroy(uhci->td_pool);
715 err_create_td_pool:
716 kfree(uhci->frame_cpu);
718 err_alloc_frame_cpu:
719 dma_free_coherent(uhci_dev(uhci),
720 UHCI_NUMFRAMES * sizeof(*uhci->frame),
721 uhci->frame, uhci->frame_dma_handle);
723 err_alloc_frame:
724 debugfs_remove(uhci->dentry);
726 return retval;
729 static void uhci_stop(struct usb_hcd *hcd)
731 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
733 spin_lock_irq(&uhci->lock);
734 if (HCD_HW_ACCESSIBLE(hcd) && !uhci->dead)
735 uhci_hc_died(uhci);
736 uhci_scan_schedule(uhci);
737 spin_unlock_irq(&uhci->lock);
738 synchronize_irq(hcd->irq);
740 del_timer_sync(&uhci->fsbr_timer);
741 release_uhci(uhci);
744 #ifdef CONFIG_PM
745 static int uhci_rh_suspend(struct usb_hcd *hcd)
747 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
748 int rc = 0;
750 spin_lock_irq(&uhci->lock);
751 if (!HCD_HW_ACCESSIBLE(hcd))
752 rc = -ESHUTDOWN;
753 else if (uhci->dead)
754 ; /* Dead controllers tell no tales */
756 /* Once the controller is stopped, port resumes that are already
757 * in progress won't complete. Hence if remote wakeup is enabled
758 * for the root hub and any ports are in the middle of a resume or
759 * remote wakeup, we must fail the suspend.
761 else if (hcd->self.root_hub->do_remote_wakeup &&
762 uhci->resuming_ports) {
763 dev_dbg(uhci_dev(uhci), "suspend failed because a port "
764 "is resuming\n");
765 rc = -EBUSY;
766 } else
767 suspend_rh(uhci, UHCI_RH_SUSPENDED);
768 spin_unlock_irq(&uhci->lock);
769 return rc;
772 static int uhci_rh_resume(struct usb_hcd *hcd)
774 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
775 int rc = 0;
777 spin_lock_irq(&uhci->lock);
778 if (!HCD_HW_ACCESSIBLE(hcd))
779 rc = -ESHUTDOWN;
780 else if (!uhci->dead)
781 wakeup_rh(uhci);
782 spin_unlock_irq(&uhci->lock);
783 return rc;
786 static int uhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
788 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
789 struct pci_dev *pdev = to_pci_dev(uhci_dev(uhci));
790 int rc = 0;
792 dev_dbg(uhci_dev(uhci), "%s\n", __func__);
794 spin_lock_irq(&uhci->lock);
795 if (!HCD_HW_ACCESSIBLE(hcd) || uhci->dead)
796 goto done_okay; /* Already suspended or dead */
798 if (uhci->rh_state > UHCI_RH_SUSPENDED) {
799 dev_warn(uhci_dev(uhci), "Root hub isn't suspended!\n");
800 rc = -EBUSY;
801 goto done;
804 /* All PCI host controllers are required to disable IRQ generation
805 * at the source, so we must turn off PIRQ.
807 pci_write_config_word(pdev, USBLEGSUP, 0);
808 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
810 /* Enable platform-specific non-PME# wakeup */
811 if (do_wakeup) {
812 if (pdev->vendor == PCI_VENDOR_ID_INTEL)
813 pci_write_config_byte(pdev, USBRES_INTEL,
814 USBPORT1EN | USBPORT2EN);
817 done_okay:
818 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
819 done:
820 spin_unlock_irq(&uhci->lock);
821 return rc;
824 static int uhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
826 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
828 dev_dbg(uhci_dev(uhci), "%s\n", __func__);
830 /* Since we aren't in D3 any more, it's safe to set this flag
831 * even if the controller was dead.
833 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
835 spin_lock_irq(&uhci->lock);
837 /* Make sure resume from hibernation re-enumerates everything */
838 if (hibernated) {
839 uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr);
840 finish_reset(uhci);
843 /* The firmware may have changed the controller settings during
844 * a system wakeup. Check it and reconfigure to avoid problems.
846 else {
847 check_and_reset_hc(uhci);
849 configure_hc(uhci);
851 /* Tell the core if the controller had to be reset */
852 if (uhci->rh_state == UHCI_RH_RESET)
853 usb_root_hub_lost_power(hcd->self.root_hub);
855 spin_unlock_irq(&uhci->lock);
857 /* If interrupts don't work and remote wakeup is enabled then
858 * the suspended root hub needs to be polled.
860 if (!uhci->RD_enable && hcd->self.root_hub->do_remote_wakeup)
861 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
863 /* Does the root hub have a port wakeup pending? */
864 usb_hcd_poll_rh_status(hcd);
865 return 0;
867 #endif
869 /* Wait until a particular device/endpoint's QH is idle, and free it */
870 static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd,
871 struct usb_host_endpoint *hep)
873 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
874 struct uhci_qh *qh;
876 spin_lock_irq(&uhci->lock);
877 qh = (struct uhci_qh *) hep->hcpriv;
878 if (qh == NULL)
879 goto done;
881 while (qh->state != QH_STATE_IDLE) {
882 ++uhci->num_waiting;
883 spin_unlock_irq(&uhci->lock);
884 wait_event_interruptible(uhci->waitqh,
885 qh->state == QH_STATE_IDLE);
886 spin_lock_irq(&uhci->lock);
887 --uhci->num_waiting;
890 uhci_free_qh(uhci, qh);
891 done:
892 spin_unlock_irq(&uhci->lock);
895 static int uhci_hcd_get_frame_number(struct usb_hcd *hcd)
897 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
898 unsigned frame_number;
899 unsigned delta;
901 /* Minimize latency by avoiding the spinlock */
902 frame_number = uhci->frame_number;
903 barrier();
904 delta = (inw(uhci->io_addr + USBFRNUM) - frame_number) &
905 (UHCI_NUMFRAMES - 1);
906 return frame_number + delta;
909 static const char hcd_name[] = "uhci_hcd";
911 static const struct hc_driver uhci_driver = {
912 .description = hcd_name,
913 .product_desc = "UHCI Host Controller",
914 .hcd_priv_size = sizeof(struct uhci_hcd),
916 /* Generic hardware linkage */
917 .irq = uhci_irq,
918 .flags = HCD_USB11,
920 /* Basic lifecycle operations */
921 .reset = uhci_init,
922 .start = uhci_start,
923 #ifdef CONFIG_PM
924 .pci_suspend = uhci_pci_suspend,
925 .pci_resume = uhci_pci_resume,
926 .bus_suspend = uhci_rh_suspend,
927 .bus_resume = uhci_rh_resume,
928 #endif
929 .stop = uhci_stop,
931 .urb_enqueue = uhci_urb_enqueue,
932 .urb_dequeue = uhci_urb_dequeue,
934 .endpoint_disable = uhci_hcd_endpoint_disable,
935 .get_frame_number = uhci_hcd_get_frame_number,
937 .hub_status_data = uhci_hub_status_data,
938 .hub_control = uhci_hub_control,
941 static const struct pci_device_id uhci_pci_ids[] = { {
942 /* handle any USB UHCI controller */
943 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_UHCI, ~0),
944 .driver_data = (unsigned long) &uhci_driver,
945 }, { /* end: all zeroes */ }
948 MODULE_DEVICE_TABLE(pci, uhci_pci_ids);
950 static struct pci_driver uhci_pci_driver = {
951 .name = (char *)hcd_name,
952 .id_table = uhci_pci_ids,
954 .probe = usb_hcd_pci_probe,
955 .remove = usb_hcd_pci_remove,
956 .shutdown = uhci_shutdown,
958 #ifdef CONFIG_PM_SLEEP
959 .driver = {
960 .pm = &usb_hcd_pci_pm_ops
962 #endif
965 static int __init uhci_hcd_init(void)
967 int retval = -ENOMEM;
969 if (usb_disabled())
970 return -ENODEV;
972 printk(KERN_INFO "uhci_hcd: " DRIVER_DESC "%s\n",
973 ignore_oc ? ", overcurrent ignored" : "");
974 set_bit(USB_UHCI_LOADED, &usb_hcds_loaded);
976 if (DEBUG_CONFIGURED) {
977 errbuf = kmalloc(ERRBUF_LEN, GFP_KERNEL);
978 if (!errbuf)
979 goto errbuf_failed;
980 uhci_debugfs_root = debugfs_create_dir("uhci", usb_debug_root);
981 if (!uhci_debugfs_root)
982 goto debug_failed;
985 uhci_up_cachep = kmem_cache_create("uhci_urb_priv",
986 sizeof(struct urb_priv), 0, 0, NULL);
987 if (!uhci_up_cachep)
988 goto up_failed;
990 retval = pci_register_driver(&uhci_pci_driver);
991 if (retval)
992 goto init_failed;
994 return 0;
996 init_failed:
997 kmem_cache_destroy(uhci_up_cachep);
999 up_failed:
1000 debugfs_remove(uhci_debugfs_root);
1002 debug_failed:
1003 kfree(errbuf);
1005 errbuf_failed:
1007 clear_bit(USB_UHCI_LOADED, &usb_hcds_loaded);
1008 return retval;
1011 static void __exit uhci_hcd_cleanup(void)
1013 pci_unregister_driver(&uhci_pci_driver);
1014 kmem_cache_destroy(uhci_up_cachep);
1015 debugfs_remove(uhci_debugfs_root);
1016 kfree(errbuf);
1017 clear_bit(USB_UHCI_LOADED, &usb_hcds_loaded);
1020 module_init(uhci_hcd_init);
1021 module_exit(uhci_hcd_cleanup);
1023 MODULE_AUTHOR(DRIVER_AUTHOR);
1024 MODULE_DESCRIPTION(DRIVER_DESC);
1025 MODULE_LICENSE("GPL");