The x86 timer interrupt handler is the only handler not traced in the
[linux-2.6/next.git] / arch / mips / include / asm / mach-ip27 / topology.h
blob1b1a7d1632b915ece8f030b538f89f4ef8eb2d63
1 #ifndef _ASM_MACH_TOPOLOGY_H
2 #define _ASM_MACH_TOPOLOGY_H 1
4 #include <asm/sn/hub.h>
5 #include <asm/sn/types.h>
6 #include <asm/mmzone.h>
8 struct cpuinfo_ip27 {
9 // cpuid_t p_cpuid; /* PROM assigned cpuid */
10 cnodeid_t p_nodeid; /* my node ID in compact-id-space */
11 nasid_t p_nasid; /* my node ID in numa-as-id-space */
12 unsigned char p_slice; /* Physical position on node board */
13 #if 0
14 unsigned long loops_per_sec;
15 unsigned long ipi_count;
16 unsigned long irq_attempt[NR_IRQS];
17 unsigned long smp_local_irq_count;
18 unsigned long prof_multiplier;
19 unsigned long prof_counter;
20 #endif
23 extern struct cpuinfo_ip27 sn_cpu_info[NR_CPUS];
25 #define cpu_to_node(cpu) (sn_cpu_info[(cpu)].p_nodeid)
26 #define parent_node(node) (node)
27 #define cpumask_of_node(node) ((node) == -1 ? \
28 cpu_all_mask : \
29 &hub_data(node)->h_cpus)
30 struct pci_bus;
31 extern int pcibus_to_node(struct pci_bus *);
33 #define cpumask_of_pcibus(bus) (cpu_online_mask)
35 extern unsigned char __node_distances[MAX_COMPACT_NODES][MAX_COMPACT_NODES];
37 #define node_distance(from, to) (__node_distances[(from)][(to)])
39 /* sched_domains SD_NODE_INIT for SGI IP27 machines */
40 #define SD_NODE_INIT (struct sched_domain) { \
41 .parent = NULL, \
42 .child = NULL, \
43 .groups = NULL, \
44 .min_interval = 8, \
45 .max_interval = 32, \
46 .busy_factor = 32, \
47 .imbalance_pct = 125, \
48 .cache_nice_tries = 1, \
49 .flags = SD_LOAD_BALANCE | \
50 SD_BALANCE_EXEC, \
51 .last_balance = jiffies, \
52 .balance_interval = 1, \
53 .nr_balance_failed = 0, \
56 #include <asm-generic/topology.h>
58 #endif /* _ASM_MACH_TOPOLOGY_H */