The x86 timer interrupt handler is the only handler not traced in the
[linux-2.6/next.git] / arch / mips / jz4740 / setup.c
blobd97cfbf882f5fdf16f7cd7ed3bb1f16b0cbe117c
1 /*
2 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
3 * Copyright (C) 2011, Maarten ter Huurne <maarten@treewalker.org>
4 * JZ4740 setup code
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
11 * You should have received a copy of the GNU General Public License along
12 * with this program; if not, write to the Free Software Foundation, Inc.,
13 * 675 Mass Ave, Cambridge, MA 02139, USA.
17 #include <linux/init.h>
18 #include <linux/io.h>
19 #include <linux/kernel.h>
21 #include <asm/bootinfo.h>
23 #include <asm/mach-jz4740/base.h>
25 #include "reset.h"
28 #define JZ4740_EMC_SDRAM_CTRL 0x80
31 static void __init jz4740_detect_mem(void)
33 void __iomem *jz_emc_base;
34 u32 ctrl, bus, bank, rows, cols;
35 phys_t size;
37 jz_emc_base = ioremap(JZ4740_EMC_BASE_ADDR, 0x100);
38 ctrl = readl(jz_emc_base + JZ4740_EMC_SDRAM_CTRL);
39 bus = 2 - ((ctrl >> 31) & 1);
40 bank = 1 + ((ctrl >> 19) & 1);
41 cols = 8 + ((ctrl >> 26) & 7);
42 rows = 11 + ((ctrl >> 20) & 3);
43 printk(KERN_DEBUG
44 "SDRAM preconfigured: bus:%u bank:%u rows:%u cols:%u\n",
45 bus, bank, rows, cols);
46 iounmap(jz_emc_base);
48 size = 1 << (bus + bank + cols + rows);
49 add_memory_region(0, size, BOOT_MEM_RAM);
52 void __init plat_mem_setup(void)
54 jz4740_reset_init();
55 jz4740_detect_mem();
58 const char *get_system_type(void)
60 return "JZ4740";