arch/mips/pmc-sierra/msp71xx/msp_time.c

   1 /*
   2  * Setting up the clock on MSP SOCs.  No RTC typically.
   3  *
   4  * Carsten Langgaard, carstenl@mips.com
   5  * Copyright (C) 1999,2000 MIPS Technologies, Inc.  All rights reserved.
   6  *
   7  * ########################################################################
   8  *
   9  *  This program is free software; you can distribute it and/or modify it
  10  *  under the terms of the GNU General Public License (Version 2) as
  11  *  published by the Free Software Foundation.
  12  *
  13  *  This program is distributed in the hope it will be useful, but WITHOUT
  14  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  15  *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  16  *  for more details.
  17  *
  18  *  You should have received a copy of the GNU General Public License along
  19  *  with this program; if not, write to the Free Software Foundation, Inc.,
  20  *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
  21  *
  22  * ########################################################################
  23  */
  24
  25 #include <linux/init.h>
  26 #include <linux/kernel_stat.h>
  27 #include <linux/sched.h>
  28 #include <linux/spinlock.h>
  29 #include <linux/module.h>
  30 #include <linux/ptrace.h>
  31
  32 #include <asm/cevt-r4k.h>
  33 #include <asm/mipsregs.h>
  34 #include <asm/time.h>
  35
  36 #include <msp_prom.h>
  37 #include <msp_int.h>
  38 #include <msp_regs.h>
  39
  40 #define get_current_vpe()   \
  41         ((read_c0_tcbind() >> TCBIND_CURVPE_SHIFT) & TCBIND_CURVPE)
  42
  43 static struct irqaction timer_vpe1;
  44 static int tim_installed;
  45
  46 void __init plat_time_init(void)
  47 {
  48         char    *endp, *s;
  49         unsigned long cpu_rate = 0;
  50
  51         if (cpu_rate == 0) {
  52                 s = prom_getenv("clkfreqhz");
  53                 cpu_rate = simple_strtoul(s, &endp, 10);
  54                 if (endp != NULL && *endp != 0) {
  55                         printk(KERN_ERR
  56                                 "Clock rate in Hz parse error: %s\n", s);
  57                         cpu_rate = 0;
  58                 }
  59         }
  60
  61         if (cpu_rate == 0) {
  62                 s = prom_getenv("clkfreq");
  63                 cpu_rate = 1000 * simple_strtoul(s, &endp, 10);
  64                 if (endp != NULL && *endp != 0) {
  65                         printk(KERN_ERR
  66                                 "Clock rate in MHz parse error: %s\n", s);
  67                         cpu_rate = 0;
  68                 }
  69         }
  70
  71         if (cpu_rate == 0) {
  72 #if defined(CONFIG_PMC_MSP7120_EVAL) \
  73  || defined(CONFIG_PMC_MSP7120_GW)
  74                 cpu_rate = 400000000;
  75 #elif defined(CONFIG_PMC_MSP7120_FPGA)
  76                 cpu_rate = 25000000;
  77 #else
  78                 cpu_rate = 150000000;
  79 #endif
  80                 printk(KERN_ERR
  81                         "Failed to determine CPU clock rate, "
  82                         "assuming %ld hz ...\n", cpu_rate);
  83         }
  84
  85         printk(KERN_WARNING "Clock rate set to %ld\n", cpu_rate);
  86
  87         /* timer frequency is 1/2 clock rate */
  88         mips_hpt_frequency = cpu_rate/2;
  89 }
  90
  91 unsigned int __cpuinit get_c0_compare_int(void)
  92 {
  93         /* MIPS_MT modes may want timer for second VPE */
  94         if ((get_current_vpe()) && !tim_installed) {
  95                 memcpy(&timer_vpe1, &c0_compare_irqaction, sizeof(timer_vpe1));
  96                 setup_irq(MSP_INT_VPE1_TIMER, &timer_vpe1);
  97                 tim_installed++;
  98         }
  99
 100         return get_current_vpe() ? MSP_INT_VPE1_TIMER : MSP_INT_VPE0_TIMER;
 101 }