drivers/gpio/gpio-ml-ioh.c

   1 /*
   2  * Copyright (C) 2010 OKI SEMICONDUCTOR Co., LTD.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; version 2 of the License.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  *
  13  * You should have received a copy of the GNU General Public License
  14  * along with this program; if not, write to the Free Software
  15  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
  16  */
  17 #include <linux/kernel.h>
  18 #include <linux/slab.h>
  19 #include <linux/pci.h>
  20 #include <linux/gpio.h>
  21 #include <linux/module.h>
  22
  23 #define PCI_VENDOR_ID_ROHM             0x10DB
  24
  25 struct ioh_reg_comn {
  26         u32     ien;
  27         u32     istatus;
  28         u32     idisp;
  29         u32     iclr;
  30         u32     imask;
  31         u32     imaskclr;
  32         u32     po;
  33         u32     pi;
  34         u32     pm;
  35         u32     im_0;
  36         u32     im_1;
  37         u32     reserved;
  38 };
  39
  40 struct ioh_regs {
  41         struct ioh_reg_comn regs[8];
  42         u32 reserve1[16];
  43         u32 ioh_sel_reg[4];
  44         u32 reserve2[11];
  45         u32 srst;
  46 };
  47
  48 /**
  49  * struct ioh_gpio_reg_data - The register store data.
  50  * @po_reg:     To store contents of PO register.
  51  * @pm_reg:     To store contents of PM register.
  52  */
  53 struct ioh_gpio_reg_data {
  54         u32 po_reg;
  55         u32 pm_reg;
  56 };
  57
  58 /**
  59  * struct ioh_gpio - GPIO private data structure.
  60  * @base:                       PCI base address of Memory mapped I/O register.
  61  * @reg:                        Memory mapped IOH GPIO register list.
  62  * @dev:                        Pointer to device structure.
  63  * @gpio:                       Data for GPIO infrastructure.
  64  * @ioh_gpio_reg:               Memory mapped Register data is saved here
  65  *                              when suspend.
  66  * @ch:                         Indicate GPIO channel
  67  */
  68 struct ioh_gpio {
  69         void __iomem *base;
  70         struct ioh_regs __iomem *reg;
  71         struct device *dev;
  72         struct gpio_chip gpio;
  73         struct ioh_gpio_reg_data ioh_gpio_reg;
  74         struct mutex lock;
  75         int ch;
  76 };
  77
  78 static const int num_ports[] = {6, 12, 16, 16, 15, 16, 16, 12};
  79
  80 static void ioh_gpio_set(struct gpio_chip *gpio, unsigned nr, int val)
  81 {
  82         u32 reg_val;
  83         struct ioh_gpio *chip = container_of(gpio, struct ioh_gpio, gpio);
  84
  85         mutex_lock(&chip->lock);
  86         reg_val = ioread32(&chip->reg->regs[chip->ch].po);
  87         if (val)
  88                 reg_val |= (1 << nr);
  89         else
  90                 reg_val &= ~(1 << nr);
  91
  92         iowrite32(reg_val, &chip->reg->regs[chip->ch].po);
  93         mutex_unlock(&chip->lock);
  94 }
  95
  96 static int ioh_gpio_get(struct gpio_chip *gpio, unsigned nr)
  97 {
  98         struct ioh_gpio *chip = container_of(gpio, struct ioh_gpio, gpio);
  99
 100         return ioread32(&chip->reg->regs[chip->ch].pi) & (1 << nr);
 101 }
 102
 103 static int ioh_gpio_direction_output(struct gpio_chip *gpio, unsigned nr,
 104                                      int val)
 105 {
 106         struct ioh_gpio *chip = container_of(gpio, struct ioh_gpio, gpio);
 107         u32 pm;
 108         u32 reg_val;
 109
 110         mutex_lock(&chip->lock);
 111         pm = ioread32(&chip->reg->regs[chip->ch].pm) &
 112                                         ((1 << num_ports[chip->ch]) - 1);
 113         pm |= (1 << nr);
 114         iowrite32(pm, &chip->reg->regs[chip->ch].pm);
 115
 116         reg_val = ioread32(&chip->reg->regs[chip->ch].po);
 117         if (val)
 118                 reg_val |= (1 << nr);
 119         else
 120                 reg_val &= ~(1 << nr);
 121         iowrite32(reg_val, &chip->reg->regs[chip->ch].po);
 122
 123         mutex_unlock(&chip->lock);
 124
 125         return 0;
 126 }
 127
 128 static int ioh_gpio_direction_input(struct gpio_chip *gpio, unsigned nr)
 129 {
 130         struct ioh_gpio *chip = container_of(gpio, struct ioh_gpio, gpio);
 131         u32 pm;
 132
 133         mutex_lock(&chip->lock);
 134         pm = ioread32(&chip->reg->regs[chip->ch].pm) &
 135                                 ((1 << num_ports[chip->ch]) - 1);
 136         pm &= ~(1 << nr);
 137         iowrite32(pm, &chip->reg->regs[chip->ch].pm);
 138         mutex_unlock(&chip->lock);
 139
 140         return 0;
 141 }
 142
 143 #ifdef CONFIG_PM
 144 /*
 145  * Save register configuration and disable interrupts.
 146  */
 147 static void ioh_gpio_save_reg_conf(struct ioh_gpio *chip)
 148 {
 149         chip->ioh_gpio_reg.po_reg = ioread32(&chip->reg->regs[chip->ch].po);
 150         chip->ioh_gpio_reg.pm_reg = ioread32(&chip->reg->regs[chip->ch].pm);
 151 }
 152
 153 /*
 154  * This function restores the register configuration of the GPIO device.
 155  */
 156 static void ioh_gpio_restore_reg_conf(struct ioh_gpio *chip)
 157 {
 158         /* to store contents of PO register */
 159         iowrite32(chip->ioh_gpio_reg.po_reg, &chip->reg->regs[chip->ch].po);
 160         /* to store contents of PM register */
 161         iowrite32(chip->ioh_gpio_reg.pm_reg, &chip->reg->regs[chip->ch].pm);
 162 }
 163 #endif
 164
 165 static void ioh_gpio_setup(struct ioh_gpio *chip, int num_port)
 166 {
 167         struct gpio_chip *gpio = &chip->gpio;
 168
 169         gpio->label = dev_name(chip->dev);
 170         gpio->owner = THIS_MODULE;
 171         gpio->direction_input = ioh_gpio_direction_input;
 172         gpio->get = ioh_gpio_get;
 173         gpio->direction_output = ioh_gpio_direction_output;
 174         gpio->set = ioh_gpio_set;
 175         gpio->dbg_show = NULL;
 176         gpio->base = -1;
 177         gpio->ngpio = num_port;
 178         gpio->can_sleep = 0;
 179 }
 180
 181 static int __devinit ioh_gpio_probe(struct pci_dev *pdev,
 182                                     const struct pci_device_id *id)
 183 {
 184         int ret;
 185         int i;
 186         struct ioh_gpio *chip;
 187         void __iomem *base;
 188         void __iomem *chip_save;
 189
 190         ret = pci_enable_device(pdev);
 191         if (ret) {
 192                 dev_err(&pdev->dev, "%s : pci_enable_device failed", __func__);
 193                 goto err_pci_enable;
 194         }
 195
 196         ret = pci_request_regions(pdev, KBUILD_MODNAME);
 197         if (ret) {
 198                 dev_err(&pdev->dev, "pci_request_regions failed-%d", ret);
 199                 goto err_request_regions;
 200         }
 201
 202         base = pci_iomap(pdev, 1, 0);
 203         if (base == 0) {
 204                 dev_err(&pdev->dev, "%s : pci_iomap failed", __func__);
 205                 ret = -ENOMEM;
 206                 goto err_iomap;
 207         }
 208
 209         chip_save = kzalloc(sizeof(*chip) * 8, GFP_KERNEL);
 210         if (chip_save == NULL) {
 211                 dev_err(&pdev->dev, "%s : kzalloc failed", __func__);
 212                 ret = -ENOMEM;
 213                 goto err_kzalloc;
 214         }
 215
 216         chip = chip_save;
 217         for (i = 0; i < 8; i++, chip++) {
 218                 chip->dev = &pdev->dev;
 219                 chip->base = base;
 220                 chip->reg = chip->base;
 221                 chip->ch = i;
 222                 mutex_init(&chip->lock);
 223                 ioh_gpio_setup(chip, num_ports[i]);
 224                 ret = gpiochip_add(&chip->gpio);
 225                 if (ret) {
 226                         dev_err(&pdev->dev, "IOH gpio: Failed to register GPIO\n");
 227                         goto err_gpiochip_add;
 228                 }
 229         }
 230
 231         chip = chip_save;
 232         pci_set_drvdata(pdev, chip);
 233
 234         return 0;
 235
 236 err_gpiochip_add:
 237         while (--i >= 0) {
 238                 chip--;
 239                 ret = gpiochip_remove(&chip->gpio);
 240                 if (ret)
 241                         dev_err(&pdev->dev, "Failed gpiochip_remove(%d)\n", i);
 242         }
 243         kfree(chip_save);
 244
 245 err_kzalloc:
 246         pci_iounmap(pdev, base);
 247
 248 err_iomap:
 249         pci_release_regions(pdev);
 250
 251 err_request_regions:
 252         pci_disable_device(pdev);
 253
 254 err_pci_enable:
 255
 256         dev_err(&pdev->dev, "%s Failed returns %d\n", __func__, ret);
 257         return ret;
 258 }
 259
 260 static void __devexit ioh_gpio_remove(struct pci_dev *pdev)
 261 {
 262         int err;
 263         int i;
 264         struct ioh_gpio *chip = pci_get_drvdata(pdev);
 265         void __iomem *chip_save;
 266
 267         chip_save = chip;
 268         for (i = 0; i < 8; i++, chip++) {
 269                 err = gpiochip_remove(&chip->gpio);
 270                 if (err)
 271                         dev_err(&pdev->dev, "Failed gpiochip_remove\n");
 272         }
 273
 274         chip = chip_save;
 275         pci_iounmap(pdev, chip->base);
 276         pci_release_regions(pdev);
 277         pci_disable_device(pdev);
 278         kfree(chip);
 279 }
 280
 281 #ifdef CONFIG_PM
 282 static int ioh_gpio_suspend(struct pci_dev *pdev, pm_message_t state)
 283 {
 284         s32 ret;
 285         struct ioh_gpio *chip = pci_get_drvdata(pdev);
 286
 287         ioh_gpio_save_reg_conf(chip);
 288         ioh_gpio_restore_reg_conf(chip);
 289
 290         ret = pci_save_state(pdev);
 291         if (ret) {
 292                 dev_err(&pdev->dev, "pci_save_state Failed-%d\n", ret);
 293                 return ret;
 294         }
 295         pci_disable_device(pdev);
 296         pci_set_power_state(pdev, PCI_D0);
 297         ret = pci_enable_wake(pdev, PCI_D0, 1);
 298         if (ret)
 299                 dev_err(&pdev->dev, "pci_enable_wake Failed -%d\n", ret);
 300
 301         return 0;
 302 }
 303
 304 static int ioh_gpio_resume(struct pci_dev *pdev)
 305 {
 306         s32 ret;
 307         struct ioh_gpio *chip = pci_get_drvdata(pdev);
 308
 309         ret = pci_enable_wake(pdev, PCI_D0, 0);
 310
 311         pci_set_power_state(pdev, PCI_D0);
 312         ret = pci_enable_device(pdev);
 313         if (ret) {
 314                 dev_err(&pdev->dev, "pci_enable_device Failed-%d ", ret);
 315                 return ret;
 316         }
 317         pci_restore_state(pdev);
 318
 319         iowrite32(0x01, &chip->reg->srst);
 320         iowrite32(0x00, &chip->reg->srst);
 321         ioh_gpio_restore_reg_conf(chip);
 322
 323         return 0;
 324 }
 325 #else
 326 #define ioh_gpio_suspend NULL
 327 #define ioh_gpio_resume NULL
 328 #endif
 329
 330 static DEFINE_PCI_DEVICE_TABLE(ioh_gpio_pcidev_id) = {
 331         { PCI_DEVICE(PCI_VENDOR_ID_ROHM, 0x802E) },
 332         { 0, }
 333 };
 334 MODULE_DEVICE_TABLE(pci, ioh_gpio_pcidev_id);
 335
 336 static struct pci_driver ioh_gpio_driver = {
 337         .name = "ml_ioh_gpio",
 338         .id_table = ioh_gpio_pcidev_id,
 339         .probe = ioh_gpio_probe,
 340         .remove = __devexit_p(ioh_gpio_remove),
 341         .suspend = ioh_gpio_suspend,
 342         .resume = ioh_gpio_resume
 343 };
 344
 345 static int __init ioh_gpio_pci_init(void)
 346 {
 347         return pci_register_driver(&ioh_gpio_driver);
 348 }
 349 module_init(ioh_gpio_pci_init);
 350
 351 static void __exit ioh_gpio_pci_exit(void)
 352 {
 353         pci_unregister_driver(&ioh_gpio_driver);
 354 }
 355 module_exit(ioh_gpio_pci_exit);
 356
 357 MODULE_DESCRIPTION("OKI SEMICONDUCTOR ML-IOH series GPIO Driver");
 358 MODULE_LICENSE("GPL");