The discovered bit in PGCCSR register indicates if the device has been
[linux-2.6/next.git] / drivers / staging / octeon / cvmx-helper-board.h
blobb465bec4355329ade772797cedef1322f3e53138
1 /***********************license start***************
2 * Author: Cavium Networks
4 * Contact: support@caviumnetworks.com
5 * This file is part of the OCTEON SDK
7 * Copyright (c) 2003-2008 Cavium Networks
9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as
11 * published by the Free Software Foundation.
13 * This file is distributed in the hope that it will be useful, but
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16 * NONINFRINGEMENT. See the GNU General Public License for more
17 * details.
19 * You should have received a copy of the GNU General Public License
20 * along with this file; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 * or visit http://www.gnu.org/licenses/.
24 * This file may also be available under a different license from Cavium.
25 * Contact Cavium Networks for more information
26 ***********************license end**************************************/
28 /**
30 * Helper functions to abstract board specific data about
31 * network ports from the rest of the cvmx-helper files.
34 #ifndef __CVMX_HELPER_BOARD_H__
35 #define __CVMX_HELPER_BOARD_H__
37 #include "cvmx-helper.h"
39 typedef enum {
40 set_phy_link_flags_autoneg = 0x1,
41 set_phy_link_flags_flow_control_dont_touch = 0x0 << 1,
42 set_phy_link_flags_flow_control_enable = 0x1 << 1,
43 set_phy_link_flags_flow_control_disable = 0x2 << 1,
44 set_phy_link_flags_flow_control_mask = 0x3 << 1, /* Mask for 2 bit wide flow control field */
45 } cvmx_helper_board_set_phy_link_flags_types_t;
47 /**
48 * cvmx_override_board_link_get(int ipd_port) is a function
49 * pointer. It is meant to allow customization of the process of
50 * talking to a PHY to determine link speed. It is called every
51 * time a PHY must be polled for link status. Users should set
52 * this pointer to a function before calling any cvmx-helper
53 * operations.
55 extern cvmx_helper_link_info_t(*cvmx_override_board_link_get) (int ipd_port);
57 /**
58 * Return the MII PHY address associated with the given IPD
59 * port. A result of -1 means there isn't a MII capable PHY
60 * connected to this port. On chips supporting multiple MII
61 * busses the bus number is encoded in bits <15:8>.
63 * This function must be modifed for every new Octeon board.
64 * Internally it uses switch statements based on the cvmx_sysinfo
65 * data to determine board types and revisions. It relys on the
66 * fact that every Octeon board receives a unique board type
67 * enumeration from the bootloader.
69 * @ipd_port: Octeon IPD port to get the MII address for.
71 * Returns MII PHY address and bus number or -1.
73 extern int cvmx_helper_board_get_mii_address(int ipd_port);
75 /**
76 * This function as a board specific method of changing the PHY
77 * speed, duplex, and autonegotiation. This programs the PHY and
78 * not Octeon. This can be used to force Octeon's links to
79 * specific settings.
81 * @phy_addr: The address of the PHY to program
82 * @link_flags:
83 * Flags to control autonegotiation. Bit 0 is autonegotiation
84 * enable/disable to maintain backware compatibility.
85 * @link_info: Link speed to program. If the speed is zero and autonegotiation
86 * is enabled, all possible negotiation speeds are advertised.
88 * Returns Zero on success, negative on failure
90 int cvmx_helper_board_link_set_phy(int phy_addr,
91 cvmx_helper_board_set_phy_link_flags_types_t
92 link_flags,
93 cvmx_helper_link_info_t link_info);
95 /**
96 * This function is the board specific method of determining an
97 * ethernet ports link speed. Most Octeon boards have Marvell PHYs
98 * and are handled by the fall through case. This function must be
99 * updated for boards that don't have the normal Marvell PHYs.
101 * This function must be modifed for every new Octeon board.
102 * Internally it uses switch statements based on the cvmx_sysinfo
103 * data to determine board types and revisions. It relys on the
104 * fact that every Octeon board receives a unique board type
105 * enumeration from the bootloader.
107 * @ipd_port: IPD input port associated with the port we want to get link
108 * status for.
110 * Returns The ports link status. If the link isn't fully resolved, this must
111 * return zero.
113 extern cvmx_helper_link_info_t __cvmx_helper_board_link_get(int ipd_port);
116 * This function is called by cvmx_helper_interface_probe() after it
117 * determines the number of ports Octeon can support on a specific
118 * interface. This function is the per board location to override
119 * this value. It is called with the number of ports Octeon might
120 * support and should return the number of actual ports on the
121 * board.
123 * This function must be modifed for every new Octeon board.
124 * Internally it uses switch statements based on the cvmx_sysinfo
125 * data to determine board types and revisions. It relys on the
126 * fact that every Octeon board receives a unique board type
127 * enumeration from the bootloader.
129 * @interface: Interface to probe
130 * @supported_ports:
131 * Number of ports Octeon supports.
133 * Returns Number of ports the actual board supports. Many times this will
134 * simple be "support_ports".
136 extern int __cvmx_helper_board_interface_probe(int interface,
137 int supported_ports);
140 * Enable packet input/output from the hardware. This function is
141 * called after by cvmx_helper_packet_hardware_enable() to
142 * perform board specific initialization. For most boards
143 * nothing is needed.
145 * @interface: Interface to enable
147 * Returns Zero on success, negative on failure
149 extern int __cvmx_helper_board_hardware_enable(int interface);
151 #endif /* __CVMX_HELPER_BOARD_H__ */