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Linux-2.6.12-rc2
[linux-2.6/next.git] / drivers / media / dvb / frontends / or51211.c
blobad56a99584043a2ad340b434f3f5b42dae2d1bbd
1 /*
2 * Support for OR51211 (pcHDTV HD-2000) - VSB
3 *
4 * Copyright (C) 2005 Kirk Lapray <kirk_lapray@bigfoot.com>
5 *
6 * Based on code from Jack Kelliher (kelliher@xmission.com)
7 * Copyright (C) 2002 & pcHDTV, inc.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 *
23 */
24
25 /*
26 * This driver needs external firmware. Please use the command
27 * "<kerneldir>/Documentation/dvb/get_dvb_firmware or51211" to
28 * download/extract it, and then copy it to /usr/lib/hotplug/firmware.
29 */
30 #define OR51211_DEFAULT_FIRMWARE "dvb-fe-or51211.fw"
31
32 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/moduleparam.h>
35 #include <linux/device.h>
36 #include <linux/firmware.h>
37 #include <asm/byteorder.h>
38
39 #include "dvb_frontend.h"
40 #include "or51211.h"
41
42 static int debug;
43 #define dprintk(args...) \
44 do { \
45 if (debug) printk(KERN_DEBUG "or51211: " args); \
46 } while (0)
47
48 static u8 run_buf[] = {0x7f,0x01};
49 static u8 cmd_buf[] = {0x04,0x01,0x50,0x80,0x06}; // ATSC
50
51 struct or51211_state {
52
53 struct i2c_adapter* i2c;
54 struct dvb_frontend_ops ops;
55
56 /* Configuration settings */
57 const struct or51211_config* config;
58
59 struct dvb_frontend frontend;
60 struct bt878* bt;
61
62 /* Demodulator private data */
63 u8 initialized:1;
64
65 /* Tuner private data */
66 u32 current_frequency;
67 };
68
69 static int i2c_writebytes (struct or51211_state* state, u8 reg, u8 *buf,
70 int len)
71 {
72 int err;
73 struct i2c_msg msg;
74 msg.addr = reg;
75 msg.flags = 0;
76 msg.len = len;
77 msg.buf = buf;
78
79 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
80 printk(KERN_WARNING "or51211: i2c_writebytes error "
81 "(addr %02x, err == %i)\n", reg, err);
82 return -EREMOTEIO;
83 }
84
85 return 0;
86 }
87
88 static u8 i2c_readbytes (struct or51211_state* state, u8 reg, u8* buf, int len)
89 {
90 int err;
91 struct i2c_msg msg;
92 msg.addr = reg;
93 msg.flags = I2C_M_RD;
94 msg.len = len;
95 msg.buf = buf;
96
97 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
98 printk(KERN_WARNING "or51211: i2c_readbytes error "
99 "(addr %02x, err == %i)\n", reg, err);
100 return -EREMOTEIO;
101 }
102
103 return 0;
104 }
105
106 static int or51211_load_firmware (struct dvb_frontend* fe,
107 const struct firmware *fw)
108 {
109 struct or51211_state* state = fe->demodulator_priv;
110 u8 tudata[585];
111 int i;
112
113 dprintk("Firmware is %d bytes\n",fw->size);
114
115 /* Get eprom data */
116 tudata[0] = 17;
117 if (i2c_writebytes(state,0x50,tudata,1)) {
118 printk(KERN_WARNING "or51211:load_firmware error eprom addr\n");
119 return -1;
120 }
121 if (i2c_readbytes(state,0x50,&tudata[145],192)) {
122 printk(KERN_WARNING "or51211: load_firmware error eprom\n");
123 return -1;
124 }
125
126 /* Create firmware buffer */
127 for (i = 0; i < 145; i++)
128 tudata[i] = fw->data[i];
129
130 for (i = 0; i < 248; i++)
131 tudata[i+337] = fw->data[145+i];
132
133 state->config->reset(fe);
134
135 if (i2c_writebytes(state,state->config->demod_address,tudata,585)) {
136 printk(KERN_WARNING "or51211: load_firmware error 1\n");
137 return -1;
138 }
139 msleep(1);
140
141 if (i2c_writebytes(state,state->config->demod_address,
142 &fw->data[393],8125)) {
143 printk(KERN_WARNING "or51211: load_firmware error 2\n");
144 return -1;
145 }
146 msleep(1);
147
148 if (i2c_writebytes(state,state->config->demod_address,run_buf,2)) {
149 printk(KERN_WARNING "or51211: load_firmware error 3\n");
150 return -1;
151 }
152
153 /* Wait at least 5 msec */
154 msleep(10);
155 if (i2c_writebytes(state,state->config->demod_address,run_buf,2)) {
156 printk(KERN_WARNING "or51211: load_firmware error 4\n");
157 return -1;
158 }
159 msleep(10);
160
161 printk("or51211: Done.\n");
162 return 0;
163 };
164
165 static int or51211_setmode(struct dvb_frontend* fe, int mode)
166 {
167 struct or51211_state* state = fe->demodulator_priv;
168 u8 rec_buf[14];
169
170 state->config->setmode(fe, mode);
171
172 if (i2c_writebytes(state,state->config->demod_address,run_buf,2)) {
173 printk(KERN_WARNING "or51211: setmode error 1\n");
174 return -1;
175 }
176
177 /* Wait at least 5 msec */
178 msleep(10);
179 if (i2c_writebytes(state,state->config->demod_address,run_buf,2)) {
180 printk(KERN_WARNING "or51211: setmode error 2\n");
181 return -1;
182 }
183
184 msleep(10);
185
186 /* Set operation mode in Receiver 1 register;
187 * type 1:
188 * data 0x50h Automatic sets receiver channel conditions
189 * Automatic NTSC rejection filter
190 * Enable MPEG serial data output
191 * MPEG2tr
192 * High tuner phase noise
193 * normal +/-150kHz Carrier acquisition range
194 */
195 if (i2c_writebytes(state,state->config->demod_address,cmd_buf,3)) {
196 printk(KERN_WARNING "or51211: setmode error 3\n");
197 return -1;
198 }
199
200 rec_buf[0] = 0x04;
201 rec_buf[1] = 0x00;
202 rec_buf[2] = 0x03;
203 rec_buf[3] = 0x00;
204 msleep(20);
205 if (i2c_writebytes(state,state->config->demod_address,rec_buf,3)) {
206 printk(KERN_WARNING "or51211: setmode error 5\n");
207 }
208 msleep(3);
209 if (i2c_readbytes(state,state->config->demod_address,&rec_buf[10],2)) {
210 printk(KERN_WARNING "or51211: setmode error 6");
211 return -1;
212 }
213 dprintk("setmode rec status %02x %02x\n",rec_buf[10],rec_buf[11]);
214
215 return 0;
216 }
217
218 static int or51211_set_parameters(struct dvb_frontend* fe,
219 struct dvb_frontend_parameters *param)
220 {
221 struct or51211_state* state = fe->demodulator_priv;
222 u32 freq = 0;
223 u16 tunerfreq = 0;
224 u8 buf[4];
225
226 /* Change only if we are actually changing the channel */
227 if (state->current_frequency != param->frequency) {
228 freq = 44000 + (param->frequency/1000);
229 tunerfreq = freq * 16/1000;
230
231 dprintk("set_parameters frequency = %d (tunerfreq = %d)\n",
232 param->frequency,tunerfreq);
233
234 buf[0] = (tunerfreq >> 8) & 0x7F;
235 buf[1] = (tunerfreq & 0xFF);
236 buf[2] = 0x8E;
237
238 if (param->frequency < 157250000) {
239 buf[3] = 0xA0;
240 dprintk("set_parameters VHF low range\n");
241 } else if (param->frequency < 454000000) {
242 buf[3] = 0x90;
243 dprintk("set_parameters VHF high range\n");
244 } else {
245 buf[3] = 0x30;
246 dprintk("set_parameters UHF range\n");
247 }
248 dprintk("set_parameters tuner bytes: 0x%02x 0x%02x "
249 "0x%02x 0x%02x\n",buf[0],buf[1],buf[2],buf[3]);
250
251 if (i2c_writebytes(state,0xC2>>1,buf,4))
252 printk(KERN_WARNING "or51211:set_parameters error "
253 "writing to tuner\n");
254
255 /* Set to ATSC mode */
256 or51211_setmode(fe,0);
257
258 /* Update current frequency */
259 state->current_frequency = param->frequency;
260 }
261 return 0;
262 }
263
264 static int or51211_read_status(struct dvb_frontend* fe, fe_status_t* status)
265 {
266 struct or51211_state* state = fe->demodulator_priv;
267 unsigned char rec_buf[2];
268 unsigned char snd_buf[] = {0x04,0x00,0x03,0x00};
269 *status = 0;
270
271 /* Receiver Status */
272 if (i2c_writebytes(state,state->config->demod_address,snd_buf,3)) {
273 printk(KERN_WARNING "or51132: read_status write error\n");
274 return -1;
275 }
276 msleep(3);
277 if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
278 printk(KERN_WARNING "or51132: read_status read error\n");
279 return -1;
280 }
281 dprintk("read_status %x %x\n",rec_buf[0],rec_buf[1]);
282
283 if (rec_buf[0] & 0x01) { /* Receiver Lock */
284 *status |= FE_HAS_SIGNAL;
285 *status |= FE_HAS_CARRIER;
286 *status |= FE_HAS_VITERBI;
287 *status |= FE_HAS_SYNC;
288 *status |= FE_HAS_LOCK;
289 }
290 return 0;
291 }
292
293 /* log10-1 table at .5 increments from 1 to 100.5 */
294 static unsigned int i100x20log10[] = {
295 0, 352, 602, 795, 954, 1088, 1204, 1306, 1397, 1480,
296 1556, 1625, 1690, 1750, 1806, 1858, 1908, 1955, 2000, 2042,
297 2082, 2121, 2158, 2193, 2227, 2260, 2292, 2322, 2352, 2380,
298 2408, 2434, 2460, 2486, 2510, 2534, 2557, 2580, 2602, 2623,
299 2644, 2664, 2684, 2704, 2723, 2742, 2760, 2778, 2795, 2813,
300 2829, 2846, 2862, 2878, 2894, 2909, 2924, 2939, 2954, 2968,
301 2982, 2996, 3010, 3023, 3037, 3050, 3062, 3075, 3088, 3100,
302 3112, 3124, 3136, 3148, 3159, 3170, 3182, 3193, 3204, 3214,
303 3225, 3236, 3246, 3256, 3266, 3276, 3286, 3296, 3306, 3316,
304 3325, 3334, 3344, 3353, 3362, 3371, 3380, 3389, 3397, 3406,
305 3415, 3423, 3432, 3440, 3448, 3456, 3464, 3472, 3480, 3488,
306 3496, 3504, 3511, 3519, 3526, 3534, 3541, 3549, 3556, 3563,
307 3570, 3577, 3584, 3591, 3598, 3605, 3612, 3619, 3625, 3632,
308 3639, 3645, 3652, 3658, 3665, 3671, 3677, 3683, 3690, 3696,
309 3702, 3708, 3714, 3720, 3726, 3732, 3738, 3744, 3750, 3755,
310 3761, 3767, 3772, 3778, 3784, 3789, 3795, 3800, 3806, 3811,
311 3816, 3822, 3827, 3832, 3838, 3843, 3848, 3853, 3858, 3863,
312 3868, 3874, 3879, 3884, 3888, 3893, 3898, 3903, 3908, 3913,
313 3918, 3922, 3927, 3932, 3936, 3941, 3946, 3950, 3955, 3960,
314 3964, 3969, 3973, 3978, 3982, 3986, 3991, 3995, 4000, 4004,
315 };
316
317 static unsigned int denom[] = {1,1,100,1000,10000,100000,1000000,10000000,100000000};
318
319 static unsigned int i20Log10(unsigned short val)
320 {
321 unsigned int rntval = 100;
322 unsigned int tmp = val;
323 unsigned int exp = 1;
324
325 while(tmp > 100) {tmp /= 100; exp++;}
326
327 val = (2 * val)/denom[exp];
328 if (exp > 1) rntval = 2000*exp;
329
330 rntval += i100x20log10[val];
331 return rntval;
332 }
333
334 static int or51211_read_signal_strength(struct dvb_frontend* fe, u16* strength)
335 {
336 struct or51211_state* state = fe->demodulator_priv;
337 u8 rec_buf[2];
338 u8 snd_buf[4];
339 u8 snr_equ;
340
341 /* SNR after Equalizer */
342 snd_buf[0] = 0x04;
343 snd_buf[1] = 0x00;
344 snd_buf[2] = 0x04;
345 snd_buf[3] = 0x00;
346
347 if (i2c_writebytes(state,state->config->demod_address,snd_buf,3)) {
348 printk(KERN_WARNING "or51211: read_status write error\n");
349 return -1;
350 }
351 msleep(3);
352 if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
353 printk(KERN_WARNING "or51211: read_status read error\n");
354 return -1;
355 }
356 snr_equ = rec_buf[0] & 0xff;
357
358 /* The value reported back from the frontend will be FFFF=100% 0000=0% */
359 *strength = (((5334 - i20Log10(snr_equ))/3+5)*65535)/1000;
360
361 dprintk("read_signal_strength %i\n",*strength);
362
363 return 0;
364 }
365
366 static int or51211_read_snr(struct dvb_frontend* fe, u16* snr)
367 {
368 struct or51211_state* state = fe->demodulator_priv;
369 u8 rec_buf[2];
370 u8 snd_buf[4];
371
372 /* SNR after Equalizer */
373 snd_buf[0] = 0x04;
374 snd_buf[1] = 0x00;
375 snd_buf[2] = 0x04;
376 snd_buf[3] = 0x00;
377
378 if (i2c_writebytes(state,state->config->demod_address,snd_buf,3)) {
379 printk(KERN_WARNING "or51211: read_status write error\n");
380 return -1;
381 }
382 msleep(3);
383 if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
384 printk(KERN_WARNING "or51211: read_status read error\n");
385 return -1;
386 }
387 *snr = rec_buf[0] & 0xff;
388
389 dprintk("read_snr %i\n",*snr);
390
391 return 0;
392 }
393
394 static int or51211_read_ber(struct dvb_frontend* fe, u32* ber)
395 {
396 *ber = -ENOSYS;
397 return 0;
398 }
399
400 static int or51211_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
401 {
402 *ucblocks = -ENOSYS;
403 return 0;
404 }
405
406 static int or51211_sleep(struct dvb_frontend* fe)
407 {
408 return 0;
409 }
410
411 static int or51211_init(struct dvb_frontend* fe)
412 {
413 struct or51211_state* state = fe->demodulator_priv;
414 const struct or51211_config* config = state->config;
415 const struct firmware* fw;
416 unsigned char get_ver_buf[] = {0x04,0x00,0x30,0x00,0x00};
417 unsigned char rec_buf[14];
418 int ret,i;
419
420 if (!state->initialized) {
421 /* Request the firmware, this will block until it uploads */
422 printk(KERN_INFO "or51211: Waiting for firmware upload "
423 "(%s)...\n", OR51211_DEFAULT_FIRMWARE);
424 ret = config->request_firmware(fe, &fw,
425 OR51211_DEFAULT_FIRMWARE);
426 printk(KERN_INFO "or51211:Got Hotplug firmware\n");
427 if (ret) {
428 printk(KERN_WARNING "or51211: No firmware uploaded "
429 "(timeout or file not found?)\n");
430 return ret;
431 }
432
433 ret = or51211_load_firmware(fe, fw);
434 if (ret) {
435 printk(KERN_WARNING "or51211: Writing firmware to "
436 "device failed!\n");
437 release_firmware(fw);
438 return ret;
439 }
440 printk(KERN_INFO "or51211: Firmware upload complete.\n");
441
442 /* Set operation mode in Receiver 1 register;
443 * type 1:
444 * data 0x50h Automatic sets receiver channel conditions
445 * Automatic NTSC rejection filter
446 * Enable MPEG serial data output
447 * MPEG2tr
448 * High tuner phase noise
449 * normal +/-150kHz Carrier acquisition range
450 */
451 if (i2c_writebytes(state,state->config->demod_address,
452 cmd_buf,3)) {
453 printk(KERN_WARNING "or51211: Load DVR Error 5\n");
454 return -1;
455 }
456
457 /* Read back ucode version to besure we loaded correctly */
458 /* and are really up and running */
459 rec_buf[0] = 0x04;
460 rec_buf[1] = 0x00;
461 rec_buf[2] = 0x03;
462 rec_buf[3] = 0x00;
463 msleep(30);
464 if (i2c_writebytes(state,state->config->demod_address,
465 rec_buf,3)) {
466 printk(KERN_WARNING "or51211: Load DVR Error A\n");
467 return -1;
468 }
469 msleep(3);
470 if (i2c_readbytes(state,state->config->demod_address,
471 &rec_buf[10],2)) {
472 printk(KERN_WARNING "or51211: Load DVR Error B\n");
473 return -1;
474 }
475
476 rec_buf[0] = 0x04;
477 rec_buf[1] = 0x00;
478 rec_buf[2] = 0x01;
479 rec_buf[3] = 0x00;
480 msleep(20);
481 if (i2c_writebytes(state,state->config->demod_address,
482 rec_buf,3)) {
483 printk(KERN_WARNING "or51211: Load DVR Error C\n");
484 return -1;
485 }
486 msleep(3);
487 if (i2c_readbytes(state,state->config->demod_address,
488 &rec_buf[12],2)) {
489 printk(KERN_WARNING "or51211: Load DVR Error D\n");
490 return -1;
491 }
492
493 for (i = 0; i < 8; i++)
494 rec_buf[i]=0xed;
495
496 for (i = 0; i < 5; i++) {
497 msleep(30);
498 get_ver_buf[4] = i+1;
499 if (i2c_writebytes(state,state->config->demod_address,
500 get_ver_buf,5)) {
501 printk(KERN_WARNING "or51211:Load DVR Error 6"
502 " - %d\n",i);
503 return -1;
504 }
505 msleep(3);
506
507 if (i2c_readbytes(state,state->config->demod_address,
508 &rec_buf[i*2],2)) {
509 printk(KERN_WARNING "or51211:Load DVR Error 7"
510 " - %d\n",i);
511 return -1;
512 }
513 /* If we didn't receive the right index, try again */
514 if ((int)rec_buf[i*2+1]!=i+1){
515 i--;
516 }
517 }
518 dprintk("read_fwbits %x %x %x %x %x %x %x %x %x %x\n",
519 rec_buf[0], rec_buf[1], rec_buf[2], rec_buf[3],
520 rec_buf[4], rec_buf[5], rec_buf[6], rec_buf[7],
521 rec_buf[8], rec_buf[9]);
522
523 printk(KERN_INFO "or51211: ver TU%02x%02x%02x VSB mode %02x"
524 " Status %02x\n",
525 rec_buf[2], rec_buf[4],rec_buf[6],
526 rec_buf[12],rec_buf[10]);
527
528 rec_buf[0] = 0x04;
529 rec_buf[1] = 0x00;
530 rec_buf[2] = 0x03;
531 rec_buf[3] = 0x00;
532 msleep(20);
533 if (i2c_writebytes(state,state->config->demod_address,
534 rec_buf,3)) {
535 printk(KERN_WARNING "or51211: Load DVR Error 8\n");
536 return -1;
537 }
538 msleep(20);
539 if (i2c_readbytes(state,state->config->demod_address,
540 &rec_buf[8],2)) {
541 printk(KERN_WARNING "or51211: Load DVR Error 9\n");
542 return -1;
543 }
544 state->initialized = 1;
545 }
546
547 return 0;
548 }
549
550 static int or51211_get_tune_settings(struct dvb_frontend* fe,
551 struct dvb_frontend_tune_settings* fesettings)
552 {
553 fesettings->min_delay_ms = 500;
554 fesettings->step_size = 0;
555 fesettings->max_drift = 0;
556 return 0;
557 }
558
559 static void or51211_release(struct dvb_frontend* fe)
560 {
561 struct or51211_state* state = fe->demodulator_priv;
562 state->config->sleep(fe);
563 kfree(state);
564 }
565
566 static struct dvb_frontend_ops or51211_ops;
567
568 struct dvb_frontend* or51211_attach(const struct or51211_config* config,
569 struct i2c_adapter* i2c)
570 {
571 struct or51211_state* state = NULL;
572
573 /* Allocate memory for the internal state */
574 state = kmalloc(sizeof(struct or51211_state), GFP_KERNEL);
575 if (state == NULL)
576 goto error;
577
578 /* Setup the state */
579 state->config = config;
580 state->i2c = i2c;
581 memcpy(&state->ops, &or51211_ops, sizeof(struct dvb_frontend_ops));
582 state->initialized = 0;
583 state->current_frequency = 0;
584
585 /* Create dvb_frontend */
586 state->frontend.ops = &state->ops;
587 state->frontend.demodulator_priv = state;
588 return &state->frontend;
589
590 error:
591 kfree(state);
592 return NULL;
593 }
594
595 static struct dvb_frontend_ops or51211_ops = {
596
597 .info = {
598 .name = "Oren OR51211 VSB Frontend",
599 .type = FE_ATSC,
600 .frequency_min = 44000000,
601 .frequency_max = 958000000,
602 .frequency_stepsize = 166666,
603 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
604 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
605 FE_CAN_8VSB
606 },
607
608 .release = or51211_release,
609
610 .init = or51211_init,
611 .sleep = or51211_sleep,
612
613 .set_frontend = or51211_set_parameters,
614 .get_tune_settings = or51211_get_tune_settings,
615
616 .read_status = or51211_read_status,
617 .read_ber = or51211_read_ber,
618 .read_signal_strength = or51211_read_signal_strength,
619 .read_snr = or51211_read_snr,
620 .read_ucblocks = or51211_read_ucblocks,
621 };
622
623 module_param(debug, int, 0644);
624 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
625
626 MODULE_DESCRIPTION("Oren OR51211 VSB [pcHDTV HD-2000] Demodulator Driver");
627 MODULE_AUTHOR("Kirk Lapray");
628 MODULE_LICENSE("GPL");
629
630 EXPORT_SYMBOL(or51211_attach);
631
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