2 * linux/drivers/serial/imx.c
4 * Driver for Motorola IMX serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * Author: Sascha Hauer <sascha@saschahauer.de>
9 * Copyright (C) 2004 Pengutronix
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 * [29-Mar-2005] Mike Lee
26 * Added hardware handshake
28 #include <linux/config.h>
30 #if defined(CONFIG_SERIAL_IMX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
34 #include <linux/module.h>
35 #include <linux/ioport.h>
36 #include <linux/init.h>
37 #include <linux/console.h>
38 #include <linux/sysrq.h>
39 #include <linux/device.h>
40 #include <linux/tty.h>
41 #include <linux/tty_flip.h>
42 #include <linux/serial_core.h>
43 #include <linux/serial.h>
47 #include <asm/hardware.h>
49 /* We've been assigned a range on the "Low-density serial ports" major */
50 #define SERIAL_IMX_MAJOR 204
51 #define MINOR_START 41
55 #define IMX_ISR_PASS_LIMIT 256
58 * This is the size of our serial port register set.
60 #define UART_PORT_SIZE 0x100
63 * This determines how often we check the modem status signals
64 * for any change. They generally aren't connected to an IRQ
65 * so we have to poll them. We also check immediately before
66 * filling the TX fifo incase CTS has been dropped.
68 #define MCTRL_TIMEOUT (250*HZ/1000)
70 #define DRIVER_NAME "IMX-uart"
73 struct uart_port port
;
74 struct timer_list timer
;
75 unsigned int old_status
;
80 * Handle any change of modem status signal since we were last called.
82 static void imx_mctrl_check(struct imx_port
*sport
)
84 unsigned int status
, changed
;
86 status
= sport
->port
.ops
->get_mctrl(&sport
->port
);
87 changed
= status
^ sport
->old_status
;
92 sport
->old_status
= status
;
94 if (changed
& TIOCM_RI
)
95 sport
->port
.icount
.rng
++;
96 if (changed
& TIOCM_DSR
)
97 sport
->port
.icount
.dsr
++;
98 if (changed
& TIOCM_CAR
)
99 uart_handle_dcd_change(&sport
->port
, status
& TIOCM_CAR
);
100 if (changed
& TIOCM_CTS
)
101 uart_handle_cts_change(&sport
->port
, status
& TIOCM_CTS
);
103 wake_up_interruptible(&sport
->port
.info
->delta_msr_wait
);
107 * This is our per-port timeout handler, for checking the
108 * modem status signals.
110 static void imx_timeout(unsigned long data
)
112 struct imx_port
*sport
= (struct imx_port
*)data
;
115 if (sport
->port
.info
) {
116 spin_lock_irqsave(&sport
->port
.lock
, flags
);
117 imx_mctrl_check(sport
);
118 spin_unlock_irqrestore(&sport
->port
.lock
, flags
);
120 mod_timer(&sport
->timer
, jiffies
+ MCTRL_TIMEOUT
);
125 * interrupts disabled on entry
127 static void imx_stop_tx(struct uart_port
*port
, unsigned int tty_stop
)
129 struct imx_port
*sport
= (struct imx_port
*)port
;
130 UCR1((u32
)sport
->port
.membase
) &= ~UCR1_TXMPTYEN
;
134 * interrupts disabled on entry
136 static void imx_stop_rx(struct uart_port
*port
)
138 struct imx_port
*sport
= (struct imx_port
*)port
;
139 UCR2((u32
)sport
->port
.membase
) &= ~UCR2_RXEN
;
143 * Set the modem control timer to fire immediately.
145 static void imx_enable_ms(struct uart_port
*port
)
147 struct imx_port
*sport
= (struct imx_port
*)port
;
149 mod_timer(&sport
->timer
, jiffies
);
152 static inline void imx_transmit_buffer(struct imx_port
*sport
)
154 struct circ_buf
*xmit
= &sport
->port
.info
->xmit
;
157 /* send xmit->buf[xmit->tail]
158 * out the port here */
159 URTX0((u32
)sport
->port
.membase
) = xmit
->buf
[xmit
->tail
];
160 xmit
->tail
= (xmit
->tail
+ 1) &
161 (UART_XMIT_SIZE
- 1);
162 sport
->port
.icount
.tx
++;
163 if (uart_circ_empty(xmit
))
165 } while (!(UTS((u32
)sport
->port
.membase
) & UTS_TXFULL
));
167 if (uart_circ_empty(xmit
))
168 imx_stop_tx(&sport
->port
, 0);
172 * interrupts disabled on entry
174 static void imx_start_tx(struct uart_port
*port
, unsigned int tty_start
)
176 struct imx_port
*sport
= (struct imx_port
*)port
;
178 UCR1((u32
)sport
->port
.membase
) |= UCR1_TXMPTYEN
;
180 if(UTS((u32
)sport
->port
.membase
) & UTS_TXEMPTY
)
181 imx_transmit_buffer(sport
);
184 static irqreturn_t
imx_txint(int irq
, void *dev_id
, struct pt_regs
*regs
)
186 struct imx_port
*sport
= (struct imx_port
*)dev_id
;
187 struct circ_buf
*xmit
= &sport
->port
.info
->xmit
;
190 spin_lock_irqsave(&sport
->port
.lock
,flags
);
191 if (sport
->port
.x_char
)
194 URTX0((u32
)sport
->port
.membase
) = sport
->port
.x_char
;
198 if (uart_circ_empty(xmit
) || uart_tx_stopped(&sport
->port
)) {
199 imx_stop_tx(&sport
->port
, 0);
203 imx_transmit_buffer(sport
);
205 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
206 uart_write_wakeup(&sport
->port
);
209 spin_unlock_irqrestore(&sport
->port
.lock
,flags
);
213 static irqreturn_t
imx_rxint(int irq
, void *dev_id
, struct pt_regs
*regs
)
215 struct imx_port
*sport
= dev_id
;
216 unsigned int rx
,flg
,ignored
= 0;
217 struct tty_struct
*tty
= sport
->port
.info
->tty
;
220 rx
= URXD0((u32
)sport
->port
.membase
);
221 spin_lock_irqsave(&sport
->port
.lock
,flags
);
225 sport
->port
.icount
.rx
++;
227 if( USR2((u32
)sport
->port
.membase
) & USR2_BRCD
) {
228 USR2((u32
)sport
->port
.membase
) |= USR2_BRCD
;
229 if(uart_handle_break(&sport
->port
))
233 if (uart_handle_sysrq_char
234 (&sport
->port
, (unsigned char)rx
, regs
))
237 if( rx
& (URXD_PRERR
| URXD_OVRRUN
| URXD_FRMERR
) )
241 tty_insert_flip_char(tty
, rx
, flg
);
243 if (tty
->flip
.count
>= TTY_FLIPBUF_SIZE
)
247 rx
= URXD0((u32
)sport
->port
.membase
);
248 } while(rx
& URXD_CHARRDY
);
251 spin_unlock_irqrestore(&sport
->port
.lock
,flags
);
252 tty_flip_buffer_push(tty
);
257 sport
->port
.icount
.parity
++;
258 else if (rx
& URXD_FRMERR
)
259 sport
->port
.icount
.frame
++;
260 if (rx
& URXD_OVRRUN
)
261 sport
->port
.icount
.overrun
++;
263 if (rx
& sport
->port
.ignore_status_mask
) {
269 rx
&= sport
->port
.read_status_mask
;
273 else if (rx
& URXD_FRMERR
)
275 if (rx
& URXD_OVRRUN
)
279 sport
->port
.sysrq
= 0;
285 * Return TIOCSER_TEMT when transmitter is not busy.
287 static unsigned int imx_tx_empty(struct uart_port
*port
)
289 struct imx_port
*sport
= (struct imx_port
*)port
;
291 return USR2((u32
)sport
->port
.membase
) & USR2_TXDC
? TIOCSER_TEMT
: 0;
294 static unsigned int imx_get_mctrl(struct uart_port
*port
)
296 return TIOCM_CTS
| TIOCM_DSR
| TIOCM_CAR
;
299 static void imx_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
304 * Interrupts always disabled.
306 static void imx_break_ctl(struct uart_port
*port
, int break_state
)
308 struct imx_port
*sport
= (struct imx_port
*)port
;
311 spin_lock_irqsave(&sport
->port
.lock
, flags
);
313 if ( break_state
!= 0 )
314 UCR1((u32
)sport
->port
.membase
) |= UCR1_SNDBRK
;
316 UCR1((u32
)sport
->port
.membase
) &= ~UCR1_SNDBRK
;
318 spin_unlock_irqrestore(&sport
->port
.lock
, flags
);
321 #define TXTL 2 /* reset default */
322 #define RXTL 1 /* reset default */
324 static int imx_startup(struct uart_port
*port
)
326 struct imx_port
*sport
= (struct imx_port
*)port
;
331 /* set receiver / transmitter trigger level. We assume
332 * that RFDIV has been set by the arch setup or by the bootloader.
334 val
= (UFCR((u32
)sport
->port
.membase
) & UFCR_RFDIV
) | TXTL
<<10 | RXTL
;
335 UFCR((u32
)sport
->port
.membase
) = val
;
337 /* disable the DREN bit (Data Ready interrupt enable) before
340 UCR4((u32
)sport
->port
.membase
) &= ~UCR4_DREN
;
345 retval
= request_irq(sport
->rxirq
, imx_rxint
, 0,
347 if (retval
) goto error_out2
;
349 retval
= request_irq(sport
->txirq
, imx_txint
, 0,
351 if (retval
) goto error_out1
;
354 * Finally, clear and enable interrupts
357 UCR1((u32
)sport
->port
.membase
) |=
358 (UCR1_TXMPTYEN
| UCR1_RRDYEN
| UCR1_UARTEN
);
360 UCR2((u32
)sport
->port
.membase
) |= (UCR2_RXEN
| UCR2_TXEN
);
362 * Enable modem status interrupts
364 spin_lock_irqsave(&sport
->port
.lock
,flags
);
365 imx_enable_ms(&sport
->port
);
366 spin_unlock_irqrestore(&sport
->port
.lock
,flags
);
371 free_irq(sport
->rxirq
, sport
);
373 free_irq(sport
->txirq
, sport
);
377 static void imx_shutdown(struct uart_port
*port
)
379 struct imx_port
*sport
= (struct imx_port
*)port
;
384 del_timer_sync(&sport
->timer
);
387 * Free the interrupts
389 free_irq(sport
->txirq
, sport
);
390 free_irq(sport
->rxirq
, sport
);
393 * Disable all interrupts, port and break condition.
396 UCR1((u32
)sport
->port
.membase
) &=
397 ~(UCR1_TXMPTYEN
| UCR1_RRDYEN
| UCR1_UARTEN
);
401 imx_set_termios(struct uart_port
*port
, struct termios
*termios
,
404 struct imx_port
*sport
= (struct imx_port
*)port
;
406 unsigned int ucr2
, old_ucr1
, old_txrxen
, baud
, quot
;
407 unsigned int old_csize
= old
? old
->c_cflag
& CSIZE
: CS8
;
410 * If we don't support modem control lines, don't allow
414 termios
->c_cflag
&= ~(HUPCL
| CRTSCTS
| CMSPAR
);
415 termios
->c_cflag
|= CLOCAL
;
419 * We only support CS7 and CS8.
421 while ((termios
->c_cflag
& CSIZE
) != CS7
&&
422 (termios
->c_cflag
& CSIZE
) != CS8
) {
423 termios
->c_cflag
&= ~CSIZE
;
424 termios
->c_cflag
|= old_csize
;
428 if ((termios
->c_cflag
& CSIZE
) == CS8
)
429 ucr2
= UCR2_WS
| UCR2_SRST
| UCR2_IRTS
;
431 ucr2
= UCR2_SRST
| UCR2_IRTS
;
433 if (termios
->c_cflag
& CRTSCTS
) {
438 if (termios
->c_cflag
& CSTOPB
)
440 if (termios
->c_cflag
& PARENB
) {
442 if (!(termios
->c_cflag
& PARODD
))
447 * Ask the core to calculate the divisor for us.
449 baud
= uart_get_baud_rate(port
, termios
, old
, 0, port
->uartclk
/16);
450 quot
= uart_get_divisor(port
, baud
);
452 spin_lock_irqsave(&sport
->port
.lock
, flags
);
454 sport
->port
.read_status_mask
= 0;
455 if (termios
->c_iflag
& INPCK
)
456 sport
->port
.read_status_mask
|= (URXD_FRMERR
| URXD_PRERR
);
457 if (termios
->c_iflag
& (BRKINT
| PARMRK
))
458 sport
->port
.read_status_mask
|= URXD_BRK
;
461 * Characters to ignore
463 sport
->port
.ignore_status_mask
= 0;
464 if (termios
->c_iflag
& IGNPAR
)
465 sport
->port
.ignore_status_mask
|= URXD_PRERR
;
466 if (termios
->c_iflag
& IGNBRK
) {
467 sport
->port
.ignore_status_mask
|= URXD_BRK
;
469 * If we're ignoring parity and break indicators,
470 * ignore overruns too (for real raw support).
472 if (termios
->c_iflag
& IGNPAR
)
473 sport
->port
.ignore_status_mask
|= URXD_OVRRUN
;
476 del_timer_sync(&sport
->timer
);
479 * Update the per-port timeout.
481 uart_update_timeout(port
, termios
->c_cflag
, baud
);
484 * disable interrupts and drain transmitter
486 old_ucr1
= UCR1((u32
)sport
->port
.membase
);
487 UCR1((u32
)sport
->port
.membase
) &= ~(UCR1_TXMPTYEN
| UCR1_RRDYEN
);
489 while ( !(USR2((u32
)sport
->port
.membase
) & USR2_TXDC
))
492 /* then, disable everything */
493 old_txrxen
= UCR2((u32
)sport
->port
.membase
) & ( UCR2_TXEN
| UCR2_RXEN
);
494 UCR2((u32
)sport
->port
.membase
) &= ~( UCR2_TXEN
| UCR2_RXEN
);
496 /* set the parity, stop bits and data size */
497 UCR2((u32
)sport
->port
.membase
) = ucr2
;
499 /* set the baud rate. We assume uartclk = 16 MHz
502 * --------- = --------
505 UBIR((u32
)sport
->port
.membase
) = (baud
/ 100) - 1;
506 UBMR((u32
)sport
->port
.membase
) = 10000 - 1;
508 UCR1((u32
)sport
->port
.membase
) = old_ucr1
;
509 UCR2((u32
)sport
->port
.membase
) |= old_txrxen
;
511 if (UART_ENABLE_MS(&sport
->port
, termios
->c_cflag
))
512 imx_enable_ms(&sport
->port
);
514 spin_unlock_irqrestore(&sport
->port
.lock
, flags
);
517 static const char *imx_type(struct uart_port
*port
)
519 struct imx_port
*sport
= (struct imx_port
*)port
;
521 return sport
->port
.type
== PORT_IMX
? "IMX" : NULL
;
525 * Release the memory region(s) being used by 'port'.
527 static void imx_release_port(struct uart_port
*port
)
529 struct imx_port
*sport
= (struct imx_port
*)port
;
531 release_mem_region(sport
->port
.mapbase
, UART_PORT_SIZE
);
535 * Request the memory region(s) being used by 'port'.
537 static int imx_request_port(struct uart_port
*port
)
539 struct imx_port
*sport
= (struct imx_port
*)port
;
541 return request_mem_region(sport
->port
.mapbase
, UART_PORT_SIZE
,
542 "imx-uart") != NULL
? 0 : -EBUSY
;
546 * Configure/autoconfigure the port.
548 static void imx_config_port(struct uart_port
*port
, int flags
)
550 struct imx_port
*sport
= (struct imx_port
*)port
;
552 if (flags
& UART_CONFIG_TYPE
&&
553 imx_request_port(&sport
->port
) == 0)
554 sport
->port
.type
= PORT_IMX
;
558 * Verify the new serial_struct (for TIOCSSERIAL).
559 * The only change we allow are to the flags and type, and
560 * even then only between PORT_IMX and PORT_UNKNOWN
563 imx_verify_port(struct uart_port
*port
, struct serial_struct
*ser
)
565 struct imx_port
*sport
= (struct imx_port
*)port
;
568 if (ser
->type
!= PORT_UNKNOWN
&& ser
->type
!= PORT_IMX
)
570 if (sport
->port
.irq
!= ser
->irq
)
572 if (ser
->io_type
!= UPIO_MEM
)
574 if (sport
->port
.uartclk
/ 16 != ser
->baud_base
)
576 if ((void *)sport
->port
.mapbase
!= ser
->iomem_base
)
578 if (sport
->port
.iobase
!= ser
->port
)
585 static struct uart_ops imx_pops
= {
586 .tx_empty
= imx_tx_empty
,
587 .set_mctrl
= imx_set_mctrl
,
588 .get_mctrl
= imx_get_mctrl
,
589 .stop_tx
= imx_stop_tx
,
590 .start_tx
= imx_start_tx
,
591 .stop_rx
= imx_stop_rx
,
592 .enable_ms
= imx_enable_ms
,
593 .break_ctl
= imx_break_ctl
,
594 .startup
= imx_startup
,
595 .shutdown
= imx_shutdown
,
596 .set_termios
= imx_set_termios
,
598 .release_port
= imx_release_port
,
599 .request_port
= imx_request_port
,
600 .config_port
= imx_config_port
,
601 .verify_port
= imx_verify_port
,
604 static struct imx_port imx_ports
[] = {
606 .txirq
= UART1_MINT_TX
,
607 .rxirq
= UART1_MINT_RX
,
610 .iotype
= SERIAL_IO_MEM
,
611 .membase
= (void *)IMX_UART1_BASE
,
612 .mapbase
= IMX_UART1_BASE
, /* FIXME */
613 .irq
= UART1_MINT_RX
,
616 .flags
= ASYNC_BOOT_AUTOCONF
,
621 .txirq
= UART2_MINT_TX
,
622 .rxirq
= UART2_MINT_RX
,
625 .iotype
= SERIAL_IO_MEM
,
626 .membase
= (void *)IMX_UART2_BASE
,
627 .mapbase
= IMX_UART2_BASE
, /* FIXME */
628 .irq
= UART2_MINT_RX
,
631 .flags
= ASYNC_BOOT_AUTOCONF
,
639 * Setup the IMX serial ports.
640 * Note also that we support "console=ttySMXx" where "x" is either 0 or 1.
641 * Which serial port this ends up being depends on the machine you're
642 * running this kernel on. I'm not convinced that this is a good idea,
643 * but that's the way it traditionally works.
646 static void __init
imx_init_ports(void)
648 static int first
= 1;
655 for (i
= 0; i
< ARRAY_SIZE(imx_ports
); i
++) {
656 init_timer(&imx_ports
[i
].timer
);
657 imx_ports
[i
].timer
.function
= imx_timeout
;
658 imx_ports
[i
].timer
.data
= (unsigned long)&imx_ports
[i
];
661 imx_gpio_mode(PC9_PF_UART1_CTS
);
662 imx_gpio_mode(PC10_PF_UART1_RTS
);
663 imx_gpio_mode(PC11_PF_UART1_TXD
);
664 imx_gpio_mode(PC12_PF_UART1_RXD
);
665 imx_gpio_mode(PB28_PF_UART2_CTS
);
666 imx_gpio_mode(PB29_PF_UART2_RTS
);
668 imx_gpio_mode(PB30_PF_UART2_TXD
);
669 imx_gpio_mode(PB31_PF_UART2_RXD
);
671 #if 0 /* We don't need these, on the mx1 the _modem_ side of the uart
674 imx_gpio_mode(PD7_AF_UART2_DTR
);
675 imx_gpio_mode(PD8_AF_UART2_DCD
);
676 imx_gpio_mode(PD9_AF_UART2_RI
);
677 imx_gpio_mode(PD10_AF_UART2_DSR
);
683 #ifdef CONFIG_SERIAL_IMX_CONSOLE
686 * Interrupts are disabled on entering
689 imx_console_write(struct console
*co
, const char *s
, unsigned int count
)
691 struct imx_port
*sport
= &imx_ports
[co
->index
];
692 unsigned int old_ucr1
, old_ucr2
, i
;
695 * First, save UCR1/2 and then disable interrupts
697 old_ucr1
= UCR1((u32
)sport
->port
.membase
);
698 old_ucr2
= UCR2((u32
)sport
->port
.membase
);
700 UCR1((u32
)sport
->port
.membase
) =
701 (old_ucr1
| UCR1_UARTCLKEN
| UCR1_UARTEN
)
702 & ~(UCR1_TXMPTYEN
| UCR1_RRDYEN
);
703 UCR2((u32
)sport
->port
.membase
) = old_ucr2
| UCR2_TXEN
;
706 * Now, do each character
708 for (i
= 0; i
< count
; i
++) {
710 while ((UTS((u32
)sport
->port
.membase
) & UTS_TXFULL
))
713 URTX0((u32
)sport
->port
.membase
) = s
[i
];
716 while ((UTS((u32
)sport
->port
.membase
) & UTS_TXFULL
))
718 URTX0((u32
)sport
->port
.membase
) = '\r';
723 * Finally, wait for transmitter to become empty
726 while (!(USR2((u32
)sport
->port
.membase
) & USR2_TXDC
));
728 UCR1((u32
)sport
->port
.membase
) = old_ucr1
;
729 UCR2((u32
)sport
->port
.membase
) = old_ucr2
;
733 * If the port was already initialised (eg, by a boot loader),
734 * try to determine the current setup.
737 imx_console_get_options(struct imx_port
*sport
, int *baud
,
738 int *parity
, int *bits
)
740 if ( UCR1((u32
)sport
->port
.membase
) | UCR1_UARTEN
) {
741 /* ok, the port was enabled */
742 unsigned int ucr2
, ubir
,ubmr
, uartclk
;
744 ucr2
= UCR2((u32
)sport
->port
.membase
);
747 if (ucr2
& UCR2_PREN
) {
748 if (ucr2
& UCR2_PROE
)
759 ubir
= UBIR((u32
)sport
->port
.membase
) & 0xffff;
760 ubmr
= UBMR((u32
)sport
->port
.membase
) & 0xffff;
761 uartclk
= sport
->port
.uartclk
;
763 *baud
= ((uartclk
/16) * (ubir
+ 1)) / (ubmr
+ 1);
768 imx_console_setup(struct console
*co
, char *options
)
770 struct imx_port
*sport
;
777 * Check whether an invalid uart number has been specified, and
778 * if so, search for the first available port that does have
781 if (co
->index
== -1 || co
->index
>= ARRAY_SIZE(imx_ports
))
783 sport
= &imx_ports
[co
->index
];
786 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
788 imx_console_get_options(sport
, &baud
, &parity
, &bits
);
790 return uart_set_options(&sport
->port
, co
, baud
, parity
, bits
, flow
);
793 extern struct uart_driver imx_reg
;
794 static struct console imx_console
= {
796 .write
= imx_console_write
,
797 .device
= uart_console_device
,
798 .setup
= imx_console_setup
,
799 .flags
= CON_PRINTBUFFER
,
804 static int __init
imx_rs_console_init(void)
807 register_console(&imx_console
);
810 console_initcall(imx_rs_console_init
);
812 #define IMX_CONSOLE &imx_console
814 #define IMX_CONSOLE NULL
817 static struct uart_driver imx_reg
= {
818 .owner
= THIS_MODULE
,
819 .driver_name
= DRIVER_NAME
,
820 .dev_name
= "ttySMX",
821 .devfs_name
= "ttsmx/",
822 .major
= SERIAL_IMX_MAJOR
,
823 .minor
= MINOR_START
,
824 .nr
= ARRAY_SIZE(imx_ports
),
828 static int serial_imx_suspend(struct device
*_dev
, u32 state
, u32 level
)
830 struct imx_port
*sport
= dev_get_drvdata(_dev
);
832 if (sport
&& level
== SUSPEND_DISABLE
)
833 uart_suspend_port(&imx_reg
, &sport
->port
);
838 static int serial_imx_resume(struct device
*_dev
, u32 level
)
840 struct imx_port
*sport
= dev_get_drvdata(_dev
);
842 if (sport
&& level
== RESUME_ENABLE
)
843 uart_resume_port(&imx_reg
, &sport
->port
);
848 static int serial_imx_probe(struct device
*_dev
)
850 struct platform_device
*dev
= to_platform_device(_dev
);
852 imx_ports
[dev
->id
].port
.dev
= _dev
;
853 uart_add_one_port(&imx_reg
, &imx_ports
[dev
->id
].port
);
854 dev_set_drvdata(_dev
, &imx_ports
[dev
->id
]);
858 static int serial_imx_remove(struct device
*_dev
)
860 struct imx_port
*sport
= dev_get_drvdata(_dev
);
862 dev_set_drvdata(_dev
, NULL
);
865 uart_remove_one_port(&imx_reg
, &sport
->port
);
870 static struct device_driver serial_imx_driver
= {
872 .bus
= &platform_bus_type
,
873 .probe
= serial_imx_probe
,
874 .remove
= serial_imx_remove
,
876 .suspend
= serial_imx_suspend
,
877 .resume
= serial_imx_resume
,
880 static int __init
imx_serial_init(void)
884 printk(KERN_INFO
"Serial: IMX driver\n");
888 ret
= uart_register_driver(&imx_reg
);
892 ret
= driver_register(&serial_imx_driver
);
894 uart_unregister_driver(&imx_reg
);
899 static void __exit
imx_serial_exit(void)
901 uart_unregister_driver(&imx_reg
);
904 module_init(imx_serial_init
);
905 module_exit(imx_serial_exit
);
907 MODULE_AUTHOR("Sascha Hauer");
908 MODULE_DESCRIPTION("IMX generic serial port driver");
909 MODULE_LICENSE("GPL");