4 #include <linux/config.h>
5 #include <linux/interrupt.h>
6 #include <asm/ptrace.h>
10 * On the ColdFire we keep track of all vectors. That way drivers
11 * can register whatever vector number they wish, and we can deal
15 #define NR_IRQS SYS_IRQS
20 * # of m68k interrupts
23 #define NR_IRQS (24+SYS_IRQS)
25 #endif /* CONFIG_COLDFIRE */
28 * Interrupt source definitions
29 * General interrupt sources are the level 1-7.
30 * Adding an interrupt service routine for one of these sources
31 * results in the addition of that routine to a chain of routines.
32 * Each one is called in succession. Each individual interrupt
33 * service routine should determine if the device associated with
34 * that routine requires service.
37 #define IRQ1 (1) /* level 1 interrupt */
38 #define IRQ2 (2) /* level 2 interrupt */
39 #define IRQ3 (3) /* level 3 interrupt */
40 #define IRQ4 (4) /* level 4 interrupt */
41 #define IRQ5 (5) /* level 5 interrupt */
42 #define IRQ6 (6) /* level 6 interrupt */
43 #define IRQ7 (7) /* level 7 interrupt (non-maskable) */
46 * Machine specific interrupt sources.
48 * Adding an interrupt service routine for a source with this bit
49 * set indicates a special machine specific interrupt source.
50 * The machine specific files define these sources.
52 * The IRQ_MACHSPEC bit is now gone - the only thing it did was to
53 * introduce unnecessary overhead.
55 * All interrupt handling is actually machine specific so it is better
56 * to use function pointers, as used by the Sparc port, and select the
57 * interrupt handling functions when initializing the kernel. This way
58 * we save some unnecessary overhead at run-time.
62 extern void (*mach_enable_irq
)(unsigned int);
63 extern void (*mach_disable_irq
)(unsigned int);
66 * various flags for request_irq() - the Amiga now uses the standard
67 * mechanism like all other architectures - SA_INTERRUPT and SA_SHIRQ
70 #define IRQ_FLG_LOCK (0x0001) /* handler is not replaceable */
71 #define IRQ_FLG_REPLACE (0x0002) /* replace existing handler */
72 #define IRQ_FLG_FAST (0x0004)
73 #define IRQ_FLG_SLOW (0x0008)
74 #define IRQ_FLG_STD (0x8000) /* internally used */
78 #define CPM_INTERRUPT IRQ4
80 /* see MC68360 User's Manual, p. 7-377 */
81 #define CPM_VECTOR_BASE 0x04 /* 3 MSbits of CPM vector */
83 #endif /* CONFIG_M68360 */
86 * This structure is used to chain together the ISRs for a particular
87 * interrupt source (if it supports chaining).
89 typedef struct irq_node
{
90 irqreturn_t (*handler
)(int, void *, struct pt_regs
*);
94 struct irq_node
*next
;
98 * This structure has only 4 elements for speed reasons
100 typedef struct irq_handler
{
101 irqreturn_t (*handler
)(int, void *, struct pt_regs
*);
107 /* count of spurious interrupts */
108 extern volatile unsigned int num_spurious
;
111 * This function returns a new irq_node_t
113 extern irq_node_t
*new_irq_node(void);
116 * Some drivers want these entry points
118 #define enable_irq(x) (mach_enable_irq ? (*mach_enable_irq)(x) : 0)
119 #define disable_irq(x) (mach_disable_irq ? (*mach_disable_irq)(x) : 0)
121 #define enable_irq_nosync(x) enable_irq(x)
122 #define disable_irq_nosync(x) disable_irq(x)
126 int handle_IRQ_event(unsigned int, struct pt_regs
*, struct irqaction
*);
128 #endif /* _M68K_IRQ_H_ */