include/asm-mips/dec/kn01.h

   1 /*
   2  * Hardware info about DECstation DS2100/3100 systems (otherwise known as
   3  * pmin/pmax or KN01).
   4  *
   5  * This file is subject to the terms and conditions of the GNU General Public
   6  * License.  See the file "COPYING" in the main directory of this archive
   7  * for more details.
   8  *
   9  * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions
  10  * are by courtesy of Chris Fraser.
  11  * Copyright (C) 2002, 2003  Maciej W. Rozycki
  12  */
  13 #ifndef __ASM_MIPS_DEC_KN01_H
  14 #define __ASM_MIPS_DEC_KN01_H
  15
  16 #include <asm/addrspace.h>
  17
  18 #define KN01_SLOT_BASE  KSEG1ADDR(0x10000000)
  19 #define KN01_SLOT_SIZE  0x01000000
  20
  21 /*
  22  * Address ranges for devices.
  23  */
  24 #define KN01_PMASK      (0*KN01_SLOT_SIZE)      /* color plane mask */
  25 #define KN01_PCC        (1*KN01_SLOT_SIZE)      /* PCC (DC503) cursor */
  26 #define KN01_VDAC       (2*KN01_SLOT_SIZE)      /* color map */
  27 #define KN01_RES_3      (3*KN01_SLOT_SIZE)      /* unused */
  28 #define KN01_RES_4      (4*KN01_SLOT_SIZE)      /* unused */
  29 #define KN01_RES_5      (5*KN01_SLOT_SIZE)      /* unused */
  30 #define KN01_RES_6      (6*KN01_SLOT_SIZE)      /* unused */
  31 #define KN01_ERRADDR    (7*KN01_SLOT_SIZE)      /* write error address */
  32 #define KN01_LANCE      (8*KN01_SLOT_SIZE)      /* LANCE (Am7990) Ethernet */
  33 #define KN01_LANCE_MEM  (9*KN01_SLOT_SIZE)      /* LANCE buffer memory */
  34 #define KN01_SII        (10*KN01_SLOT_SIZE)     /* SII (DC7061) SCSI */
  35 #define KN01_SII_MEM    (11*KN01_SLOT_SIZE)     /* SII buffer memory */
  36 #define KN01_DZ11       (12*KN01_SLOT_SIZE)     /* DZ11 (DC7085) serial */
  37 #define KN01_RTC        (13*KN01_SLOT_SIZE)     /* DS1287 RTC (bytes #0) */
  38 #define KN01_ESAR       (13*KN01_SLOT_SIZE)     /* MAC address (bytes #1) */
  39 #define KN01_CSR        (14*KN01_SLOT_SIZE)     /* system ctrl & status reg */
  40 #define KN01_SYS_ROM    (15*KN01_SLOT_SIZE)     /* system board ROM */
  41
  42
  43 /*
  44  * Some port addresses...
  45  */
  46 #define KN01_LANCE_BASE (KN01_SLOT_BASE + KN01_LANCE)   /* 0xB8000000 */
  47 #define KN01_DZ11_BASE  (KN01_SLOT_BASE + KN01_DZ11)    /* 0xBC000000 */
  48 #define KN01_RTC_BASE   (KN01_SLOT_BASE + KN01_RTC)     /* 0xBD000000 */
  49
  50
  51 /*
  52  * Frame buffer memory address.
  53  */
  54 #define KN01_VFB_MEM    KSEG1ADDR(0x0fc00000)
  55
  56 /*
  57  * CPU interrupt bits.
  58  */
  59 #define KN01_CPU_INR_BUS        6       /* memory, I/O bus read/write errors */
  60 #define KN01_CPU_INR_VIDEO      6       /* PCC area detect #2 */
  61 #define KN01_CPU_INR_RTC        5       /* DS1287 RTC */
  62 #define KN01_CPU_INR_DZ11       4       /* DZ11 (DC7085) serial */
  63 #define KN01_CPU_INR_LANCE      3       /* LANCE (Am7990) Ethernet */
  64 #define KN01_CPU_INR_SII        2       /* SII (DC7061) SCSI */
  65
  66
  67 /*
  68  * System Control & Status Register bits.
  69  */
  70 #define KN01_CSR_MNFMOD         (1<<15) /* MNFMOD manufacturing jumper */
  71 #define KN01_CSR_STATUS         (1<<14) /* self-test result status output */
  72 #define KN01_CSR_PARDIS         (1<<13) /* parity error disable */
  73 #define KN01_CSR_CRSRTST        (1<<12) /* PCC test output */
  74 #define KN01_CSR_MONO           (1<<11) /* mono/color fb SIMM installed */
  75 #define KN01_CSR_MEMERR         (1<<10) /* write timeout error status & ack*/
  76 #define KN01_CSR_VINT           (1<<9)  /* PCC area detect #2 status & ack */
  77 #define KN01_CSR_TXDIS          (1<<8)  /* DZ11 transmit disable */
  78 #define KN01_CSR_VBGTRG         (1<<2)  /* blue DAC voltage over green (r/o) */
  79 #define KN01_CSR_VRGTRG         (1<<1)  /* red DAC voltage over green (r/o) */
  80 #define KN01_CSR_VRGTRB         (1<<0)  /* red DAC voltage over blue (r/o) */
  81 #define KN01_CSR_LEDS           (0xff<<0) /* ~diagnostic LEDs (w/o) */
  82
  83 #endif /* __ASM_MIPS_DEC_KN01_H */