Linux-2.6.12-rc2
[linux-2.6/next.git] / include / asm-parisc / cacheflush.h
blob06732719d927f7d2a5d71151d9245ccda79bccba
1 #ifndef _PARISC_CACHEFLUSH_H
2 #define _PARISC_CACHEFLUSH_H
4 #include <linux/config.h>
5 #include <linux/mm.h>
7 /* The usual comment is "Caches aren't brain-dead on the <architecture>".
8 * Unfortunately, that doesn't apply to PA-RISC. */
10 /* Cache flush operations */
12 #ifdef CONFIG_SMP
13 #define flush_cache_mm(mm) flush_cache_all()
14 #else
15 #define flush_cache_mm(mm) flush_cache_all_local()
16 #endif
18 #define flush_kernel_dcache_range(start,size) \
19 flush_kernel_dcache_range_asm((start), (start)+(size));
21 extern void flush_cache_all_local(void);
23 static inline void cacheflush_h_tmp_function(void *dummy)
25 flush_cache_all_local();
28 static inline void flush_cache_all(void)
30 on_each_cpu(cacheflush_h_tmp_function, NULL, 1, 1);
33 #define flush_cache_vmap(start, end) flush_cache_all()
34 #define flush_cache_vunmap(start, end) flush_cache_all()
36 extern int parisc_cache_flush_threshold;
37 void parisc_setup_cache_timing(void);
39 static inline void
40 flush_user_dcache_range(unsigned long start, unsigned long end)
42 if ((end - start) < parisc_cache_flush_threshold)
43 flush_user_dcache_range_asm(start,end);
44 else
45 flush_data_cache();
48 static inline void
49 flush_user_icache_range(unsigned long start, unsigned long end)
51 if ((end - start) < parisc_cache_flush_threshold)
52 flush_user_icache_range_asm(start,end);
53 else
54 flush_instruction_cache();
57 extern void flush_dcache_page(struct page *page);
59 #define flush_dcache_mmap_lock(mapping) \
60 write_lock_irq(&(mapping)->tree_lock)
61 #define flush_dcache_mmap_unlock(mapping) \
62 write_unlock_irq(&(mapping)->tree_lock)
64 #define flush_icache_page(vma,page) do { flush_kernel_dcache_page(page_address(page)); flush_kernel_icache_page(page_address(page)); } while (0)
66 #define flush_icache_range(s,e) do { flush_kernel_dcache_range_asm(s,e); flush_kernel_icache_range_asm(s,e); } while (0)
68 #define copy_to_user_page(vma, page, vaddr, dst, src, len) \
69 do { \
70 flush_cache_page(vma, vaddr, page_to_pfn(page)); \
71 memcpy(dst, src, len); \
72 flush_kernel_dcache_range_asm((unsigned long)dst, (unsigned long)dst + len); \
73 } while (0)
75 #define copy_from_user_page(vma, page, vaddr, dst, src, len) \
76 do { \
77 flush_cache_page(vma, vaddr, page_to_pfn(page)); \
78 memcpy(dst, src, len); \
79 } while (0)
81 static inline void flush_cache_range(struct vm_area_struct *vma,
82 unsigned long start, unsigned long end)
84 int sr3;
86 if (!vma->vm_mm->context) {
87 BUG();
88 return;
91 sr3 = mfsp(3);
92 if (vma->vm_mm->context == sr3) {
93 flush_user_dcache_range(start,end);
94 flush_user_icache_range(start,end);
95 } else {
96 flush_cache_all();
100 /* Simple function to work out if we have an existing address translation
101 * for a user space vma. */
102 static inline pte_t *__translation_exists(struct mm_struct *mm,
103 unsigned long addr)
105 pgd_t *pgd = pgd_offset(mm, addr);
106 pmd_t *pmd;
107 pte_t *pte;
109 if(pgd_none(*pgd))
110 return NULL;
112 pmd = pmd_offset(pgd, addr);
113 if(pmd_none(*pmd) || pmd_bad(*pmd))
114 return NULL;
116 pte = pte_offset_map(pmd, addr);
118 /* The PA flush mappings show up as pte_none, but they're
119 * valid none the less */
120 if(pte_none(*pte) && ((pte_val(*pte) & _PAGE_FLUSH) == 0))
121 return NULL;
122 return pte;
124 #define translation_exists(vma, addr) __translation_exists((vma)->vm_mm, addr)
127 /* Private function to flush a page from the cache of a non-current
128 * process. cr25 contains the Page Directory of the current user
129 * process; we're going to hijack both it and the user space %sr3 to
130 * temporarily make the non-current process current. We have to do
131 * this because cache flushing may cause a non-access tlb miss which
132 * the handlers have to fill in from the pgd of the non-current
133 * process. */
134 static inline void
135 flush_user_cache_page_non_current(struct vm_area_struct *vma,
136 unsigned long vmaddr)
138 /* save the current process space and pgd */
139 unsigned long space = mfsp(3), pgd = mfctl(25);
141 /* we don't mind taking interrups since they may not
142 * do anything with user space, but we can't
143 * be preempted here */
144 preempt_disable();
146 /* make us current */
147 mtctl(__pa(vma->vm_mm->pgd), 25);
148 mtsp(vma->vm_mm->context, 3);
150 flush_user_dcache_page(vmaddr);
151 if(vma->vm_flags & VM_EXEC)
152 flush_user_icache_page(vmaddr);
154 /* put the old current process back */
155 mtsp(space, 3);
156 mtctl(pgd, 25);
157 preempt_enable();
160 static inline void
161 __flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr)
163 if (likely(vma->vm_mm->context == mfsp(3))) {
164 flush_user_dcache_page(vmaddr);
165 if (vma->vm_flags & VM_EXEC)
166 flush_user_icache_page(vmaddr);
167 } else {
168 flush_user_cache_page_non_current(vma, vmaddr);
172 static inline void
173 flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long pfn)
175 BUG_ON(!vma->vm_mm->context);
177 if(likely(translation_exists(vma, vmaddr)))
178 __flush_cache_page(vma, vmaddr);
181 #endif