1 /*******************************************************************************
4 Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 The full GNU General Public License is included in this distribution in the
24 Linux NICS <linux.nics@intel.com>
25 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
26 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *******************************************************************************/
31 /* glue for the OS independent part of e1000
32 * includes register access macros
35 #ifndef _E1000_OSDEP_H_
36 #define _E1000_OSDEP_H_
38 #include <linux/types.h>
39 #include <linux/pci.h>
40 #include <linux/delay.h>
42 #include <linux/interrupt.h>
43 #include <linux/sched.h>
52 #define MSGOUT(S, A, B) printk(KERN_DEBUG S "\n", A, B)
55 #define DEBUGOUT(S) printk(KERN_DEBUG S "\n")
56 #define DEBUGOUT1(S, A...) printk(KERN_DEBUG S "\n", A)
59 #define DEBUGOUT1(S, A...)
62 #define DEBUGFUNC(F) DEBUGOUT(F)
63 #define DEBUGOUT2 DEBUGOUT1
64 #define DEBUGOUT3 DEBUGOUT2
65 #define DEBUGOUT7 DEBUGOUT3
68 #define E1000_WRITE_REG(a, reg, value) ( \
69 writel((value), ((a)->hw_addr + \
70 (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg))))
72 #define E1000_READ_REG(a, reg) ( \
73 readl((a)->hw_addr + \
74 (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg)))
76 #define E1000_WRITE_REG_ARRAY(a, reg, offset, value) ( \
77 writel((value), ((a)->hw_addr + \
78 (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
81 #define E1000_READ_REG_ARRAY(a, reg, offset) ( \
82 readl((a)->hw_addr + \
83 (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
86 #define E1000_READ_REG_ARRAY_DWORD E1000_READ_REG_ARRAY
87 #define E1000_WRITE_REG_ARRAY_DWORD E1000_WRITE_REG_ARRAY
89 #define E1000_WRITE_REG_ARRAY_WORD(a, reg, offset, value) ( \
90 writew((value), ((a)->hw_addr + \
91 (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
94 #define E1000_READ_REG_ARRAY_WORD(a, reg, offset) ( \
95 readw((a)->hw_addr + \
96 (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
99 #define E1000_WRITE_REG_ARRAY_BYTE(a, reg, offset, value) ( \
100 writeb((value), ((a)->hw_addr + \
101 (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
104 #define E1000_READ_REG_ARRAY_BYTE(a, reg, offset) ( \
105 readb((a)->hw_addr + \
106 (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
109 #define E1000_WRITE_FLUSH(a) E1000_READ_REG(a, STATUS)
111 #define E1000_WRITE_ICH8_REG(a, reg, value) ( \
112 writel((value), ((a)->flash_address + reg)))
114 #define E1000_READ_ICH8_REG(a, reg) ( \
115 readl((a)->flash_address + reg))
117 #define E1000_WRITE_ICH8_REG16(a, reg, value) ( \
118 writew((value), ((a)->flash_address + reg)))
120 #define E1000_READ_ICH8_REG16(a, reg) ( \
121 readw((a)->flash_address + reg))
124 #endif /* _E1000_OSDEP_H_ */