drivers/net/ehea/ehea.h

   1 /*
   2  *  linux/drivers/net/ehea/ehea.h
   3  *
   4  *  eHEA ethernet device driver for IBM eServer System p
   5  *
   6  *  (C) Copyright IBM Corp. 2006
   7  *
   8  *  Authors:
   9  *       Christoph Raisch <raisch@de.ibm.com>
  10  *       Jan-Bernd Themann <themann@de.ibm.com>
  11  *       Thomas Klein <tklein@de.ibm.com>
  12  *
  13  *
  14  * This program is free software; you can redistribute it and/or modify
  15  * it under the terms of the GNU General Public License as published by
  16  * the Free Software Foundation; either version 2, or (at your option)
  17  * any later version.
  18  *
  19  * This program is distributed in the hope that it will be useful,
  20  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  22  * GNU General Public License for more details.
  23  *
  24  * You should have received a copy of the GNU General Public License
  25  * along with this program; if not, write to the Free Software
  26  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  27  */
  28
  29 #ifndef __EHEA_H__
  30 #define __EHEA_H__
  31
  32 #include <linux/module.h>
  33 #include <linux/ethtool.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/if_vlan.h>
  36
  37 #include <asm/ibmebus.h>
  38 #include <asm/abs_addr.h>
  39 #include <asm/io.h>
  40
  41 #define DRV_NAME        "ehea"
  42 #define DRV_VERSION     "EHEA_0028"
  43
  44 #define EHEA_MSG_DEFAULT (NETIF_MSG_LINK | NETIF_MSG_TIMER \
  45         | NETIF_MSG_RX_ERR | NETIF_MSG_TX_ERR)
  46
  47 #define EHEA_MAX_ENTRIES_RQ1 32767
  48 #define EHEA_MAX_ENTRIES_RQ2 16383
  49 #define EHEA_MAX_ENTRIES_RQ3 16383
  50 #define EHEA_MAX_ENTRIES_SQ  32767
  51 #define EHEA_MIN_ENTRIES_QP  127
  52
  53 #define EHEA_NUM_TX_QP 1
  54
  55 #ifdef EHEA_SMALL_QUEUES
  56 #define EHEA_MAX_CQE_COUNT      1023
  57 #define EHEA_DEF_ENTRIES_SQ     1023
  58 #define EHEA_DEF_ENTRIES_RQ1    4095
  59 #define EHEA_DEF_ENTRIES_RQ2    1023
  60 #define EHEA_DEF_ENTRIES_RQ3    1023
  61 #else
  62 #define EHEA_MAX_CQE_COUNT     32000
  63 #define EHEA_DEF_ENTRIES_SQ    16000
  64 #define EHEA_DEF_ENTRIES_RQ1   32080
  65 #define EHEA_DEF_ENTRIES_RQ2    4020
  66 #define EHEA_DEF_ENTRIES_RQ3    4020
  67 #endif
  68
  69 #define EHEA_MAX_ENTRIES_EQ 20
  70
  71 #define EHEA_SG_SQ  2
  72 #define EHEA_SG_RQ1 1
  73 #define EHEA_SG_RQ2 0
  74 #define EHEA_SG_RQ3 0
  75
  76 #define EHEA_MAX_PACKET_SIZE    9022    /* for jumbo frames */
  77 #define EHEA_RQ2_PKT_SIZE       1522
  78 #define EHEA_L_PKT_SIZE         256     /* low latency */
  79
  80 #define EHEA_POLL_MAX_RWQE      1000
  81
  82 /* Send completion signaling */
  83 #define EHEA_SIG_IV_LONG           1
  84
  85 /* Protection Domain Identifier */
  86 #define EHEA_PD_ID        0xaabcdeff
  87
  88 #define EHEA_RQ2_THRESHOLD         1
  89 #define EHEA_RQ3_THRESHOLD         9    /* use RQ3 threshold of 1522 bytes */
  90
  91 #define EHEA_SPEED_10G         10000
  92 #define EHEA_SPEED_1G           1000
  93 #define EHEA_SPEED_100M          100
  94 #define EHEA_SPEED_10M            10
  95 #define EHEA_SPEED_AUTONEG         0
  96
  97 /* Broadcast/Multicast registration types */
  98 #define EHEA_BCMC_SCOPE_ALL     0x08
  99 #define EHEA_BCMC_SCOPE_SINGLE  0x00
 100 #define EHEA_BCMC_MULTICAST     0x04
 101 #define EHEA_BCMC_BROADCAST     0x00
 102 #define EHEA_BCMC_UNTAGGED      0x02
 103 #define EHEA_BCMC_TAGGED        0x00
 104 #define EHEA_BCMC_VLANID_ALL    0x01
 105 #define EHEA_BCMC_VLANID_SINGLE 0x00
 106
 107 /* Use this define to kmallocate pHYP control blocks */
 108 #define H_CB_ALIGNMENT          4096
 109
 110 #define EHEA_CACHE_LINE          128
 111
 112 /* Memory Regions */
 113 #define EHEA_MR_MAX_TX_PAGES   20
 114 #define EHEA_MR_TX_DATA_PN      3
 115 #define EHEA_MR_ACC_CTRL       0x00800000
 116 #define EHEA_RWQES_PER_MR_RQ2  10
 117 #define EHEA_RWQES_PER_MR_RQ3  10
 118
 119 #define EHEA_WATCH_DOG_TIMEOUT 10*HZ
 120
 121 /* utility functions */
 122
 123 #define ehea_info(fmt, args...) \
 124         printk(KERN_INFO DRV_NAME ": " fmt "\n", ## args)
 125
 126 #define ehea_error(fmt, args...) \
 127         printk(KERN_ERR DRV_NAME ": Error in %s: " fmt "\n", __func__, ## args)
 128
 129 #ifdef DEBUG
 130 #define ehea_debug(fmt, args...) \
 131         printk(KERN_DEBUG DRV_NAME ": " fmt, ## args)
 132 #else
 133 #define ehea_debug(fmt, args...) do {} while (0)
 134 #endif
 135
 136 void ehea_dump(void *adr, int len, char *msg);
 137
 138 #define EHEA_BMASK(pos, length) (((pos) << 16) + (length))
 139
 140 #define EHEA_BMASK_IBM(from, to) (((63 - to) << 16) + ((to) - (from) + 1))
 141
 142 #define EHEA_BMASK_SHIFTPOS(mask) (((mask) >> 16) & 0xffff)
 143
 144 #define EHEA_BMASK_MASK(mask) \
 145         (0xffffffffffffffffULL >> ((64 - (mask)) & 0xffff))
 146
 147 #define EHEA_BMASK_SET(mask, value) \
 148         ((EHEA_BMASK_MASK(mask) & ((u64)(value))) << EHEA_BMASK_SHIFTPOS(mask))
 149
 150 #define EHEA_BMASK_GET(mask, value) \
 151         (EHEA_BMASK_MASK(mask) & (((u64)(value)) >> EHEA_BMASK_SHIFTPOS(mask)))
 152
 153 /*
 154  * Generic ehea page
 155  */
 156 struct ehea_page {
 157         u8 entries[PAGE_SIZE];
 158 };
 159
 160 /*
 161  * Generic queue in linux kernel virtual memory
 162  */
 163 struct hw_queue {
 164         u64 current_q_offset;           /* current queue entry */
 165         struct ehea_page **queue_pages; /* array of pages belonging to queue */
 166         u32 qe_size;                    /* queue entry size */
 167         u32 queue_length;               /* queue length allocated in bytes */
 168         u32 pagesize;
 169         u32 toggle_state;               /* toggle flag - per page */
 170         u32 reserved;                   /* 64 bit alignment */
 171 };
 172
 173 /*
 174  * For pSeries this is a 64bit memory address where
 175  * I/O memory is mapped into CPU address space
 176  */
 177 struct h_epa {
 178         void __iomem *addr;
 179 };
 180
 181 struct h_epa_user {
 182         u64 addr;
 183 };
 184
 185 struct h_epas {
 186         struct h_epa kernel;    /* kernel space accessible resource,
 187                                    set to 0 if unused */
 188         struct h_epa_user user; /* user space accessible resource
 189                                    set to 0 if unused */
 190 };
 191
 192 struct ehea_qp;
 193 struct ehea_cq;
 194 struct ehea_eq;
 195 struct ehea_port;
 196 struct ehea_av;
 197
 198 /*
 199  * Queue attributes passed to ehea_create_qp()
 200  */
 201 struct ehea_qp_init_attr {
 202         /* input parameter */
 203         u32 qp_token;           /* queue token */
 204         u8 low_lat_rq1;
 205         u8 signalingtype;       /* cqe generation flag */
 206         u8 rq_count;            /* num of receive queues */
 207         u8 eqe_gen;             /* eqe generation flag */
 208         u16 max_nr_send_wqes;   /* max number of send wqes */
 209         u16 max_nr_rwqes_rq1;   /* max number of receive wqes */
 210         u16 max_nr_rwqes_rq2;
 211         u16 max_nr_rwqes_rq3;
 212         u8 wqe_size_enc_sq;
 213         u8 wqe_size_enc_rq1;
 214         u8 wqe_size_enc_rq2;
 215         u8 wqe_size_enc_rq3;
 216         u8 swqe_imm_data_len;   /* immediate data length for swqes */
 217         u16 port_nr;
 218         u16 rq2_threshold;
 219         u16 rq3_threshold;
 220         u64 send_cq_handle;
 221         u64 recv_cq_handle;
 222         u64 aff_eq_handle;
 223
 224         /* output parameter */
 225         u32 qp_nr;
 226         u16 act_nr_send_wqes;
 227         u16 act_nr_rwqes_rq1;
 228         u16 act_nr_rwqes_rq2;
 229         u16 act_nr_rwqes_rq3;
 230         u8 act_wqe_size_enc_sq;
 231         u8 act_wqe_size_enc_rq1;
 232         u8 act_wqe_size_enc_rq2;
 233         u8 act_wqe_size_enc_rq3;
 234         u32 nr_sq_pages;
 235         u32 nr_rq1_pages;
 236         u32 nr_rq2_pages;
 237         u32 nr_rq3_pages;
 238         u32 liobn_sq;
 239         u32 liobn_rq1;
 240         u32 liobn_rq2;
 241         u32 liobn_rq3;
 242 };
 243
 244 /*
 245  * Event Queue attributes, passed as paramter
 246  */
 247 struct ehea_eq_attr {
 248         u32 type;
 249         u32 max_nr_of_eqes;
 250         u8 eqe_gen;        /* generate eqe flag */
 251         u64 eq_handle;
 252         u32 act_nr_of_eqes;
 253         u32 nr_pages;
 254         u32 ist1;          /* Interrupt service token */
 255         u32 ist2;
 256         u32 ist3;
 257         u32 ist4;
 258 };
 259
 260
 261 /*
 262  * Event Queue
 263  */
 264 struct ehea_eq {
 265         struct ehea_adapter *adapter;
 266         struct hw_queue hw_queue;
 267         u64 fw_handle;
 268         struct h_epas epas;
 269         spinlock_t spinlock;
 270         struct ehea_eq_attr attr;
 271 };
 272
 273 /*
 274  * HEA Queues
 275  */
 276 struct ehea_qp {
 277         struct ehea_adapter *adapter;
 278         u64 fw_handle;                  /* QP handle for firmware calls */
 279         struct hw_queue hw_squeue;
 280         struct hw_queue hw_rqueue1;
 281         struct hw_queue hw_rqueue2;
 282         struct hw_queue hw_rqueue3;
 283         struct h_epas epas;
 284         struct ehea_qp_init_attr init_attr;
 285 };
 286
 287 /*
 288  * Completion Queue attributes
 289  */
 290 struct ehea_cq_attr {
 291         /* input parameter */
 292         u32 max_nr_of_cqes;
 293         u32 cq_token;
 294         u64 eq_handle;
 295
 296         /* output parameter */
 297         u32 act_nr_of_cqes;
 298         u32 nr_pages;
 299 };
 300
 301 /*
 302  * Completion Queue
 303  */
 304 struct ehea_cq {
 305         struct ehea_adapter *adapter;
 306         u64 fw_handle;
 307         struct hw_queue hw_queue;
 308         struct h_epas epas;
 309         struct ehea_cq_attr attr;
 310 };
 311
 312 /*
 313  * Memory Region
 314  */
 315 struct ehea_mr {
 316         u64 handle;
 317         u64 vaddr;
 318         u32 lkey;
 319 };
 320
 321 /*
 322  * Port state information
 323  */
 324 struct port_state {
 325         int poll_max_processed;
 326         int poll_receive_errors;
 327         int ehea_poll;
 328         int queue_stopped;
 329         int min_swqe_avail;
 330         u64 sqc_stop_sum;
 331         int pkt_send;
 332         int pkt_xmit;
 333         int send_tasklet;
 334         int nwqe;
 335 };
 336
 337 #define EHEA_IRQ_NAME_SIZE 20
 338
 339 /*
 340  * Queue SKB Array
 341  */
 342 struct ehea_q_skb_arr {
 343         struct sk_buff **arr;           /* skb array for queue */
 344         int len;                        /* array length */
 345         int index;                      /* array index */
 346         int os_skbs;                    /* rq2/rq3 only: outstanding skbs */
 347 };
 348
 349 /*
 350  * Port resources
 351  */
 352 struct ehea_port_res {
 353         struct ehea_mr send_mr;         /* send memory region */
 354         struct ehea_mr recv_mr;         /* receive memory region */
 355         spinlock_t xmit_lock;
 356         struct ehea_port *port;
 357         char int_recv_name[EHEA_IRQ_NAME_SIZE];
 358         char int_send_name[EHEA_IRQ_NAME_SIZE];
 359         struct ehea_qp *qp;
 360         struct ehea_cq *send_cq;
 361         struct ehea_cq *recv_cq;
 362         struct ehea_eq *send_eq;
 363         struct ehea_eq *recv_eq;
 364         spinlock_t send_lock;
 365         struct ehea_q_skb_arr rq1_skba;
 366         struct ehea_q_skb_arr rq2_skba;
 367         struct ehea_q_skb_arr rq3_skba;
 368         struct ehea_q_skb_arr sq_skba;
 369         spinlock_t netif_queue;
 370         int queue_stopped;
 371         int swqe_refill_th;
 372         atomic_t swqe_avail;
 373         int swqe_ll_count;
 374         int swqe_count;
 375         u32 swqe_id_counter;
 376         u64 tx_packets;
 377         struct tasklet_struct send_comp_task;
 378         spinlock_t recv_lock;
 379         struct port_state p_state;
 380         u64 rx_packets;
 381         u32 poll_counter;
 382 };
 383
 384
 385 struct ehea_adapter {
 386         u64 handle;
 387         u8 num_ports;
 388         struct ehea_port *port[16];
 389         struct ehea_eq *neq;       /* notification event queue */
 390         struct workqueue_struct *ehea_wq;
 391         struct tasklet_struct neq_tasklet;
 392         struct ehea_mr mr;
 393         u32 pd;                    /* protection domain */
 394         u64 max_mc_mac;            /* max number of multicast mac addresses */
 395 };
 396
 397
 398 struct ehea_mc_list {
 399         struct list_head list;
 400         u64 macaddr;
 401 };
 402
 403 #define EHEA_PORT_UP 1
 404 #define EHEA_PORT_DOWN 0
 405 #define EHEA_MAX_PORT_RES 16
 406 struct ehea_port {
 407         struct ehea_adapter *adapter;    /* adapter that owns this port */
 408         struct net_device *netdev;
 409         struct net_device_stats stats;
 410         struct ehea_port_res port_res[EHEA_MAX_PORT_RES];
 411         struct device_node *of_dev_node; /* Open Firmware Device Node */
 412         struct ehea_mc_list *mc_list;    /* Multicast MAC addresses */
 413         struct vlan_group *vgrp;
 414         struct ehea_eq *qp_eq;
 415         struct work_struct reset_task;
 416         struct semaphore port_lock;
 417         char int_aff_name[EHEA_IRQ_NAME_SIZE];
 418         int allmulti;                    /* Indicates IFF_ALLMULTI state */
 419         int promisc;                     /* Indicates IFF_PROMISC state */
 420         int num_add_tx_qps;
 421         int resets;
 422         u64 mac_addr;
 423         u32 logical_port_id;
 424         u32 port_speed;
 425         u32 msg_enable;
 426         u32 sig_comp_iv;
 427         u32 state;
 428         u8 full_duplex;
 429         u8 autoneg;
 430         u8 num_def_qps;
 431 };
 432
 433 struct port_res_cfg {
 434         int max_entries_rcq;
 435         int max_entries_scq;
 436         int max_entries_sq;
 437         int max_entries_rq1;
 438         int max_entries_rq2;
 439         int max_entries_rq3;
 440 };
 441
 442
 443 void ehea_set_ethtool_ops(struct net_device *netdev);
 444 int ehea_sense_port_attr(struct ehea_port *port);
 445 int ehea_set_portspeed(struct ehea_port *port, u32 port_speed);
 446
 447 #endif  /* __EHEA_H__ */