arch/blackfin/mach-bf518/boards/ezbrd.c

   1 /*
   2  * Copyright 2004-2009 Analog Devices Inc.
   3  *                2005 National ICT Australia (NICTA)
   4  *                      Aidan Williams <aidan@nicta.com.au>
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <linux/device.h>
  10 #include <linux/export.h>
  11 #include <linux/platform_device.h>
  12 #include <linux/mtd/mtd.h>
  13 #include <linux/mtd/partitions.h>
  14 #include <linux/mtd/physmap.h>
  15 #include <linux/spi/spi.h>
  16 #include <linux/spi/flash.h>
  17
  18 #include <linux/i2c.h>
  19 #include <linux/irq.h>
  20 #include <linux/interrupt.h>
  21 #include <asm/dma.h>
  22 #include <asm/bfin5xx_spi.h>
  23 #include <asm/reboot.h>
  24 #include <asm/portmux.h>
  25 #include <asm/dpmc.h>
  26 #include <asm/bfin_sdh.h>
  27 #include <linux/spi/ad7877.h>
  28 #include <net/dsa.h>
  29
  30 /*
  31  * Name the Board for the /proc/cpuinfo
  32  */
  33 const char bfin_board_name[] = "ADI BF518F-EZBRD";
  34
  35 /*
  36  *  Driver needs to know address, irq and flag pin.
  37  */
  38
  39 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  40 static struct mtd_partition ezbrd_partitions[] = {
  41         {
  42                 .name       = "bootloader(nor)",
  43                 .size       = 0x40000,
  44                 .offset     = 0,
  45         }, {
  46                 .name       = "linux kernel(nor)",
  47                 .size       = 0x1C0000,
  48                 .offset     = MTDPART_OFS_APPEND,
  49         }, {
  50                 .name       = "file system(nor)",
  51                 .size       = MTDPART_SIZ_FULL,
  52                 .offset     = MTDPART_OFS_APPEND,
  53         }
  54 };
  55
  56 static struct physmap_flash_data ezbrd_flash_data = {
  57         .width      = 2,
  58         .parts      = ezbrd_partitions,
  59         .nr_parts   = ARRAY_SIZE(ezbrd_partitions),
  60 };
  61
  62 static struct resource ezbrd_flash_resource = {
  63         .start = 0x20000000,
  64 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  65         .end   = 0x202fffff,
  66 #else
  67         .end   = 0x203fffff,
  68 #endif
  69         .flags = IORESOURCE_MEM,
  70 };
  71
  72 static struct platform_device ezbrd_flash_device = {
  73         .name          = "physmap-flash",
  74         .id            = 0,
  75         .dev = {
  76                 .platform_data = &ezbrd_flash_data,
  77         },
  78         .num_resources = 1,
  79         .resource      = &ezbrd_flash_resource,
  80 };
  81 #endif
  82
  83 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  84 static struct platform_device rtc_device = {
  85         .name = "rtc-bfin",
  86         .id   = -1,
  87 };
  88 #endif
  89
  90 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  91 #include <linux/bfin_mac.h>
  92 static const unsigned short bfin_mac_peripherals[] = {
  93         P_MII0_ETxD0,
  94         P_MII0_ETxD1,
  95         P_MII0_ETxEN,
  96         P_MII0_ERxD0,
  97         P_MII0_ERxD1,
  98         P_MII0_TxCLK,
  99         P_MII0_PHYINT,
 100         P_MII0_CRS,
 101         P_MII0_MDC,
 102         P_MII0_MDIO,
 103         0
 104 };
 105
 106 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
 107         {
 108 #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
 109                 .addr = 3,
 110 #else
 111                 .addr = 1,
 112 #endif
 113                 .irq = IRQ_MAC_PHYINT,
 114         },
 115 };
 116
 117 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
 118         .phydev_number = 1,
 119         .phydev_data = bfin_phydev_data,
 120         .phy_mode = PHY_INTERFACE_MODE_MII,
 121         .mac_peripherals = bfin_mac_peripherals,
 122 #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
 123         .phy_mask = 0xfff7, /* Only probe the port phy connect to the on chip MAC */
 124 #endif
 125 };
 126
 127 static struct platform_device bfin_mii_bus = {
 128         .name = "bfin_mii_bus",
 129         .dev = {
 130                 .platform_data = &bfin_mii_bus_data,
 131         }
 132 };
 133
 134 static struct platform_device bfin_mac_device = {
 135         .name = "bfin_mac",
 136         .dev = {
 137                 .platform_data = &bfin_mii_bus,
 138         }
 139 };
 140
 141 #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
 142 static struct dsa_chip_data ksz8893m_switch_chip_data = {
 143         .mii_bus = &bfin_mii_bus.dev,
 144         .port_names = {
 145                 NULL,
 146                 "eth%d",
 147                 "eth%d",
 148                 "cpu",
 149         },
 150 };
 151 static struct dsa_platform_data ksz8893m_switch_data = {
 152         .nr_chips = 1,
 153         .netdev = &bfin_mac_device.dev,
 154         .chip = &ksz8893m_switch_chip_data,
 155 };
 156
 157 static struct platform_device ksz8893m_switch_device = {
 158         .name           = "dsa",
 159         .id             = 0,
 160         .num_resources  = 0,
 161         .dev.platform_data = &ksz8893m_switch_data,
 162 };
 163 #endif
 164 #endif
 165
 166 #if defined(CONFIG_MTD_M25P80) \
 167         || defined(CONFIG_MTD_M25P80_MODULE)
 168 static struct mtd_partition bfin_spi_flash_partitions[] = {
 169         {
 170                 .name = "bootloader(spi)",
 171                 .size = 0x00040000,
 172                 .offset = 0,
 173                 .mask_flags = MTD_CAP_ROM
 174         }, {
 175                 .name = "linux kernel(spi)",
 176                 .size = MTDPART_SIZ_FULL,
 177                 .offset = MTDPART_OFS_APPEND,
 178         }
 179 };
 180
 181 static struct flash_platform_data bfin_spi_flash_data = {
 182         .name = "m25p80",
 183         .parts = bfin_spi_flash_partitions,
 184         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 185         .type = "m25p16",
 186 };
 187
 188 /* SPI flash chip (m25p64) */
 189 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 190         .enable_dma = 0,         /* use dma transfer with this chip*/
 191 };
 192 #endif
 193
 194 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 195 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
 196         .enable_dma = 0,
 197 };
 198 #endif
 199
 200 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 201 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
 202         .model                  = 7877,
 203         .vref_delay_usecs       = 50,   /* internal, no capacitor */
 204         .x_plate_ohms           = 419,
 205         .y_plate_ohms           = 486,
 206         .pressure_max           = 1000,
 207         .pressure_min           = 0,
 208         .stopacq_polarity       = 1,
 209         .first_conversion_delay = 3,
 210         .acquisition_time       = 1,
 211         .averaging              = 1,
 212         .pen_down_acc_interval  = 1,
 213 };
 214 #endif
 215
 216 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 217 #if defined(CONFIG_MTD_M25P80) \
 218         || defined(CONFIG_MTD_M25P80_MODULE)
 219         {
 220                 /* the modalias must be the same as spi device driver name */
 221                 .modalias = "m25p80", /* Name of spi_driver for this device */
 222                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 223                 .bus_num = 0, /* Framework bus number */
 224                 .chip_select = 2, /* On BF518F-EZBRD it's SPI0_SSEL2 */
 225                 .platform_data = &bfin_spi_flash_data,
 226                 .controller_data = &spi_flash_chip_info,
 227                 .mode = SPI_MODE_3,
 228         },
 229 #endif
 230
 231 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 232 #if defined(CONFIG_NET_DSA_KSZ8893M) \
 233         || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
 234         {
 235                 .modalias = "ksz8893m",
 236                 .max_speed_hz = 5000000,
 237                 .bus_num = 0,
 238                 .chip_select = 1,
 239                 .platform_data = NULL,
 240                 .mode = SPI_MODE_3,
 241         },
 242 #endif
 243 #endif
 244
 245 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 246         {
 247                 .modalias = "mmc_spi",
 248                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 249                 .bus_num = 0,
 250                 .chip_select = 5,
 251                 .controller_data = &mmc_spi_chip_info,
 252                 .mode = SPI_MODE_3,
 253         },
 254 #endif
 255 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 256         {
 257                 .modalias               = "ad7877",
 258                 .platform_data          = &bfin_ad7877_ts_info,
 259                 .irq                    = IRQ_PF8,
 260                 .max_speed_hz   = 12500000,     /* max spi clock (SCK) speed in HZ */
 261                 .bus_num        = 0,
 262                 .chip_select  = 2,
 263         },
 264 #endif
 265 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
 266          && defined(CONFIG_SND_SOC_WM8731_SPI)
 267         {
 268                 .modalias       = "wm8731",
 269                 .max_speed_hz   = 3125000,     /* max spi clock (SCK) speed in HZ */
 270                 .bus_num        = 0,
 271                 .chip_select    = 5,
 272                 .mode = SPI_MODE_0,
 273         },
 274 #endif
 275 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 276         {
 277                 .modalias = "spidev",
 278                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 279                 .bus_num = 0,
 280                 .chip_select = 1,
 281         },
 282 #endif
 283 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 284         {
 285                 .modalias = "bfin-lq035q1-spi",
 286                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
 287                 .bus_num = 0,
 288                 .chip_select = 1,
 289                 .mode = SPI_CPHA | SPI_CPOL,
 290         },
 291 #endif
 292 };
 293
 294 /* SPI controller data */
 295 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 296 /* SPI (0) */
 297 static struct bfin5xx_spi_master bfin_spi0_info = {
 298         .num_chipselect = 6,
 299         .enable_dma = 1,  /* master has the ability to do dma transfer */
 300         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 301 };
 302
 303 static struct resource bfin_spi0_resource[] = {
 304         [0] = {
 305                 .start = SPI0_REGBASE,
 306                 .end   = SPI0_REGBASE + 0xFF,
 307                 .flags = IORESOURCE_MEM,
 308                 },
 309         [1] = {
 310                 .start = CH_SPI0,
 311                 .end   = CH_SPI0,
 312                 .flags = IORESOURCE_DMA,
 313         },
 314         [2] = {
 315                 .start = IRQ_SPI0,
 316                 .end   = IRQ_SPI0,
 317                 .flags = IORESOURCE_IRQ,
 318         },
 319 };
 320
 321 static struct platform_device bfin_spi0_device = {
 322         .name = "bfin-spi",
 323         .id = 0, /* Bus number */
 324         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 325         .resource = bfin_spi0_resource,
 326         .dev = {
 327                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 328         },
 329 };
 330
 331 /* SPI (1) */
 332 static struct bfin5xx_spi_master bfin_spi1_info = {
 333         .num_chipselect = 6,
 334         .enable_dma = 1,  /* master has the ability to do dma transfer */
 335         .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
 336 };
 337
 338 static struct resource bfin_spi1_resource[] = {
 339         [0] = {
 340                 .start = SPI1_REGBASE,
 341                 .end   = SPI1_REGBASE + 0xFF,
 342                 .flags = IORESOURCE_MEM,
 343                 },
 344         [1] = {
 345                 .start = CH_SPI1,
 346                 .end   = CH_SPI1,
 347                 .flags = IORESOURCE_DMA,
 348         },
 349         [2] = {
 350                 .start = IRQ_SPI1,
 351                 .end   = IRQ_SPI1,
 352                 .flags = IORESOURCE_IRQ,
 353         },
 354 };
 355
 356 static struct platform_device bfin_spi1_device = {
 357         .name = "bfin-spi",
 358         .id = 1, /* Bus number */
 359         .num_resources = ARRAY_SIZE(bfin_spi1_resource),
 360         .resource = bfin_spi1_resource,
 361         .dev = {
 362                 .platform_data = &bfin_spi1_info, /* Passed to driver */
 363         },
 364 };
 365 #endif  /* spi master and devices */
 366
 367 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 368 #ifdef CONFIG_SERIAL_BFIN_UART0
 369 static struct resource bfin_uart0_resources[] = {
 370         {
 371                 .start = UART0_THR,
 372                 .end = UART0_GCTL+2,
 373                 .flags = IORESOURCE_MEM,
 374         },
 375         {
 376                 .start = IRQ_UART0_RX,
 377                 .end = IRQ_UART0_RX+1,
 378                 .flags = IORESOURCE_IRQ,
 379         },
 380         {
 381                 .start = IRQ_UART0_ERROR,
 382                 .end = IRQ_UART0_ERROR,
 383                 .flags = IORESOURCE_IRQ,
 384         },
 385         {
 386                 .start = CH_UART0_TX,
 387                 .end = CH_UART0_TX,
 388                 .flags = IORESOURCE_DMA,
 389         },
 390         {
 391                 .start = CH_UART0_RX,
 392                 .end = CH_UART0_RX,
 393                 .flags = IORESOURCE_DMA,
 394         },
 395 };
 396
 397 static unsigned short bfin_uart0_peripherals[] = {
 398         P_UART0_TX, P_UART0_RX, 0
 399 };
 400
 401 static struct platform_device bfin_uart0_device = {
 402         .name = "bfin-uart",
 403         .id = 0,
 404         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 405         .resource = bfin_uart0_resources,
 406         .dev = {
 407                 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
 408         },
 409 };
 410 #endif
 411 #ifdef CONFIG_SERIAL_BFIN_UART1
 412 static struct resource bfin_uart1_resources[] = {
 413         {
 414                 .start = UART1_THR,
 415                 .end = UART1_GCTL+2,
 416                 .flags = IORESOURCE_MEM,
 417         },
 418         {
 419                 .start = IRQ_UART1_RX,
 420                 .end = IRQ_UART1_RX+1,
 421                 .flags = IORESOURCE_IRQ,
 422         },
 423         {
 424                 .start = IRQ_UART1_ERROR,
 425                 .end = IRQ_UART1_ERROR,
 426                 .flags = IORESOURCE_IRQ,
 427         },
 428         {
 429                 .start = CH_UART1_TX,
 430                 .end = CH_UART1_TX,
 431                 .flags = IORESOURCE_DMA,
 432         },
 433         {
 434                 .start = CH_UART1_RX,
 435                 .end = CH_UART1_RX,
 436                 .flags = IORESOURCE_DMA,
 437         },
 438 };
 439
 440 static unsigned short bfin_uart1_peripherals[] = {
 441         P_UART1_TX, P_UART1_RX, 0
 442 };
 443
 444 static struct platform_device bfin_uart1_device = {
 445         .name = "bfin-uart",
 446         .id = 1,
 447         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 448         .resource = bfin_uart1_resources,
 449         .dev = {
 450                 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
 451         },
 452 };
 453 #endif
 454 #endif
 455
 456 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 457 #ifdef CONFIG_BFIN_SIR0
 458 static struct resource bfin_sir0_resources[] = {
 459         {
 460                 .start = 0xFFC00400,
 461                 .end = 0xFFC004FF,
 462                 .flags = IORESOURCE_MEM,
 463         },
 464         {
 465                 .start = IRQ_UART0_RX,
 466                 .end = IRQ_UART0_RX+1,
 467                 .flags = IORESOURCE_IRQ,
 468         },
 469         {
 470                 .start = CH_UART0_RX,
 471                 .end = CH_UART0_RX+1,
 472                 .flags = IORESOURCE_DMA,
 473         },
 474 };
 475
 476 static struct platform_device bfin_sir0_device = {
 477         .name = "bfin_sir",
 478         .id = 0,
 479         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 480         .resource = bfin_sir0_resources,
 481 };
 482 #endif
 483 #ifdef CONFIG_BFIN_SIR1
 484 static struct resource bfin_sir1_resources[] = {
 485         {
 486                 .start = 0xFFC02000,
 487                 .end = 0xFFC020FF,
 488                 .flags = IORESOURCE_MEM,
 489         },
 490         {
 491                 .start = IRQ_UART1_RX,
 492                 .end = IRQ_UART1_RX+1,
 493                 .flags = IORESOURCE_IRQ,
 494         },
 495         {
 496                 .start = CH_UART1_RX,
 497                 .end = CH_UART1_RX+1,
 498                 .flags = IORESOURCE_DMA,
 499         },
 500 };
 501
 502 static struct platform_device bfin_sir1_device = {
 503         .name = "bfin_sir",
 504         .id = 1,
 505         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 506         .resource = bfin_sir1_resources,
 507 };
 508 #endif
 509 #endif
 510
 511 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
 512 static struct platform_device bfin_i2s = {
 513         .name = "bfin-i2s",
 514         .id = CONFIG_SND_BF5XX_SPORT_NUM,
 515         /* TODO: add platform data here */
 516 };
 517 #endif
 518
 519 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 520 static struct resource bfin_twi0_resource[] = {
 521         [0] = {
 522                 .start = TWI0_REGBASE,
 523                 .end   = TWI0_REGBASE,
 524                 .flags = IORESOURCE_MEM,
 525         },
 526         [1] = {
 527                 .start = IRQ_TWI,
 528                 .end   = IRQ_TWI,
 529                 .flags = IORESOURCE_IRQ,
 530         },
 531 };
 532
 533 static struct platform_device i2c_bfin_twi_device = {
 534         .name = "i2c-bfin-twi",
 535         .id = 0,
 536         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 537         .resource = bfin_twi0_resource,
 538 };
 539 #endif
 540
 541 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 542 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
 543         {
 544                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
 545         },
 546 #endif
 547 #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
 548         {
 549                 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
 550                 .irq = IRQ_PF8,
 551         },
 552 #endif
 553 #if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
 554         {
 555                 I2C_BOARD_INFO("ssm2602", 0x1b),
 556         },
 557 #endif
 558 };
 559
 560 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 561 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 562 static struct resource bfin_sport0_uart_resources[] = {
 563         {
 564                 .start = SPORT0_TCR1,
 565                 .end = SPORT0_MRCS3+4,
 566                 .flags = IORESOURCE_MEM,
 567         },
 568         {
 569                 .start = IRQ_SPORT0_RX,
 570                 .end = IRQ_SPORT0_RX+1,
 571                 .flags = IORESOURCE_IRQ,
 572         },
 573         {
 574                 .start = IRQ_SPORT0_ERROR,
 575                 .end = IRQ_SPORT0_ERROR,
 576                 .flags = IORESOURCE_IRQ,
 577         },
 578 };
 579
 580 static unsigned short bfin_sport0_peripherals[] = {
 581         P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
 582         P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
 583 };
 584
 585 static struct platform_device bfin_sport0_uart_device = {
 586         .name = "bfin-sport-uart",
 587         .id = 0,
 588         .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
 589         .resource = bfin_sport0_uart_resources,
 590         .dev = {
 591                 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
 592         },
 593 };
 594 #endif
 595 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 596 static struct resource bfin_sport1_uart_resources[] = {
 597         {
 598                 .start = SPORT1_TCR1,
 599                 .end = SPORT1_MRCS3+4,
 600                 .flags = IORESOURCE_MEM,
 601         },
 602         {
 603                 .start = IRQ_SPORT1_RX,
 604                 .end = IRQ_SPORT1_RX+1,
 605                 .flags = IORESOURCE_IRQ,
 606         },
 607         {
 608                 .start = IRQ_SPORT1_ERROR,
 609                 .end = IRQ_SPORT1_ERROR,
 610                 .flags = IORESOURCE_IRQ,
 611         },
 612 };
 613
 614 static unsigned short bfin_sport1_peripherals[] = {
 615         P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
 616         P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
 617 };
 618
 619 static struct platform_device bfin_sport1_uart_device = {
 620         .name = "bfin-sport-uart",
 621         .id = 1,
 622         .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
 623         .resource = bfin_sport1_uart_resources,
 624         .dev = {
 625                 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
 626         },
 627 };
 628 #endif
 629 #endif
 630
 631 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 632 #include <linux/input.h>
 633 #include <linux/gpio_keys.h>
 634
 635 static struct gpio_keys_button bfin_gpio_keys_table[] = {
 636         {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
 637         {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
 638 };
 639
 640 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
 641         .buttons        = bfin_gpio_keys_table,
 642         .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
 643 };
 644
 645 static struct platform_device bfin_device_gpiokeys = {
 646         .name      = "gpio-keys",
 647         .dev = {
 648                 .platform_data = &bfin_gpio_keys_data,
 649         },
 650 };
 651 #endif
 652
 653 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
 654
 655 static struct bfin_sd_host bfin_sdh_data = {
 656         .dma_chan = CH_RSI,
 657         .irq_int0 = IRQ_RSI_INT0,
 658         .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
 659 };
 660
 661 static struct platform_device bf51x_sdh_device = {
 662         .name = "bfin-sdh",
 663         .id = 0,
 664         .dev = {
 665                 .platform_data = &bfin_sdh_data,
 666         },
 667 };
 668 #endif
 669
 670 static const unsigned int cclk_vlev_datasheet[] =
 671 {
 672         VRPAIR(VLEV_100, 400000000),
 673         VRPAIR(VLEV_105, 426000000),
 674         VRPAIR(VLEV_110, 500000000),
 675         VRPAIR(VLEV_115, 533000000),
 676         VRPAIR(VLEV_120, 600000000),
 677 };
 678
 679 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 680         .tuple_tab = cclk_vlev_datasheet,
 681         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 682         .vr_settling_time = 25 /* us */,
 683 };
 684
 685 static struct platform_device bfin_dpmc = {
 686         .name = "bfin dpmc",
 687         .dev = {
 688                 .platform_data = &bfin_dmpc_vreg_data,
 689         },
 690 };
 691
 692 static struct platform_device *stamp_devices[] __initdata = {
 693
 694         &bfin_dpmc,
 695
 696 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 697         &rtc_device,
 698 #endif
 699
 700 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 701         &bfin_mii_bus,
 702         &bfin_mac_device,
 703 #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
 704         &ksz8893m_switch_device,
 705 #endif
 706 #endif
 707
 708 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 709         &bfin_spi0_device,
 710         &bfin_spi1_device,
 711 #endif
 712
 713 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 714 #ifdef CONFIG_SERIAL_BFIN_UART0
 715         &bfin_uart0_device,
 716 #endif
 717 #ifdef CONFIG_SERIAL_BFIN_UART1
 718         &bfin_uart1_device,
 719 #endif
 720 #endif
 721
 722 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 723 #ifdef CONFIG_BFIN_SIR0
 724         &bfin_sir0_device,
 725 #endif
 726 #ifdef CONFIG_BFIN_SIR1
 727         &bfin_sir1_device,
 728 #endif
 729 #endif
 730
 731 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 732         &i2c_bfin_twi_device,
 733 #endif
 734
 735 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
 736         &bfin_i2s,
 737 #endif
 738
 739 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 740 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 741         &bfin_sport0_uart_device,
 742 #endif
 743 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 744         &bfin_sport1_uart_device,
 745 #endif
 746 #endif
 747
 748 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 749         &bfin_device_gpiokeys,
 750 #endif
 751
 752 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
 753         &bf51x_sdh_device,
 754 #endif
 755
 756 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 757         &ezbrd_flash_device,
 758 #endif
 759 };
 760
 761 static int __init ezbrd_init(void)
 762 {
 763         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 764         i2c_register_board_info(0, bfin_i2c_board_info,
 765                                 ARRAY_SIZE(bfin_i2c_board_info));
 766         platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
 767         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 768         /* setup BF518-EZBRD GPIO pin PG11 to AMS2, PG15 to AMS3. */
 769         peripheral_request(P_AMS2, "ParaFlash");
 770 #if !defined(CONFIG_SPI_BFIN) && !defined(CONFIG_SPI_BFIN_MODULE)
 771         peripheral_request(P_AMS3, "ParaFlash");
 772 #endif
 773         return 0;
 774 }
 775
 776 arch_initcall(ezbrd_init);
 777
 778 static struct platform_device *ezbrd_early_devices[] __initdata = {
 779 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
 780 #ifdef CONFIG_SERIAL_BFIN_UART0
 781         &bfin_uart0_device,
 782 #endif
 783 #ifdef CONFIG_SERIAL_BFIN_UART1
 784         &bfin_uart1_device,
 785 #endif
 786 #endif
 787
 788 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
 789 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 790         &bfin_sport0_uart_device,
 791 #endif
 792 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 793         &bfin_sport1_uart_device,
 794 #endif
 795 #endif
 796 };
 797
 798 void __init native_machine_early_platform_add_devices(void)
 799 {
 800         printk(KERN_INFO "register early platform devices\n");
 801         early_platform_add_devices(ezbrd_early_devices,
 802                 ARRAY_SIZE(ezbrd_early_devices));
 803 }
 804
 805 void native_machine_restart(char *cmd)
 806 {
 807         /* workaround reboot hang when booting from SPI */
 808         if ((bfin_read_SYSCR() & 0x7) == 0x3)
 809                 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
 810 }
 811
 812 void bfin_get_ether_addr(char *addr)
 813 {
 814         /* the MAC is stored in OTP memory page 0xDF */
 815         u32 ret;
 816         u64 otp_mac;
 817         u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
 818
 819         ret = otp_read(0xDF, 0x00, &otp_mac);
 820         if (!(ret & 0x1)) {
 821                 char *otp_mac_p = (char *)&otp_mac;
 822                 for (ret = 0; ret < 6; ++ret)
 823                         addr[ret] = otp_mac_p[5 - ret];
 824         }
 825 }
 826 EXPORT_SYMBOL(bfin_get_ether_addr);