include: replace linux/module.h with "struct module" wherever possible
[linux-2.6/next.git] / drivers / hwmon / coretemp.c
blob59d83e83da7fe0b5de39f7ce6e001899babfb7be
1 /*
2 * coretemp.c - Linux kernel module for hardware monitoring
4 * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
6 * Inspired from many hwmon drivers
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301 USA.
23 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
25 #include <linux/module.h>
26 #include <linux/init.h>
27 #include <linux/slab.h>
28 #include <linux/jiffies.h>
29 #include <linux/hwmon.h>
30 #include <linux/sysfs.h>
31 #include <linux/hwmon-sysfs.h>
32 #include <linux/err.h>
33 #include <linux/mutex.h>
34 #include <linux/list.h>
35 #include <linux/platform_device.h>
36 #include <linux/cpu.h>
37 #include <linux/pci.h>
38 #include <linux/smp.h>
39 #include <asm/msr.h>
40 #include <asm/processor.h>
42 #define DRVNAME "coretemp"
44 #define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */
45 #define NUM_REAL_CORES 16 /* Number of Real cores per cpu */
46 #define CORETEMP_NAME_LENGTH 17 /* String Length of attrs */
47 #define MAX_CORE_ATTRS 4 /* Maximum no of basic attrs */
48 #define MAX_THRESH_ATTRS 3 /* Maximum no of Threshold attrs */
49 #define TOTAL_ATTRS (MAX_CORE_ATTRS + MAX_THRESH_ATTRS)
50 #define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO)
52 #ifdef CONFIG_SMP
53 #define TO_PHYS_ID(cpu) cpu_data(cpu).phys_proc_id
54 #define TO_CORE_ID(cpu) cpu_data(cpu).cpu_core_id
55 #define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO)
56 #define for_each_sibling(i, cpu) for_each_cpu(i, cpu_sibling_mask(cpu))
57 #else
58 #define TO_PHYS_ID(cpu) (cpu)
59 #define TO_CORE_ID(cpu) (cpu)
60 #define TO_ATTR_NO(cpu) (cpu)
61 #define for_each_sibling(i, cpu) for (i = 0; false; )
62 #endif
65 * Per-Core Temperature Data
66 * @last_updated: The time when the current temperature value was updated
67 * earlier (in jiffies).
68 * @cpu_core_id: The CPU Core from which temperature values should be read
69 * This value is passed as "id" field to rdmsr/wrmsr functions.
70 * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS,
71 * from where the temperature values should be read.
72 * @intrpt_reg: One of IA32_THERM_INTERRUPT or IA32_PACKAGE_THERM_INTERRUPT,
73 * from where the thresholds are read.
74 * @attr_size: Total number of pre-core attrs displayed in the sysfs.
75 * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data.
76 * Otherwise, temp_data holds coretemp data.
77 * @valid: If this is 1, the current temperature is valid.
79 struct temp_data {
80 int temp;
81 int ttarget;
82 int tmin;
83 int tjmax;
84 unsigned long last_updated;
85 unsigned int cpu;
86 u32 cpu_core_id;
87 u32 status_reg;
88 u32 intrpt_reg;
89 int attr_size;
90 bool is_pkg_data;
91 bool valid;
92 struct sensor_device_attribute sd_attrs[TOTAL_ATTRS];
93 char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH];
94 struct mutex update_lock;
97 /* Platform Data per Physical CPU */
98 struct platform_data {
99 struct device *hwmon_dev;
100 u16 phys_proc_id;
101 struct temp_data *core_data[MAX_CORE_DATA];
102 struct device_attribute name_attr;
105 struct pdev_entry {
106 struct list_head list;
107 struct platform_device *pdev;
108 u16 phys_proc_id;
111 static LIST_HEAD(pdev_list);
112 static DEFINE_MUTEX(pdev_list_mutex);
114 static ssize_t show_name(struct device *dev,
115 struct device_attribute *devattr, char *buf)
117 return sprintf(buf, "%s\n", DRVNAME);
120 static ssize_t show_label(struct device *dev,
121 struct device_attribute *devattr, char *buf)
123 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
124 struct platform_data *pdata = dev_get_drvdata(dev);
125 struct temp_data *tdata = pdata->core_data[attr->index];
127 if (tdata->is_pkg_data)
128 return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id);
130 return sprintf(buf, "Core %u\n", tdata->cpu_core_id);
133 static ssize_t show_crit_alarm(struct device *dev,
134 struct device_attribute *devattr, char *buf)
136 u32 eax, edx;
137 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
138 struct platform_data *pdata = dev_get_drvdata(dev);
139 struct temp_data *tdata = pdata->core_data[attr->index];
141 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
143 return sprintf(buf, "%d\n", (eax >> 5) & 1);
146 static ssize_t show_max_alarm(struct device *dev,
147 struct device_attribute *devattr, char *buf)
149 u32 eax, edx;
150 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
151 struct platform_data *pdata = dev_get_drvdata(dev);
152 struct temp_data *tdata = pdata->core_data[attr->index];
154 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
156 return sprintf(buf, "%d\n", !!(eax & THERM_STATUS_THRESHOLD1));
159 static ssize_t show_tjmax(struct device *dev,
160 struct device_attribute *devattr, char *buf)
162 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
163 struct platform_data *pdata = dev_get_drvdata(dev);
165 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax);
168 static ssize_t show_ttarget(struct device *dev,
169 struct device_attribute *devattr, char *buf)
171 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
172 struct platform_data *pdata = dev_get_drvdata(dev);
174 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget);
177 static ssize_t store_ttarget(struct device *dev,
178 struct device_attribute *devattr,
179 const char *buf, size_t count)
181 struct platform_data *pdata = dev_get_drvdata(dev);
182 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
183 struct temp_data *tdata = pdata->core_data[attr->index];
184 u32 eax, edx;
185 unsigned long val;
186 int diff;
188 if (strict_strtoul(buf, 10, &val))
189 return -EINVAL;
192 * THERM_MASK_THRESHOLD1 is 7 bits wide. Values are entered in terms
193 * of milli degree celsius. Hence don't accept val > (127 * 1000)
195 if (val > tdata->tjmax || val > 127000)
196 return -EINVAL;
198 diff = (tdata->tjmax - val) / 1000;
200 mutex_lock(&tdata->update_lock);
201 rdmsr_on_cpu(tdata->cpu, tdata->intrpt_reg, &eax, &edx);
202 eax = (eax & ~THERM_MASK_THRESHOLD1) |
203 (diff << THERM_SHIFT_THRESHOLD1);
204 wrmsr_on_cpu(tdata->cpu, tdata->intrpt_reg, eax, edx);
205 tdata->ttarget = val;
206 mutex_unlock(&tdata->update_lock);
208 return count;
211 static ssize_t show_tmin(struct device *dev,
212 struct device_attribute *devattr, char *buf)
214 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
215 struct platform_data *pdata = dev_get_drvdata(dev);
217 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tmin);
220 static ssize_t store_tmin(struct device *dev,
221 struct device_attribute *devattr,
222 const char *buf, size_t count)
224 struct platform_data *pdata = dev_get_drvdata(dev);
225 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
226 struct temp_data *tdata = pdata->core_data[attr->index];
227 u32 eax, edx;
228 unsigned long val;
229 int diff;
231 if (strict_strtoul(buf, 10, &val))
232 return -EINVAL;
235 * THERM_MASK_THRESHOLD0 is 7 bits wide. Values are entered in terms
236 * of milli degree celsius. Hence don't accept val > (127 * 1000)
238 if (val > tdata->tjmax || val > 127000)
239 return -EINVAL;
241 diff = (tdata->tjmax - val) / 1000;
243 mutex_lock(&tdata->update_lock);
244 rdmsr_on_cpu(tdata->cpu, tdata->intrpt_reg, &eax, &edx);
245 eax = (eax & ~THERM_MASK_THRESHOLD0) |
246 (diff << THERM_SHIFT_THRESHOLD0);
247 wrmsr_on_cpu(tdata->cpu, tdata->intrpt_reg, eax, edx);
248 tdata->tmin = val;
249 mutex_unlock(&tdata->update_lock);
251 return count;
254 static ssize_t show_temp(struct device *dev,
255 struct device_attribute *devattr, char *buf)
257 u32 eax, edx;
258 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
259 struct platform_data *pdata = dev_get_drvdata(dev);
260 struct temp_data *tdata = pdata->core_data[attr->index];
262 mutex_lock(&tdata->update_lock);
264 /* Check whether the time interval has elapsed */
265 if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) {
266 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
267 tdata->valid = 0;
268 /* Check whether the data is valid */
269 if (eax & 0x80000000) {
270 tdata->temp = tdata->tjmax -
271 ((eax >> 16) & 0x7f) * 1000;
272 tdata->valid = 1;
274 tdata->last_updated = jiffies;
277 mutex_unlock(&tdata->update_lock);
278 return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN;
281 static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
283 /* The 100C is default for both mobile and non mobile CPUs */
285 int tjmax = 100000;
286 int tjmax_ee = 85000;
287 int usemsr_ee = 1;
288 int err;
289 u32 eax, edx;
290 struct pci_dev *host_bridge;
292 /* Early chips have no MSR for TjMax */
294 if (c->x86_model == 0xf && c->x86_mask < 4)
295 usemsr_ee = 0;
297 /* Atom CPUs */
299 if (c->x86_model == 0x1c) {
300 usemsr_ee = 0;
302 host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
304 if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL
305 && (host_bridge->device == 0xa000 /* NM10 based nettop */
306 || host_bridge->device == 0xa010)) /* NM10 based netbook */
307 tjmax = 100000;
308 else
309 tjmax = 90000;
311 pci_dev_put(host_bridge);
314 if (c->x86_model > 0xe && usemsr_ee) {
315 u8 platform_id;
318 * Now we can detect the mobile CPU using Intel provided table
319 * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
320 * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU
322 err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx);
323 if (err) {
324 dev_warn(dev,
325 "Unable to access MSR 0x17, assuming desktop"
326 " CPU\n");
327 usemsr_ee = 0;
328 } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) {
330 * Trust bit 28 up to Penryn, I could not find any
331 * documentation on that; if you happen to know
332 * someone at Intel please ask
334 usemsr_ee = 0;
335 } else {
336 /* Platform ID bits 52:50 (EDX starts at bit 32) */
337 platform_id = (edx >> 18) & 0x7;
340 * Mobile Penryn CPU seems to be platform ID 7 or 5
341 * (guesswork)
343 if (c->x86_model == 0x17 &&
344 (platform_id == 5 || platform_id == 7)) {
346 * If MSR EE bit is set, set it to 90 degrees C,
347 * otherwise 105 degrees C
349 tjmax_ee = 90000;
350 tjmax = 105000;
355 if (usemsr_ee) {
356 err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx);
357 if (err) {
358 dev_warn(dev,
359 "Unable to access MSR 0xEE, for Tjmax, left"
360 " at default\n");
361 } else if (eax & 0x40000000) {
362 tjmax = tjmax_ee;
364 } else if (tjmax == 100000) {
366 * If we don't use msr EE it means we are desktop CPU
367 * (with exeception of Atom)
369 dev_warn(dev, "Using relative temperature scale!\n");
372 return tjmax;
375 static int get_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
377 /* The 100C is default for both mobile and non mobile CPUs */
378 int err;
379 u32 eax, edx;
380 u32 val;
383 * A new feature of current Intel(R) processors, the
384 * IA32_TEMPERATURE_TARGET contains the TjMax value
386 err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
387 if (err) {
388 dev_warn(dev, "Unable to read TjMax from CPU.\n");
389 } else {
390 val = (eax >> 16) & 0xff;
392 * If the TjMax is not plausible, an assumption
393 * will be used
395 if (val) {
396 dev_info(dev, "TjMax is %d C.\n", val);
397 return val * 1000;
402 * An assumption is made for early CPUs and unreadable MSR.
403 * NOTE: the calculated value may not be correct.
405 return adjust_tjmax(c, id, dev);
408 static void __devinit get_ucode_rev_on_cpu(void *edx)
410 u32 eax;
412 wrmsr(MSR_IA32_UCODE_REV, 0, 0);
413 sync_core();
414 rdmsr(MSR_IA32_UCODE_REV, eax, *(u32 *)edx);
417 static int get_pkg_tjmax(unsigned int cpu, struct device *dev)
419 int err;
420 u32 eax, edx, val;
422 err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
423 if (!err) {
424 val = (eax >> 16) & 0xff;
425 if (val)
426 return val * 1000;
428 dev_warn(dev, "Unable to read Pkg-TjMax from CPU:%u\n", cpu);
429 return 100000; /* Default TjMax: 100 degree celsius */
432 static int create_name_attr(struct platform_data *pdata, struct device *dev)
434 sysfs_attr_init(&pdata->name_attr.attr);
435 pdata->name_attr.attr.name = "name";
436 pdata->name_attr.attr.mode = S_IRUGO;
437 pdata->name_attr.show = show_name;
438 return device_create_file(dev, &pdata->name_attr);
441 static int create_core_attrs(struct temp_data *tdata, struct device *dev,
442 int attr_no)
444 int err, i;
445 static ssize_t (*rd_ptr[TOTAL_ATTRS]) (struct device *dev,
446 struct device_attribute *devattr, char *buf) = {
447 show_label, show_crit_alarm, show_temp, show_tjmax,
448 show_max_alarm, show_ttarget, show_tmin };
449 static ssize_t (*rw_ptr[TOTAL_ATTRS]) (struct device *dev,
450 struct device_attribute *devattr, const char *buf,
451 size_t count) = { NULL, NULL, NULL, NULL, NULL,
452 store_ttarget, store_tmin };
453 static const char *names[TOTAL_ATTRS] = {
454 "temp%d_label", "temp%d_crit_alarm",
455 "temp%d_input", "temp%d_crit",
456 "temp%d_max_alarm", "temp%d_max",
457 "temp%d_max_hyst" };
459 for (i = 0; i < tdata->attr_size; i++) {
460 snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, names[i],
461 attr_no);
462 sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr);
463 tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i];
464 tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO;
465 if (rw_ptr[i]) {
466 tdata->sd_attrs[i].dev_attr.attr.mode |= S_IWUSR;
467 tdata->sd_attrs[i].dev_attr.store = rw_ptr[i];
469 tdata->sd_attrs[i].dev_attr.show = rd_ptr[i];
470 tdata->sd_attrs[i].index = attr_no;
471 err = device_create_file(dev, &tdata->sd_attrs[i].dev_attr);
472 if (err)
473 goto exit_free;
475 return 0;
477 exit_free:
478 while (--i >= 0)
479 device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
480 return err;
484 static int __devinit chk_ucode_version(struct platform_device *pdev)
486 struct cpuinfo_x86 *c = &cpu_data(pdev->id);
487 int err;
488 u32 edx;
491 * Check if we have problem with errata AE18 of Core processors:
492 * Readings might stop update when processor visited too deep sleep,
493 * fixed for stepping D0 (6EC).
495 if (c->x86_model == 0xe && c->x86_mask < 0xc) {
496 /* check for microcode update */
497 err = smp_call_function_single(pdev->id, get_ucode_rev_on_cpu,
498 &edx, 1);
499 if (err) {
500 dev_err(&pdev->dev,
501 "Cannot determine microcode revision of "
502 "CPU#%u (%d)!\n", pdev->id, err);
503 return -ENODEV;
504 } else if (edx < 0x39) {
505 dev_err(&pdev->dev,
506 "Errata AE18 not fixed, update BIOS or "
507 "microcode of the CPU!\n");
508 return -ENODEV;
511 return 0;
514 static struct platform_device *coretemp_get_pdev(unsigned int cpu)
516 u16 phys_proc_id = TO_PHYS_ID(cpu);
517 struct pdev_entry *p;
519 mutex_lock(&pdev_list_mutex);
521 list_for_each_entry(p, &pdev_list, list)
522 if (p->phys_proc_id == phys_proc_id) {
523 mutex_unlock(&pdev_list_mutex);
524 return p->pdev;
527 mutex_unlock(&pdev_list_mutex);
528 return NULL;
531 static struct temp_data *init_temp_data(unsigned int cpu, int pkg_flag)
533 struct temp_data *tdata;
535 tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL);
536 if (!tdata)
537 return NULL;
539 tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS :
540 MSR_IA32_THERM_STATUS;
541 tdata->intrpt_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_INTERRUPT :
542 MSR_IA32_THERM_INTERRUPT;
543 tdata->is_pkg_data = pkg_flag;
544 tdata->cpu = cpu;
545 tdata->cpu_core_id = TO_CORE_ID(cpu);
546 tdata->attr_size = MAX_CORE_ATTRS;
547 mutex_init(&tdata->update_lock);
548 return tdata;
551 static int create_core_data(struct platform_data *pdata,
552 struct platform_device *pdev,
553 unsigned int cpu, int pkg_flag)
555 struct temp_data *tdata;
556 struct cpuinfo_x86 *c = &cpu_data(cpu);
557 u32 eax, edx;
558 int err, attr_no;
561 * Find attr number for sysfs:
562 * We map the attr number to core id of the CPU
563 * The attr number is always core id + 2
564 * The Pkgtemp will always show up as temp1_*, if available
566 attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu);
568 if (attr_no > MAX_CORE_DATA - 1)
569 return -ERANGE;
572 * Provide a single set of attributes for all HT siblings of a core
573 * to avoid duplicate sensors (the processor ID and core ID of all
574 * HT siblings of a core are the same).
575 * Skip if a HT sibling of this core is already registered.
576 * This is not an error.
578 if (pdata->core_data[attr_no] != NULL)
579 return 0;
581 tdata = init_temp_data(cpu, pkg_flag);
582 if (!tdata)
583 return -ENOMEM;
585 /* Test if we can access the status register */
586 err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx);
587 if (err)
588 goto exit_free;
590 /* We can access status register. Get Critical Temperature */
591 if (pkg_flag)
592 tdata->tjmax = get_pkg_tjmax(pdev->id, &pdev->dev);
593 else
594 tdata->tjmax = get_tjmax(c, cpu, &pdev->dev);
597 * Test if we can access the intrpt register. If so, increase the
598 * 'size' enough to have ttarget/tmin/max_alarm interfaces.
599 * Initialize ttarget with bits 16:22 of MSR_IA32_THERM_INTERRUPT
601 err = rdmsr_safe_on_cpu(cpu, tdata->intrpt_reg, &eax, &edx);
602 if (!err) {
603 tdata->attr_size += MAX_THRESH_ATTRS;
604 tdata->ttarget = tdata->tjmax - ((eax >> 16) & 0x7f) * 1000;
607 pdata->core_data[attr_no] = tdata;
609 /* Create sysfs interfaces */
610 err = create_core_attrs(tdata, &pdev->dev, attr_no);
611 if (err)
612 goto exit_free;
614 return 0;
615 exit_free:
616 kfree(tdata);
617 return err;
620 static void coretemp_add_core(unsigned int cpu, int pkg_flag)
622 struct platform_data *pdata;
623 struct platform_device *pdev = coretemp_get_pdev(cpu);
624 int err;
626 if (!pdev)
627 return;
629 pdata = platform_get_drvdata(pdev);
631 err = create_core_data(pdata, pdev, cpu, pkg_flag);
632 if (err)
633 dev_err(&pdev->dev, "Adding Core %u failed\n", cpu);
636 static void coretemp_remove_core(struct platform_data *pdata,
637 struct device *dev, int indx)
639 int i;
640 struct temp_data *tdata = pdata->core_data[indx];
642 /* Remove the sysfs attributes */
643 for (i = 0; i < tdata->attr_size; i++)
644 device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
646 kfree(pdata->core_data[indx]);
647 pdata->core_data[indx] = NULL;
650 static int __devinit coretemp_probe(struct platform_device *pdev)
652 struct platform_data *pdata;
653 int err;
655 /* Check the microcode version of the CPU */
656 err = chk_ucode_version(pdev);
657 if (err)
658 return err;
660 /* Initialize the per-package data structures */
661 pdata = kzalloc(sizeof(struct platform_data), GFP_KERNEL);
662 if (!pdata)
663 return -ENOMEM;
665 err = create_name_attr(pdata, &pdev->dev);
666 if (err)
667 goto exit_free;
669 pdata->phys_proc_id = TO_PHYS_ID(pdev->id);
670 platform_set_drvdata(pdev, pdata);
672 pdata->hwmon_dev = hwmon_device_register(&pdev->dev);
673 if (IS_ERR(pdata->hwmon_dev)) {
674 err = PTR_ERR(pdata->hwmon_dev);
675 dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
676 goto exit_name;
678 return 0;
680 exit_name:
681 device_remove_file(&pdev->dev, &pdata->name_attr);
682 platform_set_drvdata(pdev, NULL);
683 exit_free:
684 kfree(pdata);
685 return err;
688 static int __devexit coretemp_remove(struct platform_device *pdev)
690 struct platform_data *pdata = platform_get_drvdata(pdev);
691 int i;
693 for (i = MAX_CORE_DATA - 1; i >= 0; --i)
694 if (pdata->core_data[i])
695 coretemp_remove_core(pdata, &pdev->dev, i);
697 device_remove_file(&pdev->dev, &pdata->name_attr);
698 hwmon_device_unregister(pdata->hwmon_dev);
699 platform_set_drvdata(pdev, NULL);
700 kfree(pdata);
701 return 0;
704 static struct platform_driver coretemp_driver = {
705 .driver = {
706 .owner = THIS_MODULE,
707 .name = DRVNAME,
709 .probe = coretemp_probe,
710 .remove = __devexit_p(coretemp_remove),
713 static int __cpuinit coretemp_device_add(unsigned int cpu)
715 int err;
716 struct platform_device *pdev;
717 struct pdev_entry *pdev_entry;
719 mutex_lock(&pdev_list_mutex);
721 pdev = platform_device_alloc(DRVNAME, cpu);
722 if (!pdev) {
723 err = -ENOMEM;
724 pr_err("Device allocation failed\n");
725 goto exit;
728 pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL);
729 if (!pdev_entry) {
730 err = -ENOMEM;
731 goto exit_device_put;
734 err = platform_device_add(pdev);
735 if (err) {
736 pr_err("Device addition failed (%d)\n", err);
737 goto exit_device_free;
740 pdev_entry->pdev = pdev;
741 pdev_entry->phys_proc_id = TO_PHYS_ID(cpu);
743 list_add_tail(&pdev_entry->list, &pdev_list);
744 mutex_unlock(&pdev_list_mutex);
746 return 0;
748 exit_device_free:
749 kfree(pdev_entry);
750 exit_device_put:
751 platform_device_put(pdev);
752 exit:
753 mutex_unlock(&pdev_list_mutex);
754 return err;
757 static void coretemp_device_remove(unsigned int cpu)
759 struct pdev_entry *p, *n;
760 u16 phys_proc_id = TO_PHYS_ID(cpu);
762 mutex_lock(&pdev_list_mutex);
763 list_for_each_entry_safe(p, n, &pdev_list, list) {
764 if (p->phys_proc_id != phys_proc_id)
765 continue;
766 platform_device_unregister(p->pdev);
767 list_del(&p->list);
768 kfree(p);
770 mutex_unlock(&pdev_list_mutex);
773 static bool is_any_core_online(struct platform_data *pdata)
775 int i;
777 /* Find online cores, except pkgtemp data */
778 for (i = MAX_CORE_DATA - 1; i >= 0; --i) {
779 if (pdata->core_data[i] &&
780 !pdata->core_data[i]->is_pkg_data) {
781 return true;
784 return false;
787 static void __cpuinit get_core_online(unsigned int cpu)
789 struct cpuinfo_x86 *c = &cpu_data(cpu);
790 struct platform_device *pdev = coretemp_get_pdev(cpu);
791 int err;
794 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
795 * sensors. We check this bit only, all the early CPUs
796 * without thermal sensors will be filtered out.
798 if (!cpu_has(c, X86_FEATURE_DTS))
799 return;
801 if (!pdev) {
803 * Alright, we have DTS support.
804 * We are bringing the _first_ core in this pkg
805 * online. So, initialize per-pkg data structures and
806 * then bring this core online.
808 err = coretemp_device_add(cpu);
809 if (err)
810 return;
812 * Check whether pkgtemp support is available.
813 * If so, add interfaces for pkgtemp.
815 if (cpu_has(c, X86_FEATURE_PTS))
816 coretemp_add_core(cpu, 1);
819 * Physical CPU device already exists.
820 * So, just add interfaces for this core.
822 coretemp_add_core(cpu, 0);
825 static void __cpuinit put_core_offline(unsigned int cpu)
827 int i, indx;
828 struct platform_data *pdata;
829 struct platform_device *pdev = coretemp_get_pdev(cpu);
831 /* If the physical CPU device does not exist, just return */
832 if (!pdev)
833 return;
835 pdata = platform_get_drvdata(pdev);
837 indx = TO_ATTR_NO(cpu);
839 if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu)
840 coretemp_remove_core(pdata, &pdev->dev, indx);
843 * If a HT sibling of a core is taken offline, but another HT sibling
844 * of the same core is still online, register the alternate sibling.
845 * This ensures that exactly one set of attributes is provided as long
846 * as at least one HT sibling of a core is online.
848 for_each_sibling(i, cpu) {
849 if (i != cpu) {
850 get_core_online(i);
852 * Display temperature sensor data for one HT sibling
853 * per core only, so abort the loop after one such
854 * sibling has been found.
856 break;
860 * If all cores in this pkg are offline, remove the device.
861 * coretemp_device_remove calls unregister_platform_device,
862 * which in turn calls coretemp_remove. This removes the
863 * pkgtemp entry and does other clean ups.
865 if (!is_any_core_online(pdata))
866 coretemp_device_remove(cpu);
869 static int __cpuinit coretemp_cpu_callback(struct notifier_block *nfb,
870 unsigned long action, void *hcpu)
872 unsigned int cpu = (unsigned long) hcpu;
874 switch (action) {
875 case CPU_ONLINE:
876 case CPU_DOWN_FAILED:
877 get_core_online(cpu);
878 break;
879 case CPU_DOWN_PREPARE:
880 put_core_offline(cpu);
881 break;
883 return NOTIFY_OK;
886 static struct notifier_block coretemp_cpu_notifier __refdata = {
887 .notifier_call = coretemp_cpu_callback,
890 static int __init coretemp_init(void)
892 int i, err = -ENODEV;
894 /* quick check if we run Intel */
895 if (cpu_data(0).x86_vendor != X86_VENDOR_INTEL)
896 goto exit;
898 err = platform_driver_register(&coretemp_driver);
899 if (err)
900 goto exit;
902 for_each_online_cpu(i)
903 get_core_online(i);
905 #ifndef CONFIG_HOTPLUG_CPU
906 if (list_empty(&pdev_list)) {
907 err = -ENODEV;
908 goto exit_driver_unreg;
910 #endif
912 register_hotcpu_notifier(&coretemp_cpu_notifier);
913 return 0;
915 #ifndef CONFIG_HOTPLUG_CPU
916 exit_driver_unreg:
917 platform_driver_unregister(&coretemp_driver);
918 #endif
919 exit:
920 return err;
923 static void __exit coretemp_exit(void)
925 struct pdev_entry *p, *n;
927 unregister_hotcpu_notifier(&coretemp_cpu_notifier);
928 mutex_lock(&pdev_list_mutex);
929 list_for_each_entry_safe(p, n, &pdev_list, list) {
930 platform_device_unregister(p->pdev);
931 list_del(&p->list);
932 kfree(p);
934 mutex_unlock(&pdev_list_mutex);
935 platform_driver_unregister(&coretemp_driver);
938 MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>");
939 MODULE_DESCRIPTION("Intel Core temperature monitor");
940 MODULE_LICENSE("GPL");
942 module_init(coretemp_init)
943 module_exit(coretemp_exit)