drivers/mfd/wm8400-core.c

   1 /*
   2  * Core driver for WM8400.
   3  *
   4  * Copyright 2008 Wolfson Microelectronics PLC.
   5  *
   6  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of the
  11  * License, or (at your option) any later version.
  12  *
  13  */
  14
  15 #include <linux/bug.h>
  16 #include <linux/i2c.h>
  17 #include <linux/kernel.h>
  18 #include <linux/mfd/core.h>
  19 #include <linux/mfd/wm8400-private.h>
  20 #include <linux/mfd/wm8400-audio.h>
  21 #include <linux/slab.h>
  22 #include <linux/module.h>
  23
  24 static struct {
  25         u16  readable;    /* Mask of readable bits */
  26         u16  writable;    /* Mask of writable bits */
  27         u16  vol;         /* Mask of volatile bits */
  28         int  is_codec;    /* Register controlled by codec reset */
  29         u16  default_val; /* Value on reset */
  30 } reg_data[] = {
  31         { 0xFFFF, 0xFFFF, 0x0000, 0, 0x6172 }, /* R0 */
  32         { 0x7000, 0x0000, 0x8000, 0, 0x0000 }, /* R1 */
  33         { 0xFF17, 0xFF17, 0x0000, 0, 0x0000 }, /* R2 */
  34         { 0xEBF3, 0xEBF3, 0x0000, 1, 0x6000 }, /* R3 */
  35         { 0x3CF3, 0x3CF3, 0x0000, 1, 0x0000 }, /* R4  */
  36         { 0xF1F8, 0xF1F8, 0x0000, 1, 0x4050 }, /* R5  */
  37         { 0xFC1F, 0xFC1F, 0x0000, 1, 0x4000 }, /* R6  */
  38         { 0xDFDE, 0xDFDE, 0x0000, 1, 0x01C8 }, /* R7  */
  39         { 0xFCFC, 0xFCFC, 0x0000, 1, 0x0000 }, /* R8  */
  40         { 0xEFFF, 0xEFFF, 0x0000, 1, 0x0040 }, /* R9  */
  41         { 0xEFFF, 0xEFFF, 0x0000, 1, 0x0040 }, /* R10 */
  42         { 0x27F7, 0x27F7, 0x0000, 1, 0x0004 }, /* R11 */
  43         { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R12 */
  44         { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R13 */
  45         { 0x1FEF, 0x1FEF, 0x0000, 1, 0x0000 }, /* R14 */
  46         { 0x0163, 0x0163, 0x0000, 1, 0x0100 }, /* R15 */
  47         { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R16 */
  48         { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R17 */
  49         { 0x1FFF, 0x0FFF, 0x0000, 1, 0x0000 }, /* R18 */
  50         { 0xFFFF, 0xFFFF, 0x0000, 1, 0x1000 }, /* R19 */
  51         { 0xFFFF, 0xFFFF, 0x0000, 1, 0x1010 }, /* R20 */
  52         { 0xFFFF, 0xFFFF, 0x0000, 1, 0x1010 }, /* R21 */
  53         { 0x0FDD, 0x0FDD, 0x0000, 1, 0x8000 }, /* R22 */
  54         { 0x1FFF, 0x1FFF, 0x0000, 1, 0x0800 }, /* R23 */
  55         { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R24 */
  56         { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R25 */
  57         { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R26 */
  58         { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R27 */
  59         { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R28 */
  60         { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R29 */
  61         { 0x0000, 0x0077, 0x0000, 1, 0x0066 }, /* R30 */
  62         { 0x0000, 0x0033, 0x0000, 1, 0x0022 }, /* R31 */
  63         { 0x0000, 0x01FF, 0x0000, 1, 0x0079 }, /* R32 */
  64         { 0x0000, 0x01FF, 0x0000, 1, 0x0079 }, /* R33 */
  65         { 0x0000, 0x0003, 0x0000, 1, 0x0003 }, /* R34 */
  66         { 0x0000, 0x01FF, 0x0000, 1, 0x0003 }, /* R35 */
  67         { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R36 */
  68         { 0x0000, 0x003F, 0x0000, 1, 0x0100 }, /* R37 */
  69         { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R38 */
  70         { 0x0000, 0x000F, 0x0000, 0, 0x0000 }, /* R39 */
  71         { 0x0000, 0x00FF, 0x0000, 1, 0x0000 }, /* R40 */
  72         { 0x0000, 0x01B7, 0x0000, 1, 0x0000 }, /* R41 */
  73         { 0x0000, 0x01B7, 0x0000, 1, 0x0000 }, /* R42 */
  74         { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R43 */
  75         { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R44 */
  76         { 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R45 */
  77         { 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R46 */
  78         { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R47 */
  79         { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R48 */
  80         { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R49 */
  81         { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R50 */
  82         { 0x0000, 0x01B3, 0x0000, 1, 0x0180 }, /* R51 */
  83         { 0x0000, 0x0077, 0x0000, 1, 0x0000 }, /* R52 */
  84         { 0x0000, 0x0077, 0x0000, 1, 0x0000 }, /* R53 */
  85         { 0x0000, 0x00FF, 0x0000, 1, 0x0000 }, /* R54 */
  86         { 0x0000, 0x0001, 0x0000, 1, 0x0000 }, /* R55 */
  87         { 0x0000, 0x003F, 0x0000, 1, 0x0000 }, /* R56 */
  88         { 0x0000, 0x004F, 0x0000, 1, 0x0000 }, /* R57 */
  89         { 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R58 */
  90         { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R59 */
  91         { 0x1FFF, 0x1FFF, 0x0000, 1, 0x0000 }, /* R60 */
  92         { 0xFFFF, 0xFFFF, 0x0000, 1, 0x0000 }, /* R61 */
  93         { 0x03FF, 0x03FF, 0x0000, 1, 0x0000 }, /* R62 */
  94         { 0x007F, 0x007F, 0x0000, 1, 0x0000 }, /* R63 */
  95         { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R64 */
  96         { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R65 */
  97         { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R66 */
  98         { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R67 */
  99         { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R68 */
 100         { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R69 */
 101         { 0xFFFF, 0xFFFF, 0x0000, 0, 0x4400 }, /* R70 */
 102         { 0x23FF, 0x23FF, 0x0000, 0, 0x0000 }, /* R71 */
 103         { 0xFFFF, 0xFFFF, 0x0000, 0, 0x4400 }, /* R72 */
 104         { 0x23FF, 0x23FF, 0x0000, 0, 0x0000 }, /* R73 */
 105         { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R74 */
 106         { 0x000E, 0x000E, 0x0000, 0, 0x0008 }, /* R75 */
 107         { 0xE00F, 0xE00F, 0x0000, 0, 0x0000 }, /* R76 */
 108         { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R77 */
 109         { 0x03C0, 0x03C0, 0x0000, 0, 0x02C0 }, /* R78 */
 110         { 0xFFFF, 0x0000, 0xffff, 0, 0x0000 }, /* R79 */
 111         { 0xFFFF, 0xFFFF, 0x0000, 0, 0x0000 }, /* R80 */
 112         { 0xFFFF, 0x0000, 0xffff, 0, 0x0000 }, /* R81 */
 113         { 0x2BFF, 0x0000, 0xffff, 0, 0x0000 }, /* R82 */
 114         { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R83 */
 115         { 0x80FF, 0x80FF, 0x0000, 0, 0x00ff }, /* R84 */
 116 };
 117
 118 static int wm8400_read(struct wm8400 *wm8400, u8 reg, int num_regs, u16 *dest)
 119 {
 120         int i, ret = 0;
 121
 122         BUG_ON(reg + num_regs > ARRAY_SIZE(wm8400->reg_cache));
 123
 124         /* If there are any volatile reads then read back the entire block */
 125         for (i = reg; i < reg + num_regs; i++)
 126                 if (reg_data[i].vol) {
 127                         ret = wm8400->read_dev(wm8400->io_data, reg,
 128                                                num_regs, dest);
 129                         if (ret != 0)
 130                                 return ret;
 131                         for (i = 0; i < num_regs; i++)
 132                                 dest[i] = be16_to_cpu(dest[i]);
 133
 134                         return 0;
 135                 }
 136
 137         /* Otherwise use the cache */
 138         memcpy(dest, &wm8400->reg_cache[reg], num_regs * sizeof(u16));
 139
 140         return 0;
 141 }
 142
 143 static int wm8400_write(struct wm8400 *wm8400, u8 reg, int num_regs,
 144                         u16 *src)
 145 {
 146         int ret, i;
 147
 148         BUG_ON(reg + num_regs > ARRAY_SIZE(wm8400->reg_cache));
 149
 150         for (i = 0; i < num_regs; i++) {
 151                 BUG_ON(!reg_data[reg + i].writable);
 152                 wm8400->reg_cache[reg + i] = src[i];
 153                 src[i] = cpu_to_be16(src[i]);
 154         }
 155
 156         /* Do the actual I/O */
 157         ret = wm8400->write_dev(wm8400->io_data, reg, num_regs, src);
 158         if (ret != 0)
 159                 return -EIO;
 160
 161         return 0;
 162 }
 163
 164 /**
 165  * wm8400_reg_read - Single register read
 166  *
 167  * @wm8400: Pointer to wm8400 control structure
 168  * @reg:    Register to read
 169  *
 170  * @return  Read value
 171  */
 172 u16 wm8400_reg_read(struct wm8400 *wm8400, u8 reg)
 173 {
 174         u16 val;
 175
 176         mutex_lock(&wm8400->io_lock);
 177
 178         wm8400_read(wm8400, reg, 1, &val);
 179
 180         mutex_unlock(&wm8400->io_lock);
 181
 182         return val;
 183 }
 184 EXPORT_SYMBOL_GPL(wm8400_reg_read);
 185
 186 int wm8400_block_read(struct wm8400 *wm8400, u8 reg, int count, u16 *data)
 187 {
 188         int ret;
 189
 190         mutex_lock(&wm8400->io_lock);
 191
 192         ret = wm8400_read(wm8400, reg, count, data);
 193
 194         mutex_unlock(&wm8400->io_lock);
 195
 196         return ret;
 197 }
 198 EXPORT_SYMBOL_GPL(wm8400_block_read);
 199
 200 /**
 201  * wm8400_set_bits - Bitmask write
 202  *
 203  * @wm8400: Pointer to wm8400 control structure
 204  * @reg:    Register to access
 205  * @mask:   Mask of bits to change
 206  * @val:    Value to set for masked bits
 207  */
 208 int wm8400_set_bits(struct wm8400 *wm8400, u8 reg, u16 mask, u16 val)
 209 {
 210         u16 tmp;
 211         int ret;
 212
 213         mutex_lock(&wm8400->io_lock);
 214
 215         ret = wm8400_read(wm8400, reg, 1, &tmp);
 216         tmp = (tmp & ~mask) | val;
 217         if (ret == 0)
 218                 ret = wm8400_write(wm8400, reg, 1, &tmp);
 219
 220         mutex_unlock(&wm8400->io_lock);
 221
 222         return ret;
 223 }
 224 EXPORT_SYMBOL_GPL(wm8400_set_bits);
 225
 226 /**
 227  * wm8400_reset_codec_reg_cache - Reset cached codec registers to
 228  * their default values.
 229  */
 230 void wm8400_reset_codec_reg_cache(struct wm8400 *wm8400)
 231 {
 232         int i;
 233
 234         mutex_lock(&wm8400->io_lock);
 235
 236         /* Reset all codec registers to their initial value */
 237         for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++)
 238                 if (reg_data[i].is_codec)
 239                         wm8400->reg_cache[i] = reg_data[i].default_val;
 240
 241         mutex_unlock(&wm8400->io_lock);
 242 }
 243 EXPORT_SYMBOL_GPL(wm8400_reset_codec_reg_cache);
 244
 245 static int wm8400_register_codec(struct wm8400 *wm8400)
 246 {
 247         struct mfd_cell cell = {
 248                 .name = "wm8400-codec",
 249                 .platform_data = wm8400,
 250                 .pdata_size = sizeof(*wm8400),
 251         };
 252
 253         return mfd_add_devices(wm8400->dev, -1, &cell, 1, NULL, 0);
 254 }
 255
 256 /*
 257  * wm8400_init - Generic initialisation
 258  *
 259  * The WM8400 can be configured as either an I2C or SPI device.  Probe
 260  * functions for each bus set up the accessors then call into this to
 261  * set up the device itself.
 262  */
 263 static int wm8400_init(struct wm8400 *wm8400,
 264                        struct wm8400_platform_data *pdata)
 265 {
 266         u16 reg;
 267         int ret, i;
 268
 269         mutex_init(&wm8400->io_lock);
 270
 271         dev_set_drvdata(wm8400->dev, wm8400);
 272
 273         /* Check that this is actually a WM8400 */
 274         ret = wm8400->read_dev(wm8400->io_data, WM8400_RESET_ID, 1, &reg);
 275         if (ret != 0) {
 276                 dev_err(wm8400->dev, "Chip ID register read failed\n");
 277                 return -EIO;
 278         }
 279         if (be16_to_cpu(reg) != reg_data[WM8400_RESET_ID].default_val) {
 280                 dev_err(wm8400->dev, "Device is not a WM8400, ID is %x\n",
 281                         be16_to_cpu(reg));
 282                 return -ENODEV;
 283         }
 284
 285         /* We don't know what state the hardware is in and since this
 286          * is a PMIC we can't reset it safely so initialise the register
 287          * cache from the hardware.
 288          */
 289         ret = wm8400->read_dev(wm8400->io_data, 0,
 290                                ARRAY_SIZE(wm8400->reg_cache),
 291                                wm8400->reg_cache);
 292         if (ret != 0) {
 293                 dev_err(wm8400->dev, "Register cache read failed\n");
 294                 return -EIO;
 295         }
 296         for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++)
 297                 wm8400->reg_cache[i] = be16_to_cpu(wm8400->reg_cache[i]);
 298
 299         /* If the codec is in reset use hard coded values */
 300         if (!(wm8400->reg_cache[WM8400_POWER_MANAGEMENT_1] & WM8400_CODEC_ENA))
 301                 for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++)
 302                         if (reg_data[i].is_codec)
 303                                 wm8400->reg_cache[i] = reg_data[i].default_val;
 304
 305         ret = wm8400_read(wm8400, WM8400_ID, 1, &reg);
 306         if (ret != 0) {
 307                 dev_err(wm8400->dev, "ID register read failed: %d\n", ret);
 308                 return ret;
 309         }
 310         reg = (reg & WM8400_CHIP_REV_MASK) >> WM8400_CHIP_REV_SHIFT;
 311         dev_info(wm8400->dev, "WM8400 revision %x\n", reg);
 312
 313         ret = wm8400_register_codec(wm8400);
 314         if (ret != 0) {
 315                 dev_err(wm8400->dev, "Failed to register codec\n");
 316                 goto err_children;
 317         }
 318
 319         if (pdata && pdata->platform_init) {
 320                 ret = pdata->platform_init(wm8400->dev);
 321                 if (ret != 0) {
 322                         dev_err(wm8400->dev, "Platform init failed: %d\n",
 323                                 ret);
 324                         goto err_children;
 325                 }
 326         } else
 327                 dev_warn(wm8400->dev, "No platform initialisation supplied\n");
 328
 329         return 0;
 330
 331 err_children:
 332         mfd_remove_devices(wm8400->dev);
 333         return ret;
 334 }
 335
 336 static void wm8400_release(struct wm8400 *wm8400)
 337 {
 338         mfd_remove_devices(wm8400->dev);
 339 }
 340
 341 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
 342 static int wm8400_i2c_read(void *io_data, char reg, int count, u16 *dest)
 343 {
 344         struct i2c_client *i2c = io_data;
 345         struct i2c_msg xfer[2];
 346         int ret;
 347
 348         /* Write register */
 349         xfer[0].addr = i2c->addr;
 350         xfer[0].flags = 0;
 351         xfer[0].len = 1;
 352         xfer[0].buf = &reg;
 353
 354         /* Read data */
 355         xfer[1].addr = i2c->addr;
 356         xfer[1].flags = I2C_M_RD;
 357         xfer[1].len = count * sizeof(u16);
 358         xfer[1].buf = (u8 *)dest;
 359
 360         ret = i2c_transfer(i2c->adapter, xfer, 2);
 361         if (ret == 2)
 362                 ret = 0;
 363         else if (ret >= 0)
 364                 ret = -EIO;
 365
 366         return ret;
 367 }
 368
 369 static int wm8400_i2c_write(void *io_data, char reg, int count, const u16 *src)
 370 {
 371         struct i2c_client *i2c = io_data;
 372         u8 *msg;
 373         int ret;
 374
 375         /* We add 1 byte for device register - ideally I2C would gather. */
 376         msg = kmalloc((count * sizeof(u16)) + 1, GFP_KERNEL);
 377         if (msg == NULL)
 378                 return -ENOMEM;
 379
 380         msg[0] = reg;
 381         memcpy(&msg[1], src, count * sizeof(u16));
 382
 383         ret = i2c_master_send(i2c, msg, (count * sizeof(u16)) + 1);
 384
 385         if (ret == (count * 2) + 1)
 386                 ret = 0;
 387         else if (ret >= 0)
 388                 ret = -EIO;
 389
 390         kfree(msg);
 391
 392         return ret;
 393 }
 394
 395 static int wm8400_i2c_probe(struct i2c_client *i2c,
 396                             const struct i2c_device_id *id)
 397 {
 398         struct wm8400 *wm8400;
 399         int ret;
 400
 401         wm8400 = kzalloc(sizeof(struct wm8400), GFP_KERNEL);
 402         if (wm8400 == NULL) {
 403                 ret = -ENOMEM;
 404                 goto err;
 405         }
 406
 407         wm8400->io_data = i2c;
 408         wm8400->read_dev = wm8400_i2c_read;
 409         wm8400->write_dev = wm8400_i2c_write;
 410         wm8400->dev = &i2c->dev;
 411         i2c_set_clientdata(i2c, wm8400);
 412
 413         ret = wm8400_init(wm8400, i2c->dev.platform_data);
 414         if (ret != 0)
 415                 goto struct_err;
 416
 417         return 0;
 418
 419 struct_err:
 420         kfree(wm8400);
 421 err:
 422         return ret;
 423 }
 424
 425 static int wm8400_i2c_remove(struct i2c_client *i2c)
 426 {
 427         struct wm8400 *wm8400 = i2c_get_clientdata(i2c);
 428
 429         wm8400_release(wm8400);
 430         kfree(wm8400);
 431
 432         return 0;
 433 }
 434
 435 static const struct i2c_device_id wm8400_i2c_id[] = {
 436        { "wm8400", 0 },
 437        { }
 438 };
 439 MODULE_DEVICE_TABLE(i2c, wm8400_i2c_id);
 440
 441 static struct i2c_driver wm8400_i2c_driver = {
 442         .driver = {
 443                 .name = "WM8400",
 444                 .owner = THIS_MODULE,
 445         },
 446         .probe    = wm8400_i2c_probe,
 447         .remove   = wm8400_i2c_remove,
 448         .id_table = wm8400_i2c_id,
 449 };
 450 #endif
 451
 452 static int __init wm8400_module_init(void)
 453 {
 454         int ret = -ENODEV;
 455
 456 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
 457         ret = i2c_add_driver(&wm8400_i2c_driver);
 458         if (ret != 0)
 459                 pr_err("Failed to register I2C driver: %d\n", ret);
 460 #endif
 461
 462         return ret;
 463 }
 464 subsys_initcall(wm8400_module_init);
 465
 466 static void __exit wm8400_module_exit(void)
 467 {
 468 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
 469         i2c_del_driver(&wm8400_i2c_driver);
 470 #endif
 471 }
 472 module_exit(wm8400_module_exit);
 473
 474 MODULE_LICENSE("GPL");
 475 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");