2 * Freescale eSDHC controller driver.
4 * Copyright (c) 2007 Freescale Semiconductor, Inc.
5 * Copyright (c) 2009 MontaVista Software, Inc.
7 * Authors: Xiaobo Xie <X.Xie@freescale.com>
8 * Anton Vorontsov <avorontsov@ru.mvista.com>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or (at
13 * your option) any later version.
17 #include <linux/delay.h>
18 #include <linux/module.h>
19 #include <linux/mmc/host.h>
20 #include "sdhci-pltfm.h"
21 #include "sdhci-esdhc.h"
23 static u16
esdhc_readw(struct sdhci_host
*host
, int reg
)
27 if (unlikely(reg
== SDHCI_HOST_VERSION
))
28 ret
= in_be16(host
->ioaddr
+ reg
);
30 ret
= sdhci_be32bs_readw(host
, reg
);
34 static void esdhc_writew(struct sdhci_host
*host
, u16 val
, int reg
)
36 if (reg
== SDHCI_BLOCK_SIZE
) {
38 * Two last DMA bits are reserved, and first one is used for
39 * non-standard blksz of 4096 bytes that we don't support
40 * yet. So clear the DMA boundary bits.
42 val
&= ~SDHCI_MAKE_BLKSZ(0x7, 0);
44 sdhci_be32bs_writew(host
, val
, reg
);
47 static void esdhc_writeb(struct sdhci_host
*host
, u8 val
, int reg
)
49 /* Prevent SDHCI core from writing reserved bits (e.g. HISPD). */
50 if (reg
== SDHCI_HOST_CONTROL
)
51 val
&= ~ESDHC_HOST_CONTROL_RES
;
52 sdhci_be32bs_writeb(host
, val
, reg
);
55 static int esdhc_of_enable_dma(struct sdhci_host
*host
)
57 setbits32(host
->ioaddr
+ ESDHC_DMA_SYSCTL
, ESDHC_DMA_SNOOP
);
61 static unsigned int esdhc_of_get_max_clock(struct sdhci_host
*host
)
63 struct sdhci_pltfm_host
*pltfm_host
= sdhci_priv(host
);
65 return pltfm_host
->clock
;
68 static unsigned int esdhc_of_get_min_clock(struct sdhci_host
*host
)
70 struct sdhci_pltfm_host
*pltfm_host
= sdhci_priv(host
);
72 return pltfm_host
->clock
/ 256 / 16;
75 static struct sdhci_ops sdhci_esdhc_ops
= {
76 .read_l
= sdhci_be32bs_readl
,
77 .read_w
= esdhc_readw
,
78 .read_b
= sdhci_be32bs_readb
,
79 .write_l
= sdhci_be32bs_writel
,
80 .write_w
= esdhc_writew
,
81 .write_b
= esdhc_writeb
,
82 .set_clock
= esdhc_set_clock
,
83 .enable_dma
= esdhc_of_enable_dma
,
84 .get_max_clock
= esdhc_of_get_max_clock
,
85 .get_min_clock
= esdhc_of_get_min_clock
,
88 static struct sdhci_pltfm_data sdhci_esdhc_pdata
= {
89 /* card detection could be handled via GPIO */
90 .quirks
= ESDHC_DEFAULT_QUIRKS
| SDHCI_QUIRK_BROKEN_CARD_DETECTION
91 | SDHCI_QUIRK_NO_CARD_NO_RESET
,
92 .ops
= &sdhci_esdhc_ops
,
95 static int __devinit
sdhci_esdhc_probe(struct platform_device
*pdev
)
97 return sdhci_pltfm_register(pdev
, &sdhci_esdhc_pdata
);
100 static int __devexit
sdhci_esdhc_remove(struct platform_device
*pdev
)
102 return sdhci_pltfm_unregister(pdev
);
105 static const struct of_device_id sdhci_esdhc_of_match
[] = {
106 { .compatible
= "fsl,mpc8379-esdhc" },
107 { .compatible
= "fsl,mpc8536-esdhc" },
108 { .compatible
= "fsl,esdhc" },
111 MODULE_DEVICE_TABLE(of
, sdhci_esdhc_of_match
);
113 static struct platform_driver sdhci_esdhc_driver
= {
115 .name
= "sdhci-esdhc",
116 .owner
= THIS_MODULE
,
117 .of_match_table
= sdhci_esdhc_of_match
,
119 .probe
= sdhci_esdhc_probe
,
120 .remove
= __devexit_p(sdhci_esdhc_remove
),
122 .suspend
= sdhci_pltfm_suspend
,
123 .resume
= sdhci_pltfm_resume
,
127 static int __init
sdhci_esdhc_init(void)
129 return platform_driver_register(&sdhci_esdhc_driver
);
131 module_init(sdhci_esdhc_init
);
133 static void __exit
sdhci_esdhc_exit(void)
135 platform_driver_unregister(&sdhci_esdhc_driver
);
137 module_exit(sdhci_esdhc_exit
);
139 MODULE_DESCRIPTION("SDHCI OF driver for Freescale MPC eSDHC");
140 MODULE_AUTHOR("Xiaobo Xie <X.Xie@freescale.com>, "
141 "Anton Vorontsov <avorontsov@ru.mvista.com>");
142 MODULE_LICENSE("GPL v2");