include: replace linux/module.h with "struct module" wherever possible
[linux-2.6/next.git] / drivers / net / can / sja1000 / sja1000_isa.c
blob496223e9e2fc469d14dffee5bd584951239cabe1
1 /*
2 * Copyright (C) 2009 Wolfgang Grandegger <wg@grandegger.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the version 2 of the GNU General Public License
6 * as published by the Free Software Foundation
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 #include <linux/kernel.h>
19 #include <linux/module.h>
20 #include <linux/isa.h>
21 #include <linux/interrupt.h>
22 #include <linux/netdevice.h>
23 #include <linux/delay.h>
24 #include <linux/irq.h>
25 #include <linux/io.h>
26 #include <linux/can/dev.h>
27 #include <linux/can/platform/sja1000.h>
29 #include "sja1000.h"
31 #define DRV_NAME "sja1000_isa"
33 #define MAXDEV 8
35 MODULE_AUTHOR("Wolfgang Grandegger <wg@grandegger.com>");
36 MODULE_DESCRIPTION("Socket-CAN driver for SJA1000 on the ISA bus");
37 MODULE_LICENSE("GPL v2");
39 #define CLK_DEFAULT 16000000 /* 16 MHz */
40 #define CDR_DEFAULT (CDR_CBP | CDR_CLK_OFF)
41 #define OCR_DEFAULT OCR_TX0_PUSHPULL
43 static unsigned long port[MAXDEV];
44 static unsigned long mem[MAXDEV];
45 static int __devinitdata irq[MAXDEV];
46 static int __devinitdata clk[MAXDEV];
47 static char __devinitdata cdr[MAXDEV] = {[0 ... (MAXDEV - 1)] = -1};
48 static char __devinitdata ocr[MAXDEV] = {[0 ... (MAXDEV - 1)] = -1};
49 static char __devinitdata indirect[MAXDEV] = {[0 ... (MAXDEV - 1)] = -1};
51 module_param_array(port, ulong, NULL, S_IRUGO);
52 MODULE_PARM_DESC(port, "I/O port number");
54 module_param_array(mem, ulong, NULL, S_IRUGO);
55 MODULE_PARM_DESC(mem, "I/O memory address");
57 module_param_array(indirect, byte, NULL, S_IRUGO);
58 MODULE_PARM_DESC(indirect, "Indirect access via address and data port");
60 module_param_array(irq, int, NULL, S_IRUGO);
61 MODULE_PARM_DESC(irq, "IRQ number");
63 module_param_array(clk, int, NULL, S_IRUGO);
64 MODULE_PARM_DESC(clk, "External oscillator clock frequency "
65 "(default=16000000 [16 MHz])");
67 module_param_array(cdr, byte, NULL, S_IRUGO);
68 MODULE_PARM_DESC(cdr, "Clock divider register "
69 "(default=0x48 [CDR_CBP | CDR_CLK_OFF])");
71 module_param_array(ocr, byte, NULL, S_IRUGO);
72 MODULE_PARM_DESC(ocr, "Output control register "
73 "(default=0x18 [OCR_TX0_PUSHPULL])");
75 #define SJA1000_IOSIZE 0x20
76 #define SJA1000_IOSIZE_INDIRECT 0x02
78 static u8 sja1000_isa_mem_read_reg(const struct sja1000_priv *priv, int reg)
80 return readb(priv->reg_base + reg);
83 static void sja1000_isa_mem_write_reg(const struct sja1000_priv *priv,
84 int reg, u8 val)
86 writeb(val, priv->reg_base + reg);
89 static u8 sja1000_isa_port_read_reg(const struct sja1000_priv *priv, int reg)
91 return inb((unsigned long)priv->reg_base + reg);
94 static void sja1000_isa_port_write_reg(const struct sja1000_priv *priv,
95 int reg, u8 val)
97 outb(val, (unsigned long)priv->reg_base + reg);
100 static u8 sja1000_isa_port_read_reg_indirect(const struct sja1000_priv *priv,
101 int reg)
103 unsigned long base = (unsigned long)priv->reg_base;
105 outb(reg, base);
106 return inb(base + 1);
109 static void sja1000_isa_port_write_reg_indirect(const struct sja1000_priv *priv,
110 int reg, u8 val)
112 unsigned long base = (unsigned long)priv->reg_base;
114 outb(reg, base);
115 outb(val, base + 1);
118 static int __devinit sja1000_isa_match(struct device *pdev, unsigned int idx)
120 if (port[idx] || mem[idx]) {
121 if (irq[idx])
122 return 1;
123 } else if (idx)
124 return 0;
126 dev_err(pdev, "insufficient parameters supplied\n");
127 return 0;
130 static int __devinit sja1000_isa_probe(struct device *pdev, unsigned int idx)
132 struct net_device *dev;
133 struct sja1000_priv *priv;
134 void __iomem *base = NULL;
135 int iosize = SJA1000_IOSIZE;
136 int err;
138 if (mem[idx]) {
139 if (!request_mem_region(mem[idx], iosize, DRV_NAME)) {
140 err = -EBUSY;
141 goto exit;
143 base = ioremap_nocache(mem[idx], iosize);
144 if (!base) {
145 err = -ENOMEM;
146 goto exit_release;
148 } else {
149 if (indirect[idx] > 0 ||
150 (indirect[idx] == -1 && indirect[0] > 0))
151 iosize = SJA1000_IOSIZE_INDIRECT;
152 if (!request_region(port[idx], iosize, DRV_NAME)) {
153 err = -EBUSY;
154 goto exit;
158 dev = alloc_sja1000dev(0);
159 if (!dev) {
160 err = -ENOMEM;
161 goto exit_unmap;
163 priv = netdev_priv(dev);
165 dev->irq = irq[idx];
166 priv->irq_flags = IRQF_SHARED;
167 if (mem[idx]) {
168 priv->reg_base = base;
169 dev->base_addr = mem[idx];
170 priv->read_reg = sja1000_isa_mem_read_reg;
171 priv->write_reg = sja1000_isa_mem_write_reg;
172 } else {
173 priv->reg_base = (void __iomem *)port[idx];
174 dev->base_addr = port[idx];
176 if (iosize == SJA1000_IOSIZE_INDIRECT) {
177 priv->read_reg = sja1000_isa_port_read_reg_indirect;
178 priv->write_reg = sja1000_isa_port_write_reg_indirect;
179 } else {
180 priv->read_reg = sja1000_isa_port_read_reg;
181 priv->write_reg = sja1000_isa_port_write_reg;
185 if (clk[idx])
186 priv->can.clock.freq = clk[idx] / 2;
187 else if (clk[0])
188 priv->can.clock.freq = clk[0] / 2;
189 else
190 priv->can.clock.freq = CLK_DEFAULT / 2;
192 if (ocr[idx] != -1)
193 priv->ocr = ocr[idx] & 0xff;
194 else if (ocr[0] != -1)
195 priv->ocr = ocr[0] & 0xff;
196 else
197 priv->ocr = OCR_DEFAULT;
199 if (cdr[idx] != -1)
200 priv->cdr = cdr[idx] & 0xff;
201 else if (cdr[0] != -1)
202 priv->cdr = cdr[0] & 0xff;
203 else
204 priv->cdr = CDR_DEFAULT;
206 dev_set_drvdata(pdev, dev);
207 SET_NETDEV_DEV(dev, pdev);
209 err = register_sja1000dev(dev);
210 if (err) {
211 dev_err(pdev, "registering %s failed (err=%d)\n",
212 DRV_NAME, err);
213 goto exit_unmap;
216 dev_info(pdev, "%s device registered (reg_base=0x%p, irq=%d)\n",
217 DRV_NAME, priv->reg_base, dev->irq);
218 return 0;
220 exit_unmap:
221 if (mem[idx])
222 iounmap(base);
223 exit_release:
224 if (mem[idx])
225 release_mem_region(mem[idx], iosize);
226 else
227 release_region(port[idx], iosize);
228 exit:
229 return err;
232 static int __devexit sja1000_isa_remove(struct device *pdev, unsigned int idx)
234 struct net_device *dev = dev_get_drvdata(pdev);
235 struct sja1000_priv *priv = netdev_priv(dev);
237 unregister_sja1000dev(dev);
238 dev_set_drvdata(pdev, NULL);
240 if (mem[idx]) {
241 iounmap(priv->reg_base);
242 release_mem_region(mem[idx], SJA1000_IOSIZE);
243 } else {
244 if (priv->read_reg == sja1000_isa_port_read_reg_indirect)
245 release_region(port[idx], SJA1000_IOSIZE_INDIRECT);
246 else
247 release_region(port[idx], SJA1000_IOSIZE);
249 free_sja1000dev(dev);
251 return 0;
254 static struct isa_driver sja1000_isa_driver = {
255 .match = sja1000_isa_match,
256 .probe = sja1000_isa_probe,
257 .remove = __devexit_p(sja1000_isa_remove),
258 .driver = {
259 .name = DRV_NAME,
263 static int __init sja1000_isa_init(void)
265 int err = isa_register_driver(&sja1000_isa_driver, MAXDEV);
267 if (!err)
268 printk(KERN_INFO
269 "Legacy %s driver for max. %d devices registered\n",
270 DRV_NAME, MAXDEV);
271 return err;
274 static void __exit sja1000_isa_exit(void)
276 isa_unregister_driver(&sja1000_isa_driver);
279 module_init(sja1000_isa_init);
280 module_exit(sja1000_isa_exit);