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include: replace linux/module.h with "struct module" wherever possible
[linux-2.6/next.git] / drivers / scsi / qla2xxx / qla_init.c
blobdef694271bf79bf96cb6190878434b902381fb79
1 /*
2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2011 QLogic Corporation
4 *
5 * See LICENSE.qla2xxx for copyright and licensing details.
6 */
7 #include "qla_def.h"
8 #include "qla_gbl.h"
9
10 #include <linux/delay.h>
11 #include <linux/slab.h>
12 #include <linux/vmalloc.h>
13
14 #include "qla_devtbl.h"
15
16 #ifdef CONFIG_SPARC
17 #include <asm/prom.h>
18 #endif
19
20 /*
21 * QLogic ISP2x00 Hardware Support Function Prototypes.
22 */
23 static int qla2x00_isp_firmware(scsi_qla_host_t *);
24 static int qla2x00_setup_chip(scsi_qla_host_t *);
25 static int qla2x00_init_rings(scsi_qla_host_t *);
26 static int qla2x00_fw_ready(scsi_qla_host_t *);
27 static int qla2x00_configure_hba(scsi_qla_host_t *);
28 static int qla2x00_configure_loop(scsi_qla_host_t *);
29 static int qla2x00_configure_local_loop(scsi_qla_host_t *);
30 static int qla2x00_configure_fabric(scsi_qla_host_t *);
31 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
32 static int qla2x00_device_resync(scsi_qla_host_t *);
33 static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
34 uint16_t *);
35
36 static int qla2x00_restart_isp(scsi_qla_host_t *);
37
38 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
39 static int qla84xx_init_chip(scsi_qla_host_t *);
40 static int qla25xx_init_queues(struct qla_hw_data *);
41
42 /* SRB Extensions ---------------------------------------------------------- */
43
44 static void
45 qla2x00_ctx_sp_timeout(unsigned long __data)
46 {
47 srb_t *sp = (srb_t *)__data;
48 struct srb_ctx *ctx;
49 struct srb_iocb *iocb;
50 fc_port_t *fcport = sp->fcport;
51 struct qla_hw_data *ha = fcport->vha->hw;
52 struct req_que *req;
53 unsigned long flags;
54
55 spin_lock_irqsave(&ha->hardware_lock, flags);
56 req = ha->req_q_map[0];
57 req->outstanding_cmds[sp->handle] = NULL;
58 ctx = sp->ctx;
59 iocb = ctx->u.iocb_cmd;
60 iocb->timeout(sp);
61 iocb->free(sp);
62 spin_unlock_irqrestore(&ha->hardware_lock, flags);
63 }
64
65 static void
66 qla2x00_ctx_sp_free(srb_t *sp)
67 {
68 struct srb_ctx *ctx = sp->ctx;
69 struct srb_iocb *iocb = ctx->u.iocb_cmd;
70 struct scsi_qla_host *vha = sp->fcport->vha;
71
72 del_timer(&iocb->timer);
73 kfree(iocb);
74 kfree(ctx);
75 mempool_free(sp, sp->fcport->vha->hw->srb_mempool);
76
77 QLA_VHA_MARK_NOT_BUSY(vha);
78 }
79
80 inline srb_t *
81 qla2x00_get_ctx_sp(scsi_qla_host_t *vha, fc_port_t *fcport, size_t size,
82 unsigned long tmo)
83 {
84 srb_t *sp = NULL;
85 struct qla_hw_data *ha = vha->hw;
86 struct srb_ctx *ctx;
87 struct srb_iocb *iocb;
88 uint8_t bail;
89
90 QLA_VHA_MARK_BUSY(vha, bail);
91 if (bail)
92 return NULL;
93
94 sp = mempool_alloc(ha->srb_mempool, GFP_KERNEL);
95 if (!sp)
96 goto done;
97 ctx = kzalloc(size, GFP_KERNEL);
98 if (!ctx) {
99 mempool_free(sp, ha->srb_mempool);
100 sp = NULL;
101 goto done;
102 }
103 iocb = kzalloc(sizeof(struct srb_iocb), GFP_KERNEL);
104 if (!iocb) {
105 mempool_free(sp, ha->srb_mempool);
106 sp = NULL;
107 kfree(ctx);
108 goto done;
109 }
110
111 memset(sp, 0, sizeof(*sp));
112 sp->fcport = fcport;
113 sp->ctx = ctx;
114 ctx->u.iocb_cmd = iocb;
115 iocb->free = qla2x00_ctx_sp_free;
116
117 init_timer(&iocb->timer);
118 if (!tmo)
119 goto done;
120 iocb->timer.expires = jiffies + tmo * HZ;
121 iocb->timer.data = (unsigned long)sp;
122 iocb->timer.function = qla2x00_ctx_sp_timeout;
123 add_timer(&iocb->timer);
124 done:
125 if (!sp)
126 QLA_VHA_MARK_NOT_BUSY(vha);
127 return sp;
128 }
129
130 /* Asynchronous Login/Logout Routines -------------------------------------- */
131
132 static inline unsigned long
133 qla2x00_get_async_timeout(struct scsi_qla_host *vha)
134 {
135 unsigned long tmo;
136 struct qla_hw_data *ha = vha->hw;
137
138 /* Firmware should use switch negotiated r_a_tov for timeout. */
139 tmo = ha->r_a_tov / 10 * 2;
140 if (!IS_FWI2_CAPABLE(ha)) {
141 /*
142 * Except for earlier ISPs where the timeout is seeded from the
143 * initialization control block.
144 */
145 tmo = ha->login_timeout;
146 }
147 return tmo;
148 }
149
150 static void
151 qla2x00_async_iocb_timeout(srb_t *sp)
152 {
153 fc_port_t *fcport = sp->fcport;
154 struct srb_ctx *ctx = sp->ctx;
155
156 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
157 "Async-%s timeout - portid=%02x%02x%02x.\n",
158 ctx->name, fcport->d_id.b.domain, fcport->d_id.b.area,
159 fcport->d_id.b.al_pa);
160
161 fcport->flags &= ~FCF_ASYNC_SENT;
162 if (ctx->type == SRB_LOGIN_CMD) {
163 struct srb_iocb *lio = ctx->u.iocb_cmd;
164 qla2x00_post_async_logout_work(fcport->vha, fcport, NULL);
165 /* Retry as needed. */
166 lio->u.logio.data[0] = MBS_COMMAND_ERROR;
167 lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
168 QLA_LOGIO_LOGIN_RETRIED : 0;
169 qla2x00_post_async_login_done_work(fcport->vha, fcport,
170 lio->u.logio.data);
171 }
172 }
173
174 static void
175 qla2x00_async_login_ctx_done(srb_t *sp)
176 {
177 struct srb_ctx *ctx = sp->ctx;
178 struct srb_iocb *lio = ctx->u.iocb_cmd;
179
180 qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport,
181 lio->u.logio.data);
182 lio->free(sp);
183 }
184
185 int
186 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
187 uint16_t *data)
188 {
189 srb_t *sp;
190 struct srb_ctx *ctx;
191 struct srb_iocb *lio;
192 int rval;
193
194 rval = QLA_FUNCTION_FAILED;
195 sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
196 qla2x00_get_async_timeout(vha) + 2);
197 if (!sp)
198 goto done;
199
200 ctx = sp->ctx;
201 ctx->type = SRB_LOGIN_CMD;
202 ctx->name = "login";
203 lio = ctx->u.iocb_cmd;
204 lio->timeout = qla2x00_async_iocb_timeout;
205 lio->done = qla2x00_async_login_ctx_done;
206 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
207 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
208 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
209 rval = qla2x00_start_sp(sp);
210 if (rval != QLA_SUCCESS)
211 goto done_free_sp;
212
213 ql_dbg(ql_dbg_disc, vha, 0x2072,
214 "Async-login - loopid=%x portid=%02x%02x%02x retries=%d.\n",
215 fcport->loop_id, fcport->d_id.b.domain, fcport->d_id.b.area,
216 fcport->d_id.b.al_pa, fcport->login_retry);
217 return rval;
218
219 done_free_sp:
220 lio->free(sp);
221 done:
222 return rval;
223 }
224
225 static void
226 qla2x00_async_logout_ctx_done(srb_t *sp)
227 {
228 struct srb_ctx *ctx = sp->ctx;
229 struct srb_iocb *lio = ctx->u.iocb_cmd;
230
231 qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport,
232 lio->u.logio.data);
233 lio->free(sp);
234 }
235
236 int
237 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
238 {
239 srb_t *sp;
240 struct srb_ctx *ctx;
241 struct srb_iocb *lio;
242 int rval;
243
244 rval = QLA_FUNCTION_FAILED;
245 sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
246 qla2x00_get_async_timeout(vha) + 2);
247 if (!sp)
248 goto done;
249
250 ctx = sp->ctx;
251 ctx->type = SRB_LOGOUT_CMD;
252 ctx->name = "logout";
253 lio = ctx->u.iocb_cmd;
254 lio->timeout = qla2x00_async_iocb_timeout;
255 lio->done = qla2x00_async_logout_ctx_done;
256 rval = qla2x00_start_sp(sp);
257 if (rval != QLA_SUCCESS)
258 goto done_free_sp;
259
260 ql_dbg(ql_dbg_disc, vha, 0x2070,
261 "Async-logout - loop-id=%x portid=%02x%02x%02x.\n",
262 fcport->loop_id, fcport->d_id.b.domain, fcport->d_id.b.area,
263 fcport->d_id.b.al_pa);
264 return rval;
265
266 done_free_sp:
267 lio->free(sp);
268 done:
269 return rval;
270 }
271
272 static void
273 qla2x00_async_adisc_ctx_done(srb_t *sp)
274 {
275 struct srb_ctx *ctx = sp->ctx;
276 struct srb_iocb *lio = ctx->u.iocb_cmd;
277
278 qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport,
279 lio->u.logio.data);
280 lio->free(sp);
281 }
282
283 int
284 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
285 uint16_t *data)
286 {
287 srb_t *sp;
288 struct srb_ctx *ctx;
289 struct srb_iocb *lio;
290 int rval;
291
292 rval = QLA_FUNCTION_FAILED;
293 sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
294 qla2x00_get_async_timeout(vha) + 2);
295 if (!sp)
296 goto done;
297
298 ctx = sp->ctx;
299 ctx->type = SRB_ADISC_CMD;
300 ctx->name = "adisc";
301 lio = ctx->u.iocb_cmd;
302 lio->timeout = qla2x00_async_iocb_timeout;
303 lio->done = qla2x00_async_adisc_ctx_done;
304 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
305 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
306 rval = qla2x00_start_sp(sp);
307 if (rval != QLA_SUCCESS)
308 goto done_free_sp;
309
310 ql_dbg(ql_dbg_disc, vha, 0x206f,
311 "Async-adisc - loopid=%x portid=%02x%02x%02x.\n",
312 fcport->loop_id, fcport->d_id.b.domain, fcport->d_id.b.area,
313 fcport->d_id.b.al_pa);
314 return rval;
315
316 done_free_sp:
317 lio->free(sp);
318 done:
319 return rval;
320 }
321
322 static void
323 qla2x00_async_tm_cmd_ctx_done(srb_t *sp)
324 {
325 struct srb_ctx *ctx = sp->ctx;
326 struct srb_iocb *iocb = (struct srb_iocb *)ctx->u.iocb_cmd;
327
328 qla2x00_async_tm_cmd_done(sp->fcport->vha, sp->fcport, iocb);
329 iocb->free(sp);
330 }
331
332 int
333 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
334 uint32_t tag)
335 {
336 struct scsi_qla_host *vha = fcport->vha;
337 srb_t *sp;
338 struct srb_ctx *ctx;
339 struct srb_iocb *tcf;
340 int rval;
341
342 rval = QLA_FUNCTION_FAILED;
343 sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
344 qla2x00_get_async_timeout(vha) + 2);
345 if (!sp)
346 goto done;
347
348 ctx = sp->ctx;
349 ctx->type = SRB_TM_CMD;
350 ctx->name = "tmf";
351 tcf = ctx->u.iocb_cmd;
352 tcf->u.tmf.flags = flags;
353 tcf->u.tmf.lun = lun;
354 tcf->u.tmf.data = tag;
355 tcf->timeout = qla2x00_async_iocb_timeout;
356 tcf->done = qla2x00_async_tm_cmd_ctx_done;
357
358 rval = qla2x00_start_sp(sp);
359 if (rval != QLA_SUCCESS)
360 goto done_free_sp;
361
362 ql_dbg(ql_dbg_taskm, vha, 0x802f,
363 "Async-tmf loop-id=%x portid=%02x%02x%02x.\n",
364 fcport->loop_id, fcport->d_id.b.domain, fcport->d_id.b.area,
365 fcport->d_id.b.al_pa);
366 return rval;
367
368 done_free_sp:
369 tcf->free(sp);
370 done:
371 return rval;
372 }
373
374 void
375 qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport,
376 uint16_t *data)
377 {
378 int rval;
379
380 switch (data[0]) {
381 case MBS_COMMAND_COMPLETE:
382 /*
383 * Driver must validate login state - If PRLI not complete,
384 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI
385 * requests.
386 */
387 rval = qla2x00_get_port_database(vha, fcport, 0);
388 if (rval != QLA_SUCCESS) {
389 qla2x00_post_async_logout_work(vha, fcport, NULL);
390 qla2x00_post_async_login_work(vha, fcport, NULL);
391 break;
392 }
393 if (fcport->flags & FCF_FCP2_DEVICE) {
394 qla2x00_post_async_adisc_work(vha, fcport, data);
395 break;
396 }
397 qla2x00_update_fcport(vha, fcport);
398 break;
399 case MBS_COMMAND_ERROR:
400 fcport->flags &= ~FCF_ASYNC_SENT;
401 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
402 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
403 else
404 qla2x00_mark_device_lost(vha, fcport, 1, 0);
405 break;
406 case MBS_PORT_ID_USED:
407 fcport->loop_id = data[1];
408 qla2x00_post_async_logout_work(vha, fcport, NULL);
409 qla2x00_post_async_login_work(vha, fcport, NULL);
410 break;
411 case MBS_LOOP_ID_USED:
412 fcport->loop_id++;
413 rval = qla2x00_find_new_loop_id(vha, fcport);
414 if (rval != QLA_SUCCESS) {
415 fcport->flags &= ~FCF_ASYNC_SENT;
416 qla2x00_mark_device_lost(vha, fcport, 1, 0);
417 break;
418 }
419 qla2x00_post_async_login_work(vha, fcport, NULL);
420 break;
421 }
422 return;
423 }
424
425 void
426 qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
427 uint16_t *data)
428 {
429 qla2x00_mark_device_lost(vha, fcport, 1, 0);
430 return;
431 }
432
433 void
434 qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport,
435 uint16_t *data)
436 {
437 if (data[0] == MBS_COMMAND_COMPLETE) {
438 qla2x00_update_fcport(vha, fcport);
439
440 return;
441 }
442
443 /* Retry login. */
444 fcport->flags &= ~FCF_ASYNC_SENT;
445 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
446 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
447 else
448 qla2x00_mark_device_lost(vha, fcport, 1, 0);
449
450 return;
451 }
452
453 void
454 qla2x00_async_tm_cmd_done(struct scsi_qla_host *vha, fc_port_t *fcport,
455 struct srb_iocb *iocb)
456 {
457 int rval;
458 uint32_t flags;
459 uint16_t lun;
460
461 flags = iocb->u.tmf.flags;
462 lun = (uint16_t)iocb->u.tmf.lun;
463
464 /* Issue Marker IOCB */
465 rval = qla2x00_marker(vha, vha->hw->req_q_map[0],
466 vha->hw->rsp_q_map[0], fcport->loop_id, lun,
467 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
468
469 if ((rval != QLA_SUCCESS) || iocb->u.tmf.data) {
470 ql_dbg(ql_dbg_taskm, vha, 0x8030,
471 "TM IOCB failed (%x).\n", rval);
472 }
473
474 return;
475 }
476
477 /****************************************************************************/
478 /* QLogic ISP2x00 Hardware Support Functions. */
479 /****************************************************************************/
480
481 /*
482 * qla2x00_initialize_adapter
483 * Initialize board.
484 *
485 * Input:
486 * ha = adapter block pointer.
487 *
488 * Returns:
489 * 0 = success
490 */
491 int
492 qla2x00_initialize_adapter(scsi_qla_host_t *vha)
493 {
494 int rval;
495 struct qla_hw_data *ha = vha->hw;
496 struct req_que *req = ha->req_q_map[0];
497
498 /* Clear adapter flags. */
499 vha->flags.online = 0;
500 ha->flags.chip_reset_done = 0;
501 vha->flags.reset_active = 0;
502 ha->flags.pci_channel_io_perm_failure = 0;
503 ha->flags.eeh_busy = 0;
504 ha->flags.thermal_supported = 1;
505 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
506 atomic_set(&vha->loop_state, LOOP_DOWN);
507 vha->device_flags = DFLG_NO_CABLE;
508 vha->dpc_flags = 0;
509 vha->flags.management_server_logged_in = 0;
510 vha->marker_needed = 0;
511 ha->isp_abort_cnt = 0;
512 ha->beacon_blink_led = 0;
513
514 set_bit(0, ha->req_qid_map);
515 set_bit(0, ha->rsp_qid_map);
516
517 ql_log(ql_log_info, vha, 0x0040,
518 "Configuring PCI space...\n");
519 rval = ha->isp_ops->pci_config(vha);
520 if (rval) {
521 ql_log(ql_log_warn, vha, 0x0044,
522 "Unable to configure PCI space.\n");
523 return (rval);
524 }
525
526 ha->isp_ops->reset_chip(vha);
527
528 rval = qla2xxx_get_flash_info(vha);
529 if (rval) {
530 ql_log(ql_log_fatal, vha, 0x004f,
531 "Unable to validate FLASH data.\n");
532 return (rval);
533 }
534
535 ha->isp_ops->get_flash_version(vha, req->ring);
536 ql_log(ql_log_info, vha, 0x0061,
537 "Configure NVRAM parameters...\n");
538
539 ha->isp_ops->nvram_config(vha);
540
541 if (ha->flags.disable_serdes) {
542 /* Mask HBA via NVRAM settings? */
543 ql_log(ql_log_info, vha, 0x0077,
544 "Masking HBA WWPN "
545 "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
546 vha->port_name[0], vha->port_name[1],
547 vha->port_name[2], vha->port_name[3],
548 vha->port_name[4], vha->port_name[5],
549 vha->port_name[6], vha->port_name[7]);
550 return QLA_FUNCTION_FAILED;
551 }
552
553 ql_log(ql_log_info, vha, 0x0078,
554 "Verifying loaded RISC code...\n");
555
556 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
557 rval = ha->isp_ops->chip_diag(vha);
558 if (rval)
559 return (rval);
560 rval = qla2x00_setup_chip(vha);
561 if (rval)
562 return (rval);
563 }
564
565 if (IS_QLA84XX(ha)) {
566 ha->cs84xx = qla84xx_get_chip(vha);
567 if (!ha->cs84xx) {
568 ql_log(ql_log_warn, vha, 0x00d0,
569 "Unable to configure ISP84XX.\n");
570 return QLA_FUNCTION_FAILED;
571 }
572 }
573 rval = qla2x00_init_rings(vha);
574 ha->flags.chip_reset_done = 1;
575
576 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
577 /* Issue verify 84xx FW IOCB to complete 84xx initialization */
578 rval = qla84xx_init_chip(vha);
579 if (rval != QLA_SUCCESS) {
580 ql_log(ql_log_warn, vha, 0x00d4,
581 "Unable to initialize ISP84XX.\n");
582 qla84xx_put_chip(vha);
583 }
584 }
585
586 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
587 qla24xx_read_fcp_prio_cfg(vha);
588
589 return (rval);
590 }
591
592 /**
593 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
594 * @ha: HA context
595 *
596 * Returns 0 on success.
597 */
598 int
599 qla2100_pci_config(scsi_qla_host_t *vha)
600 {
601 uint16_t w;
602 unsigned long flags;
603 struct qla_hw_data *ha = vha->hw;
604 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
605
606 pci_set_master(ha->pdev);
607 pci_try_set_mwi(ha->pdev);
608
609 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
610 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
611 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
612
613 pci_disable_rom(ha->pdev);
614
615 /* Get PCI bus information. */
616 spin_lock_irqsave(&ha->hardware_lock, flags);
617 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
618 spin_unlock_irqrestore(&ha->hardware_lock, flags);
619
620 return QLA_SUCCESS;
621 }
622
623 /**
624 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
625 * @ha: HA context
626 *
627 * Returns 0 on success.
628 */
629 int
630 qla2300_pci_config(scsi_qla_host_t *vha)
631 {
632 uint16_t w;
633 unsigned long flags = 0;
634 uint32_t cnt;
635 struct qla_hw_data *ha = vha->hw;
636 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
637
638 pci_set_master(ha->pdev);
639 pci_try_set_mwi(ha->pdev);
640
641 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
642 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
643
644 if (IS_QLA2322(ha) || IS_QLA6322(ha))
645 w &= ~PCI_COMMAND_INTX_DISABLE;
646 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
647
648 /*
649 * If this is a 2300 card and not 2312, reset the
650 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
651 * the 2310 also reports itself as a 2300 so we need to get the
652 * fb revision level -- a 6 indicates it really is a 2300 and
653 * not a 2310.
654 */
655 if (IS_QLA2300(ha)) {
656 spin_lock_irqsave(&ha->hardware_lock, flags);
657
658 /* Pause RISC. */
659 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
660 for (cnt = 0; cnt < 30000; cnt++) {
661 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
662 break;
663
664 udelay(10);
665 }
666
667 /* Select FPM registers. */
668 WRT_REG_WORD(&reg->ctrl_status, 0x20);
669 RD_REG_WORD(&reg->ctrl_status);
670
671 /* Get the fb rev level */
672 ha->fb_rev = RD_FB_CMD_REG(ha, reg);
673
674 if (ha->fb_rev == FPM_2300)
675 pci_clear_mwi(ha->pdev);
676
677 /* Deselect FPM registers. */
678 WRT_REG_WORD(&reg->ctrl_status, 0x0);
679 RD_REG_WORD(&reg->ctrl_status);
680
681 /* Release RISC module. */
682 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
683 for (cnt = 0; cnt < 30000; cnt++) {
684 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
685 break;
686
687 udelay(10);
688 }
689
690 spin_unlock_irqrestore(&ha->hardware_lock, flags);
691 }
692
693 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
694
695 pci_disable_rom(ha->pdev);
696
697 /* Get PCI bus information. */
698 spin_lock_irqsave(&ha->hardware_lock, flags);
699 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
700 spin_unlock_irqrestore(&ha->hardware_lock, flags);
701
702 return QLA_SUCCESS;
703 }
704
705 /**
706 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
707 * @ha: HA context
708 *
709 * Returns 0 on success.
710 */
711 int
712 qla24xx_pci_config(scsi_qla_host_t *vha)
713 {
714 uint16_t w;
715 unsigned long flags = 0;
716 struct qla_hw_data *ha = vha->hw;
717 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
718
719 pci_set_master(ha->pdev);
720 pci_try_set_mwi(ha->pdev);
721
722 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
723 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
724 w &= ~PCI_COMMAND_INTX_DISABLE;
725 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
726
727 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
728
729 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
730 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
731 pcix_set_mmrbc(ha->pdev, 2048);
732
733 /* PCIe -- adjust Maximum Read Request Size (2048). */
734 if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
735 pcie_set_readrq(ha->pdev, 2048);
736
737 pci_disable_rom(ha->pdev);
738
739 ha->chip_revision = ha->pdev->revision;
740
741 /* Get PCI bus information. */
742 spin_lock_irqsave(&ha->hardware_lock, flags);
743 ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
744 spin_unlock_irqrestore(&ha->hardware_lock, flags);
745
746 return QLA_SUCCESS;
747 }
748
749 /**
750 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
751 * @ha: HA context
752 *
753 * Returns 0 on success.
754 */
755 int
756 qla25xx_pci_config(scsi_qla_host_t *vha)
757 {
758 uint16_t w;
759 struct qla_hw_data *ha = vha->hw;
760
761 pci_set_master(ha->pdev);
762 pci_try_set_mwi(ha->pdev);
763
764 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
765 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
766 w &= ~PCI_COMMAND_INTX_DISABLE;
767 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
768
769 /* PCIe -- adjust Maximum Read Request Size (2048). */
770 if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
771 pcie_set_readrq(ha->pdev, 2048);
772
773 pci_disable_rom(ha->pdev);
774
775 ha->chip_revision = ha->pdev->revision;
776
777 return QLA_SUCCESS;
778 }
779
780 /**
781 * qla2x00_isp_firmware() - Choose firmware image.
782 * @ha: HA context
783 *
784 * Returns 0 on success.
785 */
786 static int
787 qla2x00_isp_firmware(scsi_qla_host_t *vha)
788 {
789 int rval;
790 uint16_t loop_id, topo, sw_cap;
791 uint8_t domain, area, al_pa;
792 struct qla_hw_data *ha = vha->hw;
793
794 /* Assume loading risc code */
795 rval = QLA_FUNCTION_FAILED;
796
797 if (ha->flags.disable_risc_code_load) {
798 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n");
799
800 /* Verify checksum of loaded RISC code. */
801 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
802 if (rval == QLA_SUCCESS) {
803 /* And, verify we are not in ROM code. */
804 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
805 &area, &domain, &topo, &sw_cap);
806 }
807 }
808
809 if (rval)
810 ql_dbg(ql_dbg_init, vha, 0x007a,
811 "**** Load RISC code ****.\n");
812
813 return (rval);
814 }
815
816 /**
817 * qla2x00_reset_chip() - Reset ISP chip.
818 * @ha: HA context
819 *
820 * Returns 0 on success.
821 */
822 void
823 qla2x00_reset_chip(scsi_qla_host_t *vha)
824 {
825 unsigned long flags = 0;
826 struct qla_hw_data *ha = vha->hw;
827 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
828 uint32_t cnt;
829 uint16_t cmd;
830
831 if (unlikely(pci_channel_offline(ha->pdev)))
832 return;
833
834 ha->isp_ops->disable_intrs(ha);
835
836 spin_lock_irqsave(&ha->hardware_lock, flags);
837
838 /* Turn off master enable */
839 cmd = 0;
840 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
841 cmd &= ~PCI_COMMAND_MASTER;
842 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
843
844 if (!IS_QLA2100(ha)) {
845 /* Pause RISC. */
846 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
847 if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
848 for (cnt = 0; cnt < 30000; cnt++) {
849 if ((RD_REG_WORD(&reg->hccr) &
850 HCCR_RISC_PAUSE) != 0)
851 break;
852 udelay(100);
853 }
854 } else {
855 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
856 udelay(10);
857 }
858
859 /* Select FPM registers. */
860 WRT_REG_WORD(&reg->ctrl_status, 0x20);
861 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
862
863 /* FPM Soft Reset. */
864 WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
865 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
866
867 /* Toggle Fpm Reset. */
868 if (!IS_QLA2200(ha)) {
869 WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
870 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
871 }
872
873 /* Select frame buffer registers. */
874 WRT_REG_WORD(&reg->ctrl_status, 0x10);
875 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
876
877 /* Reset frame buffer FIFOs. */
878 if (IS_QLA2200(ha)) {
879 WRT_FB_CMD_REG(ha, reg, 0xa000);
880 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
881 } else {
882 WRT_FB_CMD_REG(ha, reg, 0x00fc);
883
884 /* Read back fb_cmd until zero or 3 seconds max */
885 for (cnt = 0; cnt < 3000; cnt++) {
886 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
887 break;
888 udelay(100);
889 }
890 }
891
892 /* Select RISC module registers. */
893 WRT_REG_WORD(&reg->ctrl_status, 0);
894 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
895
896 /* Reset RISC processor. */
897 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
898 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
899
900 /* Release RISC processor. */
901 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
902 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
903 }
904
905 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
906 WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
907
908 /* Reset ISP chip. */
909 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
910
911 /* Wait for RISC to recover from reset. */
912 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
913 /*
914 * It is necessary to for a delay here since the card doesn't
915 * respond to PCI reads during a reset. On some architectures
916 * this will result in an MCA.
917 */
918 udelay(20);
919 for (cnt = 30000; cnt; cnt--) {
920 if ((RD_REG_WORD(&reg->ctrl_status) &
921 CSR_ISP_SOFT_RESET) == 0)
922 break;
923 udelay(100);
924 }
925 } else
926 udelay(10);
927
928 /* Reset RISC processor. */
929 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
930
931 WRT_REG_WORD(&reg->semaphore, 0);
932
933 /* Release RISC processor. */
934 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
935 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
936
937 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
938 for (cnt = 0; cnt < 30000; cnt++) {
939 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
940 break;
941
942 udelay(100);
943 }
944 } else
945 udelay(100);
946
947 /* Turn on master enable */
948 cmd |= PCI_COMMAND_MASTER;
949 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
950
951 /* Disable RISC pause on FPM parity error. */
952 if (!IS_QLA2100(ha)) {
953 WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
954 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
955 }
956
957 spin_unlock_irqrestore(&ha->hardware_lock, flags);
958 }
959
960 /**
961 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
962 *
963 * Returns 0 on success.
964 */
965 int
966 qla81xx_reset_mpi(scsi_qla_host_t *vha)
967 {
968 uint16_t mb[4] = {0x1010, 0, 1, 0};
969
970 return qla81xx_write_mpi_register(vha, mb);
971 }
972
973 /**
974 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
975 * @ha: HA context
976 *
977 * Returns 0 on success.
978 */
979 static inline void
980 qla24xx_reset_risc(scsi_qla_host_t *vha)
981 {
982 unsigned long flags = 0;
983 struct qla_hw_data *ha = vha->hw;
984 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
985 uint32_t cnt, d2;
986 uint16_t wd;
987 static int abts_cnt; /* ISP abort retry counts */
988
989 spin_lock_irqsave(&ha->hardware_lock, flags);
990
991 /* Reset RISC. */
992 WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
993 for (cnt = 0; cnt < 30000; cnt++) {
994 if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
995 break;
996
997 udelay(10);
998 }
999
1000 WRT_REG_DWORD(&reg->ctrl_status,
1001 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
1002 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
1003
1004 udelay(100);
1005 /* Wait for firmware to complete NVRAM accesses. */
1006 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
1007 for (cnt = 10000 ; cnt && d2; cnt--) {
1008 udelay(5);
1009 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
1010 barrier();
1011 }
1012
1013 /* Wait for soft-reset to complete. */
1014 d2 = RD_REG_DWORD(&reg->ctrl_status);
1015 for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
1016 udelay(5);
1017 d2 = RD_REG_DWORD(&reg->ctrl_status);
1018 barrier();
1019 }
1020
1021 /* If required, do an MPI FW reset now */
1022 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
1023 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
1024 if (++abts_cnt < 5) {
1025 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1026 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
1027 } else {
1028 /*
1029 * We exhausted the ISP abort retries. We have to
1030 * set the board offline.
1031 */
1032 abts_cnt = 0;
1033 vha->flags.online = 0;
1034 }
1035 }
1036 }
1037
1038 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
1039 RD_REG_DWORD(&reg->hccr);
1040
1041 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
1042 RD_REG_DWORD(&reg->hccr);
1043
1044 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
1045 RD_REG_DWORD(&reg->hccr);
1046
1047 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
1048 for (cnt = 6000000 ; cnt && d2; cnt--) {
1049 udelay(5);
1050 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
1051 barrier();
1052 }
1053
1054 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1055
1056 if (IS_NOPOLLING_TYPE(ha))
1057 ha->isp_ops->enable_intrs(ha);
1058 }
1059
1060 /**
1061 * qla24xx_reset_chip() - Reset ISP24xx chip.
1062 * @ha: HA context
1063 *
1064 * Returns 0 on success.
1065 */
1066 void
1067 qla24xx_reset_chip(scsi_qla_host_t *vha)
1068 {
1069 struct qla_hw_data *ha = vha->hw;
1070
1071 if (pci_channel_offline(ha->pdev) &&
1072 ha->flags.pci_channel_io_perm_failure) {
1073 return;
1074 }
1075
1076 ha->isp_ops->disable_intrs(ha);
1077
1078 /* Perform RISC reset. */
1079 qla24xx_reset_risc(vha);
1080 }
1081
1082 /**
1083 * qla2x00_chip_diag() - Test chip for proper operation.
1084 * @ha: HA context
1085 *
1086 * Returns 0 on success.
1087 */
1088 int
1089 qla2x00_chip_diag(scsi_qla_host_t *vha)
1090 {
1091 int rval;
1092 struct qla_hw_data *ha = vha->hw;
1093 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1094 unsigned long flags = 0;
1095 uint16_t data;
1096 uint32_t cnt;
1097 uint16_t mb[5];
1098 struct req_que *req = ha->req_q_map[0];
1099
1100 /* Assume a failed state */
1101 rval = QLA_FUNCTION_FAILED;
1102
1103 ql_dbg(ql_dbg_init, vha, 0x007b,
1104 "Testing device at %lx.\n", (u_long)&reg->flash_address);
1105
1106 spin_lock_irqsave(&ha->hardware_lock, flags);
1107
1108 /* Reset ISP chip. */
1109 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
1110
1111 /*
1112 * We need to have a delay here since the card will not respond while
1113 * in reset causing an MCA on some architectures.
1114 */
1115 udelay(20);
1116 data = qla2x00_debounce_register(&reg->ctrl_status);
1117 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
1118 udelay(5);
1119 data = RD_REG_WORD(&reg->ctrl_status);
1120 barrier();
1121 }
1122
1123 if (!cnt)
1124 goto chip_diag_failed;
1125
1126 ql_dbg(ql_dbg_init, vha, 0x007c,
1127 "Reset register cleared by chip reset.\n");
1128
1129 /* Reset RISC processor. */
1130 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
1131 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
1132
1133 /* Workaround for QLA2312 PCI parity error */
1134 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
1135 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
1136 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
1137 udelay(5);
1138 data = RD_MAILBOX_REG(ha, reg, 0);
1139 barrier();
1140 }
1141 } else
1142 udelay(10);
1143
1144 if (!cnt)
1145 goto chip_diag_failed;
1146
1147 /* Check product ID of chip */
1148 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product Id of chip.\n");
1149
1150 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
1151 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
1152 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
1153 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
1154 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
1155 mb[3] != PROD_ID_3) {
1156 ql_log(ql_log_warn, vha, 0x0062,
1157 "Wrong product ID = 0x%x,0x%x,0x%x.\n",
1158 mb[1], mb[2], mb[3]);
1159
1160 goto chip_diag_failed;
1161 }
1162 ha->product_id[0] = mb[1];
1163 ha->product_id[1] = mb[2];
1164 ha->product_id[2] = mb[3];
1165 ha->product_id[3] = mb[4];
1166
1167 /* Adjust fw RISC transfer size */
1168 if (req->length > 1024)
1169 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
1170 else
1171 ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
1172 req->length;
1173
1174 if (IS_QLA2200(ha) &&
1175 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
1176 /* Limit firmware transfer size with a 2200A */
1177 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n");
1178
1179 ha->device_type |= DT_ISP2200A;
1180 ha->fw_transfer_size = 128;
1181 }
1182
1183 /* Wrap Incoming Mailboxes Test. */
1184 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1185
1186 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n");
1187 rval = qla2x00_mbx_reg_test(vha);
1188 if (rval)
1189 ql_log(ql_log_warn, vha, 0x0080,
1190 "Failed mailbox send register test.\n");
1191 else
1192 /* Flag a successful rval */
1193 rval = QLA_SUCCESS;
1194 spin_lock_irqsave(&ha->hardware_lock, flags);
1195
1196 chip_diag_failed:
1197 if (rval)
1198 ql_log(ql_log_info, vha, 0x0081,
1199 "Chip diagnostics **** FAILED ****.\n");
1200
1201 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1202
1203 return (rval);
1204 }
1205
1206 /**
1207 * qla24xx_chip_diag() - Test ISP24xx for proper operation.
1208 * @ha: HA context
1209 *
1210 * Returns 0 on success.
1211 */
1212 int
1213 qla24xx_chip_diag(scsi_qla_host_t *vha)
1214 {
1215 int rval;
1216 struct qla_hw_data *ha = vha->hw;
1217 struct req_que *req = ha->req_q_map[0];
1218
1219 if (IS_QLA82XX(ha))
1220 return QLA_SUCCESS;
1221
1222 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
1223
1224 rval = qla2x00_mbx_reg_test(vha);
1225 if (rval) {
1226 ql_log(ql_log_warn, vha, 0x0082,
1227 "Failed mailbox send register test.\n");
1228 } else {
1229 /* Flag a successful rval */
1230 rval = QLA_SUCCESS;
1231 }
1232
1233 return rval;
1234 }
1235
1236 void
1237 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
1238 {
1239 int rval;
1240 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
1241 eft_size, fce_size, mq_size;
1242 dma_addr_t tc_dma;
1243 void *tc;
1244 struct qla_hw_data *ha = vha->hw;
1245 struct req_que *req = ha->req_q_map[0];
1246 struct rsp_que *rsp = ha->rsp_q_map[0];
1247
1248 if (ha->fw_dump) {
1249 ql_dbg(ql_dbg_init, vha, 0x00bd,
1250 "Firmware dump already allocated.\n");
1251 return;
1252 }
1253
1254 ha->fw_dumped = 0;
1255 fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
1256 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
1257 fixed_size = sizeof(struct qla2100_fw_dump);
1258 } else if (IS_QLA23XX(ha)) {
1259 fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
1260 mem_size = (ha->fw_memory_size - 0x11000 + 1) *
1261 sizeof(uint16_t);
1262 } else if (IS_FWI2_CAPABLE(ha)) {
1263 if (IS_QLA81XX(ha))
1264 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
1265 else if (IS_QLA25XX(ha))
1266 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
1267 else
1268 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
1269 mem_size = (ha->fw_memory_size - 0x100000 + 1) *
1270 sizeof(uint32_t);
1271 if (ha->mqenable)
1272 mq_size = sizeof(struct qla2xxx_mq_chain);
1273 /* Allocate memory for Fibre Channel Event Buffer. */
1274 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))
1275 goto try_eft;
1276
1277 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
1278 GFP_KERNEL);
1279 if (!tc) {
1280 ql_log(ql_log_warn, vha, 0x00be,
1281 "Unable to allocate (%d KB) for FCE.\n",
1282 FCE_SIZE / 1024);
1283 goto try_eft;
1284 }
1285
1286 memset(tc, 0, FCE_SIZE);
1287 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
1288 ha->fce_mb, &ha->fce_bufs);
1289 if (rval) {
1290 ql_log(ql_log_warn, vha, 0x00bf,
1291 "Unable to initialize FCE (%d).\n", rval);
1292 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
1293 tc_dma);
1294 ha->flags.fce_enabled = 0;
1295 goto try_eft;
1296 }
1297 ql_log(ql_log_info, vha, 0x00c0,
1298 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024);
1299
1300 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
1301 ha->flags.fce_enabled = 1;
1302 ha->fce_dma = tc_dma;
1303 ha->fce = tc;
1304 try_eft:
1305 /* Allocate memory for Extended Trace Buffer. */
1306 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
1307 GFP_KERNEL);
1308 if (!tc) {
1309 ql_log(ql_log_warn, vha, 0x00c1,
1310 "Unable to allocate (%d KB) for EFT.\n",
1311 EFT_SIZE / 1024);
1312 goto cont_alloc;
1313 }
1314
1315 memset(tc, 0, EFT_SIZE);
1316 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
1317 if (rval) {
1318 ql_log(ql_log_warn, vha, 0x00c2,
1319 "Unable to initialize EFT (%d).\n", rval);
1320 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
1321 tc_dma);
1322 goto cont_alloc;
1323 }
1324 ql_log(ql_log_info, vha, 0x00c3,
1325 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
1326
1327 eft_size = EFT_SIZE;
1328 ha->eft_dma = tc_dma;
1329 ha->eft = tc;
1330 }
1331 cont_alloc:
1332 req_q_size = req->length * sizeof(request_t);
1333 rsp_q_size = rsp->length * sizeof(response_t);
1334
1335 dump_size = offsetof(struct qla2xxx_fw_dump, isp);
1336 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
1337 ha->chain_offset = dump_size;
1338 dump_size += mq_size + fce_size;
1339
1340 ha->fw_dump = vmalloc(dump_size);
1341 if (!ha->fw_dump) {
1342 ql_log(ql_log_warn, vha, 0x00c4,
1343 "Unable to allocate (%d KB) for firmware dump.\n",
1344 dump_size / 1024);
1345
1346 if (ha->fce) {
1347 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
1348 ha->fce_dma);
1349 ha->fce = NULL;
1350 ha->fce_dma = 0;
1351 }
1352
1353 if (ha->eft) {
1354 dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
1355 ha->eft_dma);
1356 ha->eft = NULL;
1357 ha->eft_dma = 0;
1358 }
1359 return;
1360 }
1361 ql_log(ql_log_info, vha, 0x00c5,
1362 "Allocated (%d KB) for firmware dump.\n", dump_size / 1024);
1363
1364 ha->fw_dump_len = dump_size;
1365 ha->fw_dump->signature[0] = 'Q';
1366 ha->fw_dump->signature[1] = 'L';
1367 ha->fw_dump->signature[2] = 'G';
1368 ha->fw_dump->signature[3] = 'C';
1369 ha->fw_dump->version = __constant_htonl(1);
1370
1371 ha->fw_dump->fixed_size = htonl(fixed_size);
1372 ha->fw_dump->mem_size = htonl(mem_size);
1373 ha->fw_dump->req_q_size = htonl(req_q_size);
1374 ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
1375
1376 ha->fw_dump->eft_size = htonl(eft_size);
1377 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
1378 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
1379
1380 ha->fw_dump->header_size =
1381 htonl(offsetof(struct qla2xxx_fw_dump, isp));
1382 }
1383
1384 static int
1385 qla81xx_mpi_sync(scsi_qla_host_t *vha)
1386 {
1387 #define MPS_MASK 0xe0
1388 int rval;
1389 uint16_t dc;
1390 uint32_t dw;
1391
1392 if (!IS_QLA81XX(vha->hw))
1393 return QLA_SUCCESS;
1394
1395 rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
1396 if (rval != QLA_SUCCESS) {
1397 ql_log(ql_log_warn, vha, 0x0105,
1398 "Unable to acquire semaphore.\n");
1399 goto done;
1400 }
1401
1402 pci_read_config_word(vha->hw->pdev, 0x54, &dc);
1403 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
1404 if (rval != QLA_SUCCESS) {
1405 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n");
1406 goto done_release;
1407 }
1408
1409 dc &= MPS_MASK;
1410 if (dc == (dw & MPS_MASK))
1411 goto done_release;
1412
1413 dw &= ~MPS_MASK;
1414 dw |= dc;
1415 rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
1416 if (rval != QLA_SUCCESS) {
1417 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n");
1418 }
1419
1420 done_release:
1421 rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
1422 if (rval != QLA_SUCCESS) {
1423 ql_log(ql_log_warn, vha, 0x006d,
1424 "Unable to release semaphore.\n");
1425 }
1426
1427 done:
1428 return rval;
1429 }
1430
1431 /**
1432 * qla2x00_setup_chip() - Load and start RISC firmware.
1433 * @ha: HA context
1434 *
1435 * Returns 0 on success.
1436 */
1437 static int
1438 qla2x00_setup_chip(scsi_qla_host_t *vha)
1439 {
1440 int rval;
1441 uint32_t srisc_address = 0;
1442 struct qla_hw_data *ha = vha->hw;
1443 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1444 unsigned long flags;
1445 uint16_t fw_major_version;
1446
1447 if (IS_QLA82XX(ha)) {
1448 rval = ha->isp_ops->load_risc(vha, &srisc_address);
1449 if (rval == QLA_SUCCESS) {
1450 qla2x00_stop_firmware(vha);
1451 goto enable_82xx_npiv;
1452 } else
1453 goto failed;
1454 }
1455
1456 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
1457 /* Disable SRAM, Instruction RAM and GP RAM parity. */
1458 spin_lock_irqsave(&ha->hardware_lock, flags);
1459 WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
1460 RD_REG_WORD(&reg->hccr);
1461 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1462 }
1463
1464 qla81xx_mpi_sync(vha);
1465
1466 /* Load firmware sequences */
1467 rval = ha->isp_ops->load_risc(vha, &srisc_address);
1468 if (rval == QLA_SUCCESS) {
1469 ql_dbg(ql_dbg_init, vha, 0x00c9,
1470 "Verifying Checksum of loaded RISC code.\n");
1471
1472 rval = qla2x00_verify_checksum(vha, srisc_address);
1473 if (rval == QLA_SUCCESS) {
1474 /* Start firmware execution. */
1475 ql_dbg(ql_dbg_init, vha, 0x00ca,
1476 "Starting firmware.\n");
1477
1478 rval = qla2x00_execute_fw(vha, srisc_address);
1479 /* Retrieve firmware information. */
1480 if (rval == QLA_SUCCESS) {
1481 enable_82xx_npiv:
1482 fw_major_version = ha->fw_major_version;
1483 rval = qla2x00_get_fw_version(vha,
1484 &ha->fw_major_version,
1485 &ha->fw_minor_version,
1486 &ha->fw_subminor_version,
1487 &ha->fw_attributes, &ha->fw_memory_size,
1488 ha->mpi_version, &ha->mpi_capabilities,
1489 ha->phy_version);
1490 if (rval != QLA_SUCCESS)
1491 goto failed;
1492 ha->flags.npiv_supported = 0;
1493 if (IS_QLA2XXX_MIDTYPE(ha) &&
1494 (ha->fw_attributes & BIT_2)) {
1495 ha->flags.npiv_supported = 1;
1496 if ((!ha->max_npiv_vports) ||
1497 ((ha->max_npiv_vports + 1) %
1498 MIN_MULTI_ID_FABRIC))
1499 ha->max_npiv_vports =
1500 MIN_MULTI_ID_FABRIC - 1;
1501 }
1502 qla2x00_get_resource_cnts(vha, NULL,
1503 &ha->fw_xcb_count, NULL, NULL,
1504 &ha->max_npiv_vports, NULL);
1505
1506 if (!fw_major_version && ql2xallocfwdump) {
1507 if (!IS_QLA82XX(ha))
1508 qla2x00_alloc_fw_dump(vha);
1509 }
1510 }
1511 } else {
1512 ql_log(ql_log_fatal, vha, 0x00cd,
1513 "ISP Firmware failed checksum.\n");
1514 goto failed;
1515 }
1516 }
1517
1518 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
1519 /* Enable proper parity. */
1520 spin_lock_irqsave(&ha->hardware_lock, flags);
1521 if (IS_QLA2300(ha))
1522 /* SRAM parity */
1523 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
1524 else
1525 /* SRAM, Instruction RAM and GP RAM parity */
1526 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
1527 RD_REG_WORD(&reg->hccr);
1528 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1529 }
1530
1531 if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
1532 uint32_t size;
1533
1534 rval = qla81xx_fac_get_sector_size(vha, &size);
1535 if (rval == QLA_SUCCESS) {
1536 ha->flags.fac_supported = 1;
1537 ha->fdt_block_size = size << 2;
1538 } else {
1539 ql_log(ql_log_warn, vha, 0x00ce,
1540 "Unsupported FAC firmware (%d.%02d.%02d).\n",
1541 ha->fw_major_version, ha->fw_minor_version,
1542 ha->fw_subminor_version);
1543 }
1544 }
1545 failed:
1546 if (rval) {
1547 ql_log(ql_log_fatal, vha, 0x00cf,
1548 "Setup chip ****FAILED****.\n");
1549 }
1550
1551 return (rval);
1552 }
1553
1554 /**
1555 * qla2x00_init_response_q_entries() - Initializes response queue entries.
1556 * @ha: HA context
1557 *
1558 * Beginning of request ring has initialization control block already built
1559 * by nvram config routine.
1560 *
1561 * Returns 0 on success.
1562 */
1563 void
1564 qla2x00_init_response_q_entries(struct rsp_que *rsp)
1565 {
1566 uint16_t cnt;
1567 response_t *pkt;
1568
1569 rsp->ring_ptr = rsp->ring;
1570 rsp->ring_index = 0;
1571 rsp->status_srb = NULL;
1572 pkt = rsp->ring_ptr;
1573 for (cnt = 0; cnt < rsp->length; cnt++) {
1574 pkt->signature = RESPONSE_PROCESSED;
1575 pkt++;
1576 }
1577 }
1578
1579 /**
1580 * qla2x00_update_fw_options() - Read and process firmware options.
1581 * @ha: HA context
1582 *
1583 * Returns 0 on success.
1584 */
1585 void
1586 qla2x00_update_fw_options(scsi_qla_host_t *vha)
1587 {
1588 uint16_t swing, emphasis, tx_sens, rx_sens;
1589 struct qla_hw_data *ha = vha->hw;
1590
1591 memset(ha->fw_options, 0, sizeof(ha->fw_options));
1592 qla2x00_get_fw_options(vha, ha->fw_options);
1593
1594 if (IS_QLA2100(ha) || IS_QLA2200(ha))
1595 return;
1596
1597 /* Serial Link options. */
1598 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
1599 "Serial link options.\n");
1600 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
1601 (uint8_t *)&ha->fw_seriallink_options,
1602 sizeof(ha->fw_seriallink_options));
1603
1604 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
1605 if (ha->fw_seriallink_options[3] & BIT_2) {
1606 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
1607
1608 /* 1G settings */
1609 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
1610 emphasis = (ha->fw_seriallink_options[2] &
1611 (BIT_4 | BIT_3)) >> 3;
1612 tx_sens = ha->fw_seriallink_options[0] &
1613 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
1614 rx_sens = (ha->fw_seriallink_options[0] &
1615 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
1616 ha->fw_options[10] = (emphasis << 14) | (swing << 8);
1617 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
1618 if (rx_sens == 0x0)
1619 rx_sens = 0x3;
1620 ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
1621 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
1622 ha->fw_options[10] |= BIT_5 |
1623 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
1624 (tx_sens & (BIT_1 | BIT_0));
1625
1626 /* 2G settings */
1627 swing = (ha->fw_seriallink_options[2] &
1628 (BIT_7 | BIT_6 | BIT_5)) >> 5;
1629 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
1630 tx_sens = ha->fw_seriallink_options[1] &
1631 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
1632 rx_sens = (ha->fw_seriallink_options[1] &
1633 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
1634 ha->fw_options[11] = (emphasis << 14) | (swing << 8);
1635 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
1636 if (rx_sens == 0x0)
1637 rx_sens = 0x3;
1638 ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
1639 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
1640 ha->fw_options[11] |= BIT_5 |
1641 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
1642 (tx_sens & (BIT_1 | BIT_0));
1643 }
1644
1645 /* FCP2 options. */
1646 /* Return command IOCBs without waiting for an ABTS to complete. */
1647 ha->fw_options[3] |= BIT_13;
1648
1649 /* LED scheme. */
1650 if (ha->flags.enable_led_scheme)
1651 ha->fw_options[2] |= BIT_12;
1652
1653 /* Detect ISP6312. */
1654 if (IS_QLA6312(ha))
1655 ha->fw_options[2] |= BIT_13;
1656
1657 /* Update firmware options. */
1658 qla2x00_set_fw_options(vha, ha->fw_options);
1659 }
1660
1661 void
1662 qla24xx_update_fw_options(scsi_qla_host_t *vha)
1663 {
1664 int rval;
1665 struct qla_hw_data *ha = vha->hw;
1666
1667 if (IS_QLA82XX(ha))
1668 return;
1669
1670 /* Update Serial Link options. */
1671 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
1672 return;
1673
1674 rval = qla2x00_set_serdes_params(vha,
1675 le16_to_cpu(ha->fw_seriallink_options24[1]),
1676 le16_to_cpu(ha->fw_seriallink_options24[2]),
1677 le16_to_cpu(ha->fw_seriallink_options24[3]));
1678 if (rval != QLA_SUCCESS) {
1679 ql_log(ql_log_warn, vha, 0x0104,
1680 "Unable to update Serial Link options (%x).\n", rval);
1681 }
1682 }
1683
1684 void
1685 qla2x00_config_rings(struct scsi_qla_host *vha)
1686 {
1687 struct qla_hw_data *ha = vha->hw;
1688 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1689 struct req_que *req = ha->req_q_map[0];
1690 struct rsp_que *rsp = ha->rsp_q_map[0];
1691
1692 /* Setup ring parameters in initialization control block. */
1693 ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
1694 ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
1695 ha->init_cb->request_q_length = cpu_to_le16(req->length);
1696 ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
1697 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
1698 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
1699 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
1700 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
1701
1702 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
1703 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
1704 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
1705 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
1706 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
1707 }
1708
1709 void
1710 qla24xx_config_rings(struct scsi_qla_host *vha)
1711 {
1712 struct qla_hw_data *ha = vha->hw;
1713 device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
1714 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
1715 struct qla_msix_entry *msix;
1716 struct init_cb_24xx *icb;
1717 uint16_t rid = 0;
1718 struct req_que *req = ha->req_q_map[0];
1719 struct rsp_que *rsp = ha->rsp_q_map[0];
1720
1721 /* Setup ring parameters in initialization control block. */
1722 icb = (struct init_cb_24xx *)ha->init_cb;
1723 icb->request_q_outpointer = __constant_cpu_to_le16(0);
1724 icb->response_q_inpointer = __constant_cpu_to_le16(0);
1725 icb->request_q_length = cpu_to_le16(req->length);
1726 icb->response_q_length = cpu_to_le16(rsp->length);
1727 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
1728 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
1729 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
1730 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
1731
1732 if (ha->mqenable) {
1733 icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
1734 icb->rid = __constant_cpu_to_le16(rid);
1735 if (ha->flags.msix_enabled) {
1736 msix = &ha->msix_entries[1];
1737 ql_dbg(ql_dbg_init, vha, 0x00fd,
1738 "Registering vector 0x%x for base que.\n",
1739 msix->entry);
1740 icb->msix = cpu_to_le16(msix->entry);
1741 }
1742 /* Use alternate PCI bus number */
1743 if (MSB(rid))
1744 icb->firmware_options_2 |=
1745 __constant_cpu_to_le32(BIT_19);
1746 /* Use alternate PCI devfn */
1747 if (LSB(rid))
1748 icb->firmware_options_2 |=
1749 __constant_cpu_to_le32(BIT_18);
1750
1751 /* Use Disable MSIX Handshake mode for capable adapters */
1752 if (IS_MSIX_NACK_CAPABLE(ha)) {
1753 icb->firmware_options_2 &=
1754 __constant_cpu_to_le32(~BIT_22);
1755 ha->flags.disable_msix_handshake = 1;
1756 ql_dbg(ql_dbg_init, vha, 0x00fe,
1757 "MSIX Handshake Disable Mode turned on.\n");
1758 } else {
1759 icb->firmware_options_2 |=
1760 __constant_cpu_to_le32(BIT_22);
1761 }
1762 icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
1763
1764 WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
1765 WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
1766 WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
1767 WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
1768 } else {
1769 WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
1770 WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
1771 WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
1772 WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
1773 }
1774 /* PCI posting */
1775 RD_REG_DWORD(&ioreg->hccr);
1776 }
1777
1778 /**
1779 * qla2x00_init_rings() - Initializes firmware.
1780 * @ha: HA context
1781 *
1782 * Beginning of request ring has initialization control block already built
1783 * by nvram config routine.
1784 *
1785 * Returns 0 on success.
1786 */
1787 static int
1788 qla2x00_init_rings(scsi_qla_host_t *vha)
1789 {
1790 int rval;
1791 unsigned long flags = 0;
1792 int cnt, que;
1793 struct qla_hw_data *ha = vha->hw;
1794 struct req_que *req;
1795 struct rsp_que *rsp;
1796 struct scsi_qla_host *vp;
1797 struct mid_init_cb_24xx *mid_init_cb =
1798 (struct mid_init_cb_24xx *) ha->init_cb;
1799
1800 spin_lock_irqsave(&ha->hardware_lock, flags);
1801
1802 /* Clear outstanding commands array. */
1803 for (que = 0; que < ha->max_req_queues; que++) {
1804 req = ha->req_q_map[que];
1805 if (!req)
1806 continue;
1807 for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
1808 req->outstanding_cmds[cnt] = NULL;
1809
1810 req->current_outstanding_cmd = 1;
1811
1812 /* Initialize firmware. */
1813 req->ring_ptr = req->ring;
1814 req->ring_index = 0;
1815 req->cnt = req->length;
1816 }
1817
1818 for (que = 0; que < ha->max_rsp_queues; que++) {
1819 rsp = ha->rsp_q_map[que];
1820 if (!rsp)
1821 continue;
1822 /* Initialize response queue entries */
1823 qla2x00_init_response_q_entries(rsp);
1824 }
1825
1826 spin_lock(&ha->vport_slock);
1827 /* Clear RSCN queue. */
1828 list_for_each_entry(vp, &ha->vp_list, list) {
1829 vp->rscn_in_ptr = 0;
1830 vp->rscn_out_ptr = 0;
1831 }
1832
1833 spin_unlock(&ha->vport_slock);
1834
1835 ha->isp_ops->config_rings(vha);
1836
1837 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1838
1839 /* Update any ISP specific firmware options before initialization. */
1840 ha->isp_ops->update_fw_options(vha);
1841
1842 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n");
1843
1844 if (ha->flags.npiv_supported) {
1845 if (ha->operating_mode == LOOP)
1846 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
1847 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
1848 }
1849
1850 if (IS_FWI2_CAPABLE(ha)) {
1851 mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
1852 mid_init_cb->init_cb.execution_throttle =
1853 cpu_to_le16(ha->fw_xcb_count);
1854 }
1855
1856 rval = qla2x00_init_firmware(vha, ha->init_cb_size);
1857 if (rval) {
1858 ql_log(ql_log_fatal, vha, 0x00d2,
1859 "Init Firmware **** FAILED ****.\n");
1860 } else {
1861 ql_dbg(ql_dbg_init, vha, 0x00d3,
1862 "Init Firmware -- success.\n");
1863 }
1864
1865 return (rval);
1866 }
1867
1868 /**
1869 * qla2x00_fw_ready() - Waits for firmware ready.
1870 * @ha: HA context
1871 *
1872 * Returns 0 on success.
1873 */
1874 static int
1875 qla2x00_fw_ready(scsi_qla_host_t *vha)
1876 {
1877 int rval;
1878 unsigned long wtime, mtime, cs84xx_time;
1879 uint16_t min_wait; /* Minimum wait time if loop is down */
1880 uint16_t wait_time; /* Wait time if loop is coming ready */
1881 uint16_t state[5];
1882 struct qla_hw_data *ha = vha->hw;
1883
1884 rval = QLA_SUCCESS;
1885
1886 /* 20 seconds for loop down. */
1887 min_wait = 20;
1888
1889 /*
1890 * Firmware should take at most one RATOV to login, plus 5 seconds for
1891 * our own processing.
1892 */
1893 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
1894 wait_time = min_wait;
1895 }
1896
1897 /* Min wait time if loop down */
1898 mtime = jiffies + (min_wait * HZ);
1899
1900 /* wait time before firmware ready */
1901 wtime = jiffies + (wait_time * HZ);
1902
1903 /* Wait for ISP to finish LIP */
1904 if (!vha->flags.init_done)
1905 ql_log(ql_log_info, vha, 0x801e,
1906 "Waiting for LIP to complete.\n");
1907
1908 do {
1909 rval = qla2x00_get_firmware_state(vha, state);
1910 if (rval == QLA_SUCCESS) {
1911 if (state[0] < FSTATE_LOSS_OF_SYNC) {
1912 vha->device_flags &= ~DFLG_NO_CABLE;
1913 }
1914 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
1915 ql_dbg(ql_dbg_taskm, vha, 0x801f,
1916 "fw_state=%x 84xx=%x.\n", state[0],
1917 state[2]);
1918 if ((state[2] & FSTATE_LOGGED_IN) &&
1919 (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
1920 ql_dbg(ql_dbg_taskm, vha, 0x8028,
1921 "Sending verify iocb.\n");
1922
1923 cs84xx_time = jiffies;
1924 rval = qla84xx_init_chip(vha);
1925 if (rval != QLA_SUCCESS) {
1926 ql_log(ql_log_warn,
1927 vha, 0x8043,
1928 "Init chip failed.\n");
1929 break;
1930 }
1931
1932 /* Add time taken to initialize. */
1933 cs84xx_time = jiffies - cs84xx_time;
1934 wtime += cs84xx_time;
1935 mtime += cs84xx_time;
1936 ql_dbg(ql_dbg_taskm, vha, 0x8042,
1937 "Increasing wait time by %ld. "
1938 "New time %ld.\n", cs84xx_time,
1939 wtime);
1940 }
1941 } else if (state[0] == FSTATE_READY) {
1942 ql_dbg(ql_dbg_taskm, vha, 0x8037,
1943 "F/W Ready - OK.\n");
1944
1945 qla2x00_get_retry_cnt(vha, &ha->retry_count,
1946 &ha->login_timeout, &ha->r_a_tov);
1947
1948 rval = QLA_SUCCESS;
1949 break;
1950 }
1951
1952 rval = QLA_FUNCTION_FAILED;
1953
1954 if (atomic_read(&vha->loop_down_timer) &&
1955 state[0] != FSTATE_READY) {
1956 /* Loop down. Timeout on min_wait for states
1957 * other than Wait for Login.
1958 */
1959 if (time_after_eq(jiffies, mtime)) {
1960 ql_log(ql_log_info, vha, 0x8038,
1961 "Cable is unplugged...\n");
1962
1963 vha->device_flags |= DFLG_NO_CABLE;
1964 break;
1965 }
1966 }
1967 } else {
1968 /* Mailbox cmd failed. Timeout on min_wait. */
1969 if (time_after_eq(jiffies, mtime) ||
1970 ha->flags.isp82xx_fw_hung)
1971 break;
1972 }
1973
1974 if (time_after_eq(jiffies, wtime))
1975 break;
1976
1977 /* Delay for a while */
1978 msleep(500);
1979
1980 ql_dbg(ql_dbg_taskm, vha, 0x8039,
1981 "fw_state=%x curr time=%lx.\n", state[0], jiffies);
1982 } while (1);
1983
1984 ql_dbg(ql_dbg_taskm, vha, 0x803a,
1985 "fw_state=%x (%x, %x, %x, %x) " "curr time=%lx.\n", state[0],
1986 state[1], state[2], state[3], state[4], jiffies);
1987
1988 if (rval) {
1989 ql_log(ql_log_warn, vha, 0x803b,
1990 "Firmware ready **** FAILED ****.\n");
1991 }
1992
1993 return (rval);
1994 }
1995
1996 /*
1997 * qla2x00_configure_hba
1998 * Setup adapter context.
1999 *
2000 * Input:
2001 * ha = adapter state pointer.
2002 *
2003 * Returns:
2004 * 0 = success
2005 *
2006 * Context:
2007 * Kernel context.
2008 */
2009 static int
2010 qla2x00_configure_hba(scsi_qla_host_t *vha)
2011 {
2012 int rval;
2013 uint16_t loop_id;
2014 uint16_t topo;
2015 uint16_t sw_cap;
2016 uint8_t al_pa;
2017 uint8_t area;
2018 uint8_t domain;
2019 char connect_type[22];
2020 struct qla_hw_data *ha = vha->hw;
2021
2022 /* Get host addresses. */
2023 rval = qla2x00_get_adapter_id(vha,
2024 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
2025 if (rval != QLA_SUCCESS) {
2026 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
2027 IS_QLA8XXX_TYPE(ha) ||
2028 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
2029 ql_dbg(ql_dbg_disc, vha, 0x2008,
2030 "Loop is in a transition state.\n");
2031 } else {
2032 ql_log(ql_log_warn, vha, 0x2009,
2033 "Unable to get host loop ID.\n");
2034 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2035 }
2036 return (rval);
2037 }
2038
2039 if (topo == 4) {
2040 ql_log(ql_log_info, vha, 0x200a,
2041 "Cannot get topology - retrying.\n");
2042 return (QLA_FUNCTION_FAILED);
2043 }
2044
2045 vha->loop_id = loop_id;
2046
2047 /* initialize */
2048 ha->min_external_loopid = SNS_FIRST_LOOP_ID;
2049 ha->operating_mode = LOOP;
2050 ha->switch_cap = 0;
2051
2052 switch (topo) {
2053 case 0:
2054 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n");
2055 ha->current_topology = ISP_CFG_NL;
2056 strcpy(connect_type, "(Loop)");
2057 break;
2058
2059 case 1:
2060 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n");
2061 ha->switch_cap = sw_cap;
2062 ha->current_topology = ISP_CFG_FL;
2063 strcpy(connect_type, "(FL_Port)");
2064 break;
2065
2066 case 2:
2067 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n");
2068 ha->operating_mode = P2P;
2069 ha->current_topology = ISP_CFG_N;
2070 strcpy(connect_type, "(N_Port-to-N_Port)");
2071 break;
2072
2073 case 3:
2074 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n");
2075 ha->switch_cap = sw_cap;
2076 ha->operating_mode = P2P;
2077 ha->current_topology = ISP_CFG_F;
2078 strcpy(connect_type, "(F_Port)");
2079 break;
2080
2081 default:
2082 ql_dbg(ql_dbg_disc, vha, 0x200f,
2083 "HBA in unknown topology %x, using NL.\n", topo);
2084 ha->current_topology = ISP_CFG_NL;
2085 strcpy(connect_type, "(Loop)");
2086 break;
2087 }
2088
2089 /* Save Host port and loop ID. */
2090 /* byte order - Big Endian */
2091 vha->d_id.b.domain = domain;
2092 vha->d_id.b.area = area;
2093 vha->d_id.b.al_pa = al_pa;
2094
2095 if (!vha->flags.init_done)
2096 ql_log(ql_log_info, vha, 0x2010,
2097 "Topology - %s, Host Loop address 0x%x.\n",
2098 connect_type, vha->loop_id);
2099
2100 if (rval) {
2101 ql_log(ql_log_warn, vha, 0x2011,
2102 "%s FAILED\n", __func__);
2103 } else {
2104 ql_dbg(ql_dbg_disc, vha, 0x2012,
2105 "%s success\n", __func__);
2106 }
2107
2108 return(rval);
2109 }
2110
2111 inline void
2112 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
2113 char *def)
2114 {
2115 char *st, *en;
2116 uint16_t index;
2117 struct qla_hw_data *ha = vha->hw;
2118 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
2119 !IS_QLA8XXX_TYPE(ha);
2120
2121 if (memcmp(model, BINZERO, len) != 0) {
2122 strncpy(ha->model_number, model, len);
2123 st = en = ha->model_number;
2124 en += len - 1;
2125 while (en > st) {
2126 if (*en != 0x20 && *en != 0x00)
2127 break;
2128 *en-- = '\0';
2129 }
2130
2131 index = (ha->pdev->subsystem_device & 0xff);
2132 if (use_tbl &&
2133 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
2134 index < QLA_MODEL_NAMES)
2135 strncpy(ha->model_desc,
2136 qla2x00_model_name[index * 2 + 1],
2137 sizeof(ha->model_desc) - 1);
2138 } else {
2139 index = (ha->pdev->subsystem_device & 0xff);
2140 if (use_tbl &&
2141 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
2142 index < QLA_MODEL_NAMES) {
2143 strcpy(ha->model_number,
2144 qla2x00_model_name[index * 2]);
2145 strncpy(ha->model_desc,
2146 qla2x00_model_name[index * 2 + 1],
2147 sizeof(ha->model_desc) - 1);
2148 } else {
2149 strcpy(ha->model_number, def);
2150 }
2151 }
2152 if (IS_FWI2_CAPABLE(ha))
2153 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
2154 sizeof(ha->model_desc));
2155 }
2156
2157 /* On sparc systems, obtain port and node WWN from firmware
2158 * properties.
2159 */
2160 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
2161 {
2162 #ifdef CONFIG_SPARC
2163 struct qla_hw_data *ha = vha->hw;
2164 struct pci_dev *pdev = ha->pdev;
2165 struct device_node *dp = pci_device_to_OF_node(pdev);
2166 const u8 *val;
2167 int len;
2168
2169 val = of_get_property(dp, "port-wwn", &len);
2170 if (val && len >= WWN_SIZE)
2171 memcpy(nv->port_name, val, WWN_SIZE);
2172
2173 val = of_get_property(dp, "node-wwn", &len);
2174 if (val && len >= WWN_SIZE)
2175 memcpy(nv->node_name, val, WWN_SIZE);
2176 #endif
2177 }
2178
2179 /*
2180 * NVRAM configuration for ISP 2xxx
2181 *
2182 * Input:
2183 * ha = adapter block pointer.
2184 *
2185 * Output:
2186 * initialization control block in response_ring
2187 * host adapters parameters in host adapter block
2188 *
2189 * Returns:
2190 * 0 = success.
2191 */
2192 int
2193 qla2x00_nvram_config(scsi_qla_host_t *vha)
2194 {
2195 int rval;
2196 uint8_t chksum = 0;
2197 uint16_t cnt;
2198 uint8_t *dptr1, *dptr2;
2199 struct qla_hw_data *ha = vha->hw;
2200 init_cb_t *icb = ha->init_cb;
2201 nvram_t *nv = ha->nvram;
2202 uint8_t *ptr = ha->nvram;
2203 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2204
2205 rval = QLA_SUCCESS;
2206
2207 /* Determine NVRAM starting address. */
2208 ha->nvram_size = sizeof(nvram_t);
2209 ha->nvram_base = 0;
2210 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
2211 if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
2212 ha->nvram_base = 0x80;
2213
2214 /* Get NVRAM data and calculate checksum. */
2215 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
2216 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
2217 chksum += *ptr++;
2218
2219 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
2220 "Contents of NVRAM.\n");
2221 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
2222 (uint8_t *)nv, ha->nvram_size);
2223
2224 /* Bad NVRAM data, set defaults parameters. */
2225 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
2226 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
2227 /* Reset NVRAM data. */
2228 ql_log(ql_log_warn, vha, 0x0064,
2229 "Inconisistent NVRAM "
2230 "detected: checksum=0x%x id=%c version=0x%x.\n",
2231 chksum, nv->id[0], nv->nvram_version);
2232 ql_log(ql_log_warn, vha, 0x0065,
2233 "Falling back to "
2234 "functioning (yet invalid -- WWPN) defaults.\n");
2235
2236 /*
2237 * Set default initialization control block.
2238 */
2239 memset(nv, 0, ha->nvram_size);
2240 nv->parameter_block_version = ICB_VERSION;
2241
2242 if (IS_QLA23XX(ha)) {
2243 nv->firmware_options[0] = BIT_2 | BIT_1;
2244 nv->firmware_options[1] = BIT_7 | BIT_5;
2245 nv->add_firmware_options[0] = BIT_5;
2246 nv->add_firmware_options[1] = BIT_5 | BIT_4;
2247 nv->frame_payload_size = __constant_cpu_to_le16(2048);
2248 nv->special_options[1] = BIT_7;
2249 } else if (IS_QLA2200(ha)) {
2250 nv->firmware_options[0] = BIT_2 | BIT_1;
2251 nv->firmware_options[1] = BIT_7 | BIT_5;
2252 nv->add_firmware_options[0] = BIT_5;
2253 nv->add_firmware_options[1] = BIT_5 | BIT_4;
2254 nv->frame_payload_size = __constant_cpu_to_le16(1024);
2255 } else if (IS_QLA2100(ha)) {
2256 nv->firmware_options[0] = BIT_3 | BIT_1;
2257 nv->firmware_options[1] = BIT_5;
2258 nv->frame_payload_size = __constant_cpu_to_le16(1024);
2259 }
2260
2261 nv->max_iocb_allocation = __constant_cpu_to_le16(256);
2262 nv->execution_throttle = __constant_cpu_to_le16(16);
2263 nv->retry_count = 8;
2264 nv->retry_delay = 1;
2265
2266 nv->port_name[0] = 33;
2267 nv->port_name[3] = 224;
2268 nv->port_name[4] = 139;
2269
2270 qla2xxx_nvram_wwn_from_ofw(vha, nv);
2271
2272 nv->login_timeout = 4;
2273
2274 /*
2275 * Set default host adapter parameters
2276 */
2277 nv->host_p[1] = BIT_2;
2278 nv->reset_delay = 5;
2279 nv->port_down_retry_count = 8;
2280 nv->max_luns_per_target = __constant_cpu_to_le16(8);
2281 nv->link_down_timeout = 60;
2282
2283 rval = 1;
2284 }
2285
2286 #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
2287 /*
2288 * The SN2 does not provide BIOS emulation which means you can't change
2289 * potentially bogus BIOS settings. Force the use of default settings
2290 * for link rate and frame size. Hope that the rest of the settings
2291 * are valid.
2292 */
2293 if (ia64_platform_is("sn2")) {
2294 nv->frame_payload_size = __constant_cpu_to_le16(2048);
2295 if (IS_QLA23XX(ha))
2296 nv->special_options[1] = BIT_7;
2297 }
2298 #endif
2299
2300 /* Reset Initialization control block */
2301 memset(icb, 0, ha->init_cb_size);
2302
2303 /*
2304 * Setup driver NVRAM options.
2305 */
2306 nv->firmware_options[0] |= (BIT_6 | BIT_1);
2307 nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
2308 nv->firmware_options[1] |= (BIT_5 | BIT_0);
2309 nv->firmware_options[1] &= ~BIT_4;
2310
2311 if (IS_QLA23XX(ha)) {
2312 nv->firmware_options[0] |= BIT_2;
2313 nv->firmware_options[0] &= ~BIT_3;
2314 nv->firmware_options[0] &= ~BIT_6;
2315 nv->add_firmware_options[1] |= BIT_5 | BIT_4;
2316
2317 if (IS_QLA2300(ha)) {
2318 if (ha->fb_rev == FPM_2310) {
2319 strcpy(ha->model_number, "QLA2310");
2320 } else {
2321 strcpy(ha->model_number, "QLA2300");
2322 }
2323 } else {
2324 qla2x00_set_model_info(vha, nv->model_number,
2325 sizeof(nv->model_number), "QLA23xx");
2326 }
2327 } else if (IS_QLA2200(ha)) {
2328 nv->firmware_options[0] |= BIT_2;
2329 /*
2330 * 'Point-to-point preferred, else loop' is not a safe
2331 * connection mode setting.
2332 */
2333 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
2334 (BIT_5 | BIT_4)) {
2335 /* Force 'loop preferred, else point-to-point'. */
2336 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
2337 nv->add_firmware_options[0] |= BIT_5;
2338 }
2339 strcpy(ha->model_number, "QLA22xx");
2340 } else /*if (IS_QLA2100(ha))*/ {
2341 strcpy(ha->model_number, "QLA2100");
2342 }
2343
2344 /*
2345 * Copy over NVRAM RISC parameter block to initialization control block.
2346 */
2347 dptr1 = (uint8_t *)icb;
2348 dptr2 = (uint8_t *)&nv->parameter_block_version;
2349 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
2350 while (cnt--)
2351 *dptr1++ = *dptr2++;
2352
2353 /* Copy 2nd half. */
2354 dptr1 = (uint8_t *)icb->add_firmware_options;
2355 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
2356 while (cnt--)
2357 *dptr1++ = *dptr2++;
2358
2359 /* Use alternate WWN? */
2360 if (nv->host_p[1] & BIT_7) {
2361 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
2362 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
2363 }
2364
2365 /* Prepare nodename */
2366 if ((icb->firmware_options[1] & BIT_6) == 0) {
2367 /*
2368 * Firmware will apply the following mask if the nodename was
2369 * not provided.
2370 */
2371 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
2372 icb->node_name[0] &= 0xF0;
2373 }
2374
2375 /*
2376 * Set host adapter parameters.
2377 */
2378
2379 /*
2380 * BIT_7 in the host-parameters section allows for modification to
2381 * internal driver logging.
2382 */
2383 if (nv->host_p[0] & BIT_7)
2384 ql2xextended_error_logging = 0x7fffffff;
2385 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
2386 /* Always load RISC code on non ISP2[12]00 chips. */
2387 if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
2388 ha->flags.disable_risc_code_load = 0;
2389 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
2390 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
2391 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
2392 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
2393 ha->flags.disable_serdes = 0;
2394
2395 ha->operating_mode =
2396 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
2397
2398 memcpy(ha->fw_seriallink_options, nv->seriallink_options,
2399 sizeof(ha->fw_seriallink_options));
2400
2401 /* save HBA serial number */
2402 ha->serial0 = icb->port_name[5];
2403 ha->serial1 = icb->port_name[6];
2404 ha->serial2 = icb->port_name[7];
2405 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
2406 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
2407
2408 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
2409
2410 ha->retry_count = nv->retry_count;
2411
2412 /* Set minimum login_timeout to 4 seconds. */
2413 if (nv->login_timeout != ql2xlogintimeout)
2414 nv->login_timeout = ql2xlogintimeout;
2415 if (nv->login_timeout < 4)
2416 nv->login_timeout = 4;
2417 ha->login_timeout = nv->login_timeout;
2418 icb->login_timeout = nv->login_timeout;
2419
2420 /* Set minimum RATOV to 100 tenths of a second. */
2421 ha->r_a_tov = 100;
2422
2423 ha->loop_reset_delay = nv->reset_delay;
2424
2425 /* Link Down Timeout = 0:
2426 *
2427 * When Port Down timer expires we will start returning
2428 * I/O's to OS with "DID_NO_CONNECT".
2429 *
2430 * Link Down Timeout != 0:
2431 *
2432 * The driver waits for the link to come up after link down
2433 * before returning I/Os to OS with "DID_NO_CONNECT".
2434 */
2435 if (nv->link_down_timeout == 0) {
2436 ha->loop_down_abort_time =
2437 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
2438 } else {
2439 ha->link_down_timeout = nv->link_down_timeout;
2440 ha->loop_down_abort_time =
2441 (LOOP_DOWN_TIME - ha->link_down_timeout);
2442 }
2443
2444 /*
2445 * Need enough time to try and get the port back.
2446 */
2447 ha->port_down_retry_count = nv->port_down_retry_count;
2448 if (qlport_down_retry)
2449 ha->port_down_retry_count = qlport_down_retry;
2450 /* Set login_retry_count */
2451 ha->login_retry_count = nv->retry_count;
2452 if (ha->port_down_retry_count == nv->port_down_retry_count &&
2453 ha->port_down_retry_count > 3)
2454 ha->login_retry_count = ha->port_down_retry_count;
2455 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
2456 ha->login_retry_count = ha->port_down_retry_count;
2457 if (ql2xloginretrycount)
2458 ha->login_retry_count = ql2xloginretrycount;
2459
2460 icb->lun_enables = __constant_cpu_to_le16(0);
2461 icb->command_resource_count = 0;
2462 icb->immediate_notify_resource_count = 0;
2463 icb->timeout = __constant_cpu_to_le16(0);
2464
2465 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
2466 /* Enable RIO */
2467 icb->firmware_options[0] &= ~BIT_3;
2468 icb->add_firmware_options[0] &=
2469 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
2470 icb->add_firmware_options[0] |= BIT_2;
2471 icb->response_accumulation_timer = 3;
2472 icb->interrupt_delay_timer = 5;
2473
2474 vha->flags.process_response_queue = 1;
2475 } else {
2476 /* Enable ZIO. */
2477 if (!vha->flags.init_done) {
2478 ha->zio_mode = icb->add_firmware_options[0] &
2479 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
2480 ha->zio_timer = icb->interrupt_delay_timer ?
2481 icb->interrupt_delay_timer: 2;
2482 }
2483 icb->add_firmware_options[0] &=
2484 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
2485 vha->flags.process_response_queue = 0;
2486 if (ha->zio_mode != QLA_ZIO_DISABLED) {
2487 ha->zio_mode = QLA_ZIO_MODE_6;
2488
2489 ql_log(ql_log_info, vha, 0x0068,
2490 "ZIO mode %d enabled; timer delay (%d us).\n",
2491 ha->zio_mode, ha->zio_timer * 100);
2492
2493 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
2494 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
2495 vha->flags.process_response_queue = 1;
2496 }
2497 }
2498
2499 if (rval) {
2500 ql_log(ql_log_warn, vha, 0x0069,
2501 "NVRAM configuration failed.\n");
2502 }
2503 return (rval);
2504 }
2505
2506 static void
2507 qla2x00_rport_del(void *data)
2508 {
2509 fc_port_t *fcport = data;
2510 struct fc_rport *rport;
2511 unsigned long flags;
2512
2513 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
2514 rport = fcport->drport ? fcport->drport: fcport->rport;
2515 fcport->drport = NULL;
2516 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
2517 if (rport)
2518 fc_remote_port_delete(rport);
2519 }
2520
2521 /**
2522 * qla2x00_alloc_fcport() - Allocate a generic fcport.
2523 * @ha: HA context
2524 * @flags: allocation flags
2525 *
2526 * Returns a pointer to the allocated fcport, or NULL, if none available.
2527 */
2528 fc_port_t *
2529 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
2530 {
2531 fc_port_t *fcport;
2532
2533 fcport = kzalloc(sizeof(fc_port_t), flags);
2534 if (!fcport)
2535 return NULL;
2536
2537 /* Setup fcport template structure. */
2538 fcport->vha = vha;
2539 fcport->vp_idx = vha->vp_idx;
2540 fcport->port_type = FCT_UNKNOWN;
2541 fcport->loop_id = FC_NO_LOOP_ID;
2542 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);
2543 fcport->supported_classes = FC_COS_UNSPECIFIED;
2544
2545 return fcport;
2546 }
2547
2548 /*
2549 * qla2x00_configure_loop
2550 * Updates Fibre Channel Device Database with what is actually on loop.
2551 *
2552 * Input:
2553 * ha = adapter block pointer.
2554 *
2555 * Returns:
2556 * 0 = success.
2557 * 1 = error.
2558 * 2 = database was full and device was not configured.
2559 */
2560 static int
2561 qla2x00_configure_loop(scsi_qla_host_t *vha)
2562 {
2563 int rval;
2564 unsigned long flags, save_flags;
2565 struct qla_hw_data *ha = vha->hw;
2566 rval = QLA_SUCCESS;
2567
2568 /* Get Initiator ID */
2569 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
2570 rval = qla2x00_configure_hba(vha);
2571 if (rval != QLA_SUCCESS) {
2572 ql_dbg(ql_dbg_disc, vha, 0x2013,
2573 "Unable to configure HBA.\n");
2574 return (rval);
2575 }
2576 }
2577
2578 save_flags = flags = vha->dpc_flags;
2579 ql_dbg(ql_dbg_disc, vha, 0x2014,
2580 "Configure loop -- dpc flags = 0x%lx.\n", flags);
2581
2582 /*
2583 * If we have both an RSCN and PORT UPDATE pending then handle them
2584 * both at the same time.
2585 */
2586 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2587 clear_bit(RSCN_UPDATE, &vha->dpc_flags);
2588
2589 qla2x00_get_data_rate(vha);
2590
2591 /* Determine what we need to do */
2592 if (ha->current_topology == ISP_CFG_FL &&
2593 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
2594
2595 vha->flags.rscn_queue_overflow = 1;
2596 set_bit(RSCN_UPDATE, &flags);
2597
2598 } else if (ha->current_topology == ISP_CFG_F &&
2599 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
2600
2601 vha->flags.rscn_queue_overflow = 1;
2602 set_bit(RSCN_UPDATE, &flags);
2603 clear_bit(LOCAL_LOOP_UPDATE, &flags);
2604
2605 } else if (ha->current_topology == ISP_CFG_N) {
2606 clear_bit(RSCN_UPDATE, &flags);
2607
2608 } else if (!vha->flags.online ||
2609 (test_bit(ABORT_ISP_ACTIVE, &flags))) {
2610
2611 vha->flags.rscn_queue_overflow = 1;
2612 set_bit(RSCN_UPDATE, &flags);
2613 set_bit(LOCAL_LOOP_UPDATE, &flags);
2614 }
2615
2616 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
2617 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
2618 ql_dbg(ql_dbg_disc, vha, 0x2015,
2619 "Loop resync needed, failing.\n");
2620 rval = QLA_FUNCTION_FAILED;
2621 }
2622 else
2623 rval = qla2x00_configure_local_loop(vha);
2624 }
2625
2626 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
2627 if (LOOP_TRANSITION(vha)) {
2628 ql_dbg(ql_dbg_disc, vha, 0x201e,
2629 "Needs RSCN update and loop transition.\n");
2630 rval = QLA_FUNCTION_FAILED;
2631 }
2632 else
2633 rval = qla2x00_configure_fabric(vha);
2634 }
2635
2636 if (rval == QLA_SUCCESS) {
2637 if (atomic_read(&vha->loop_down_timer) ||
2638 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
2639 rval = QLA_FUNCTION_FAILED;
2640 } else {
2641 atomic_set(&vha->loop_state, LOOP_READY);
2642 ql_dbg(ql_dbg_disc, vha, 0x2069,
2643 "LOOP READY.\n");
2644 }
2645 }
2646
2647 if (rval) {
2648 ql_dbg(ql_dbg_disc, vha, 0x206a,
2649 "%s *** FAILED ***.\n", __func__);
2650 } else {
2651 ql_dbg(ql_dbg_disc, vha, 0x206b,
2652 "%s: exiting normally.\n", __func__);
2653 }
2654
2655 /* Restore state if a resync event occurred during processing */
2656 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
2657 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
2658 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2659 if (test_bit(RSCN_UPDATE, &save_flags)) {
2660 set_bit(RSCN_UPDATE, &vha->dpc_flags);
2661 if (!IS_ALOGIO_CAPABLE(ha))
2662 vha->flags.rscn_queue_overflow = 1;
2663 }
2664 }
2665
2666 return (rval);
2667 }
2668
2669
2670
2671 /*
2672 * qla2x00_configure_local_loop
2673 * Updates Fibre Channel Device Database with local loop devices.
2674 *
2675 * Input:
2676 * ha = adapter block pointer.
2677 *
2678 * Returns:
2679 * 0 = success.
2680 */
2681 static int
2682 qla2x00_configure_local_loop(scsi_qla_host_t *vha)
2683 {
2684 int rval, rval2;
2685 int found_devs;
2686 int found;
2687 fc_port_t *fcport, *new_fcport;
2688
2689 uint16_t index;
2690 uint16_t entries;
2691 char *id_iter;
2692 uint16_t loop_id;
2693 uint8_t domain, area, al_pa;
2694 struct qla_hw_data *ha = vha->hw;
2695
2696 found_devs = 0;
2697 new_fcport = NULL;
2698 entries = MAX_FIBRE_DEVICES;
2699
2700 ql_dbg(ql_dbg_disc, vha, 0x2016,
2701 "Getting FCAL position map.\n");
2702 if (ql2xextended_error_logging & ql_dbg_disc)
2703 qla2x00_get_fcal_position_map(vha, NULL);
2704
2705 /* Get list of logged in devices. */
2706 memset(ha->gid_list, 0, GID_LIST_SIZE);
2707 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
2708 &entries);
2709 if (rval != QLA_SUCCESS)
2710 goto cleanup_allocation;
2711
2712 ql_dbg(ql_dbg_disc, vha, 0x2017,
2713 "Entries in ID list (%d).\n", entries);
2714 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
2715 (uint8_t *)ha->gid_list,
2716 entries * sizeof(struct gid_list_info));
2717
2718 /* Allocate temporary fcport for any new fcports discovered. */
2719 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
2720 if (new_fcport == NULL) {
2721 ql_log(ql_log_warn, vha, 0x2018,
2722 "Memory allocation failed for fcport.\n");
2723 rval = QLA_MEMORY_ALLOC_FAILED;
2724 goto cleanup_allocation;
2725 }
2726 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
2727
2728 /*
2729 * Mark local devices that were present with FCF_DEVICE_LOST for now.
2730 */
2731 list_for_each_entry(fcport, &vha->vp_fcports, list) {
2732 if (atomic_read(&fcport->state) == FCS_ONLINE &&
2733 fcport->port_type != FCT_BROADCAST &&
2734 (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
2735
2736 ql_dbg(ql_dbg_disc, vha, 0x2019,
2737 "Marking port lost loop_id=0x%04x.\n",
2738 fcport->loop_id);
2739
2740 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
2741 }
2742 }
2743
2744 /* Add devices to port list. */
2745 id_iter = (char *)ha->gid_list;
2746 for (index = 0; index < entries; index++) {
2747 domain = ((struct gid_list_info *)id_iter)->domain;
2748 area = ((struct gid_list_info *)id_iter)->area;
2749 al_pa = ((struct gid_list_info *)id_iter)->al_pa;
2750 if (IS_QLA2100(ha) || IS_QLA2200(ha))
2751 loop_id = (uint16_t)
2752 ((struct gid_list_info *)id_iter)->loop_id_2100;
2753 else
2754 loop_id = le16_to_cpu(
2755 ((struct gid_list_info *)id_iter)->loop_id);
2756 id_iter += ha->gid_list_info_size;
2757
2758 /* Bypass reserved domain fields. */
2759 if ((domain & 0xf0) == 0xf0)
2760 continue;
2761
2762 /* Bypass if not same domain and area of adapter. */
2763 if (area && domain &&
2764 (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
2765 continue;
2766
2767 /* Bypass invalid local loop ID. */
2768 if (loop_id > LAST_LOCAL_LOOP_ID)
2769 continue;
2770
2771 /* Fill in member data. */
2772 new_fcport->d_id.b.domain = domain;
2773 new_fcport->d_id.b.area = area;
2774 new_fcport->d_id.b.al_pa = al_pa;
2775 new_fcport->loop_id = loop_id;
2776 new_fcport->vp_idx = vha->vp_idx;
2777 rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
2778 if (rval2 != QLA_SUCCESS) {
2779 ql_dbg(ql_dbg_disc, vha, 0x201a,
2780 "Failed to retrieve fcport information "
2781 "-- get_port_database=%x, loop_id=0x%04x.\n",
2782 rval2, new_fcport->loop_id);
2783 ql_dbg(ql_dbg_disc, vha, 0x201b,
2784 "Scheduling resync.\n");
2785 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2786 continue;
2787 }
2788
2789 /* Check for matching device in port list. */
2790 found = 0;
2791 fcport = NULL;
2792 list_for_each_entry(fcport, &vha->vp_fcports, list) {
2793 if (memcmp(new_fcport->port_name, fcport->port_name,
2794 WWN_SIZE))
2795 continue;
2796
2797 fcport->flags &= ~FCF_FABRIC_DEVICE;
2798 fcport->loop_id = new_fcport->loop_id;
2799 fcport->port_type = new_fcport->port_type;
2800 fcport->d_id.b24 = new_fcport->d_id.b24;
2801 memcpy(fcport->node_name, new_fcport->node_name,
2802 WWN_SIZE);
2803
2804 found++;
2805 break;
2806 }
2807
2808 if (!found) {
2809 /* New device, add to fcports list. */
2810 if (vha->vp_idx) {
2811 new_fcport->vha = vha;
2812 new_fcport->vp_idx = vha->vp_idx;
2813 }
2814 list_add_tail(&new_fcport->list, &vha->vp_fcports);
2815
2816 /* Allocate a new replacement fcport. */
2817 fcport = new_fcport;
2818 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
2819 if (new_fcport == NULL) {
2820 ql_log(ql_log_warn, vha, 0x201c,
2821 "Failed to allocate memory for fcport.\n");
2822 rval = QLA_MEMORY_ALLOC_FAILED;
2823 goto cleanup_allocation;
2824 }
2825 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
2826 }
2827
2828 /* Base iIDMA settings on HBA port speed. */
2829 fcport->fp_speed = ha->link_data_rate;
2830
2831 qla2x00_update_fcport(vha, fcport);
2832
2833 found_devs++;
2834 }
2835
2836 cleanup_allocation:
2837 kfree(new_fcport);
2838
2839 if (rval != QLA_SUCCESS) {
2840 ql_dbg(ql_dbg_disc, vha, 0x201d,
2841 "Configure local loop error exit: rval=%x.\n", rval);
2842 }
2843
2844 return (rval);
2845 }
2846
2847 static void
2848 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
2849 {
2850 #define LS_UNKNOWN 2
2851 static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" };
2852 char *link_speed;
2853 int rval;
2854 uint16_t mb[4];
2855 struct qla_hw_data *ha = vha->hw;
2856
2857 if (!IS_IIDMA_CAPABLE(ha))
2858 return;
2859
2860 if (atomic_read(&fcport->state) != FCS_ONLINE)
2861 return;
2862
2863 if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
2864 fcport->fp_speed > ha->link_data_rate)
2865 return;
2866
2867 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
2868 mb);
2869 if (rval != QLA_SUCCESS) {
2870 ql_dbg(ql_dbg_disc, vha, 0x2004,
2871 "Unable to adjust iIDMA "
2872 "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x "
2873 "%04x.\n", fcport->port_name[0], fcport->port_name[1],
2874 fcport->port_name[2], fcport->port_name[3],
2875 fcport->port_name[4], fcport->port_name[5],
2876 fcport->port_name[6], fcport->port_name[7], rval,
2877 fcport->fp_speed, mb[0], mb[1]);
2878 } else {
2879 link_speed = link_speeds[LS_UNKNOWN];
2880 if (fcport->fp_speed < 5)
2881 link_speed = link_speeds[fcport->fp_speed];
2882 else if (fcport->fp_speed == 0x13)
2883 link_speed = link_speeds[5];
2884 ql_dbg(ql_dbg_disc, vha, 0x2005,
2885 "iIDMA adjusted to %s GB/s "
2886 "on %02x%02x%02x%02x%02x%02x%02x%02x.\n", link_speed,
2887 fcport->port_name[0], fcport->port_name[1],
2888 fcport->port_name[2], fcport->port_name[3],
2889 fcport->port_name[4], fcport->port_name[5],
2890 fcport->port_name[6], fcport->port_name[7]);
2891 }
2892 }
2893
2894 static void
2895 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
2896 {
2897 struct fc_rport_identifiers rport_ids;
2898 struct fc_rport *rport;
2899 unsigned long flags;
2900
2901 qla2x00_rport_del(fcport);
2902
2903 rport_ids.node_name = wwn_to_u64(fcport->node_name);
2904 rport_ids.port_name = wwn_to_u64(fcport->port_name);
2905 rport_ids.port_id = fcport->d_id.b.domain << 16 |
2906 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
2907 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
2908 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
2909 if (!rport) {
2910 ql_log(ql_log_warn, vha, 0x2006,
2911 "Unable to allocate fc remote port.\n");
2912 return;
2913 }
2914 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
2915 *((fc_port_t **)rport->dd_data) = fcport;
2916 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
2917
2918 rport->supported_classes = fcport->supported_classes;
2919
2920 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
2921 if (fcport->port_type == FCT_INITIATOR)
2922 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
2923 if (fcport->port_type == FCT_TARGET)
2924 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
2925 fc_remote_port_rolechg(rport, rport_ids.roles);
2926 }
2927
2928 /*
2929 * qla2x00_update_fcport
2930 * Updates device on list.
2931 *
2932 * Input:
2933 * ha = adapter block pointer.
2934 * fcport = port structure pointer.
2935 *
2936 * Return:
2937 * 0 - Success
2938 * BIT_0 - error
2939 *
2940 * Context:
2941 * Kernel context.
2942 */
2943 void
2944 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
2945 {
2946 fcport->vha = vha;
2947 fcport->login_retry = 0;
2948 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
2949
2950 qla2x00_iidma_fcport(vha, fcport);
2951 qla24xx_update_fcport_fcp_prio(vha, fcport);
2952 qla2x00_reg_remote_port(vha, fcport);
2953 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
2954 }
2955
2956 /*
2957 * qla2x00_configure_fabric
2958 * Setup SNS devices with loop ID's.
2959 *
2960 * Input:
2961 * ha = adapter block pointer.
2962 *
2963 * Returns:
2964 * 0 = success.
2965 * BIT_0 = error
2966 */
2967 static int
2968 qla2x00_configure_fabric(scsi_qla_host_t *vha)
2969 {
2970 int rval, rval2;
2971 fc_port_t *fcport, *fcptemp;
2972 uint16_t next_loopid;
2973 uint16_t mb[MAILBOX_REGISTER_COUNT];
2974 uint16_t loop_id;
2975 LIST_HEAD(new_fcports);
2976 struct qla_hw_data *ha = vha->hw;
2977 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
2978
2979 /* If FL port exists, then SNS is present */
2980 if (IS_FWI2_CAPABLE(ha))
2981 loop_id = NPH_F_PORT;
2982 else
2983 loop_id = SNS_FL_PORT;
2984 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
2985 if (rval != QLA_SUCCESS) {
2986 ql_dbg(ql_dbg_disc, vha, 0x201f,
2987 "MBX_GET_PORT_NAME failed, No FL Port.\n");
2988
2989 vha->device_flags &= ~SWITCH_FOUND;
2990 return (QLA_SUCCESS);
2991 }
2992 vha->device_flags |= SWITCH_FOUND;
2993
2994 /* Mark devices that need re-synchronization. */
2995 rval2 = qla2x00_device_resync(vha);
2996 if (rval2 == QLA_RSCNS_HANDLED) {
2997 /* No point doing the scan, just continue. */
2998 return (QLA_SUCCESS);
2999 }
3000 do {
3001 /* FDMI support. */
3002 if (ql2xfdmienable &&
3003 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
3004 qla2x00_fdmi_register(vha);
3005
3006 /* Ensure we are logged into the SNS. */
3007 if (IS_FWI2_CAPABLE(ha))
3008 loop_id = NPH_SNS;
3009 else
3010 loop_id = SIMPLE_NAME_SERVER;
3011 ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
3012 0xfc, mb, BIT_1 | BIT_0);
3013 if (mb[0] != MBS_COMMAND_COMPLETE) {
3014 ql_dbg(ql_dbg_disc, vha, 0x2042,
3015 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x "
3016 "mb[6]=%x mb[7]=%x.\n", loop_id, mb[0], mb[1],
3017 mb[2], mb[6], mb[7]);
3018 return (QLA_SUCCESS);
3019 }
3020
3021 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
3022 if (qla2x00_rft_id(vha)) {
3023 /* EMPTY */
3024 ql_dbg(ql_dbg_disc, vha, 0x2045,
3025 "Register FC-4 TYPE failed.\n");
3026 }
3027 if (qla2x00_rff_id(vha)) {
3028 /* EMPTY */
3029 ql_dbg(ql_dbg_disc, vha, 0x2049,
3030 "Register FC-4 Features failed.\n");
3031 }
3032 if (qla2x00_rnn_id(vha)) {
3033 /* EMPTY */
3034 ql_dbg(ql_dbg_disc, vha, 0x204f,
3035 "Register Node Name failed.\n");
3036 } else if (qla2x00_rsnn_nn(vha)) {
3037 /* EMPTY */
3038 ql_dbg(ql_dbg_disc, vha, 0x2053,
3039 "Register Symobilic Node Name failed.\n");
3040 }
3041 }
3042
3043 rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
3044 if (rval != QLA_SUCCESS)
3045 break;
3046
3047 /*
3048 * Logout all previous fabric devices marked lost, except
3049 * FCP2 devices.
3050 */
3051 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3052 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3053 break;
3054
3055 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
3056 continue;
3057
3058 if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
3059 qla2x00_mark_device_lost(vha, fcport,
3060 ql2xplogiabsentdevice, 0);
3061 if (fcport->loop_id != FC_NO_LOOP_ID &&
3062 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
3063 fcport->port_type != FCT_INITIATOR &&
3064 fcport->port_type != FCT_BROADCAST) {
3065 ha->isp_ops->fabric_logout(vha,
3066 fcport->loop_id,
3067 fcport->d_id.b.domain,
3068 fcport->d_id.b.area,
3069 fcport->d_id.b.al_pa);
3070 fcport->loop_id = FC_NO_LOOP_ID;
3071 }
3072 }
3073 }
3074
3075 /* Starting free loop ID. */
3076 next_loopid = ha->min_external_loopid;
3077
3078 /*
3079 * Scan through our port list and login entries that need to be
3080 * logged in.
3081 */
3082 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3083 if (atomic_read(&vha->loop_down_timer) ||
3084 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3085 break;
3086
3087 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
3088 (fcport->flags & FCF_LOGIN_NEEDED) == 0)
3089 continue;
3090
3091 if (fcport->loop_id == FC_NO_LOOP_ID) {
3092 fcport->loop_id = next_loopid;
3093 rval = qla2x00_find_new_loop_id(
3094 base_vha, fcport);
3095 if (rval != QLA_SUCCESS) {
3096 /* Ran out of IDs to use */
3097 break;
3098 }
3099 }
3100 /* Login and update database */
3101 qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
3102 }
3103
3104 /* Exit if out of loop IDs. */
3105 if (rval != QLA_SUCCESS) {
3106 break;
3107 }
3108
3109 /*
3110 * Login and add the new devices to our port list.
3111 */
3112 list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
3113 if (atomic_read(&vha->loop_down_timer) ||
3114 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3115 break;
3116
3117 /* Find a new loop ID to use. */
3118 fcport->loop_id = next_loopid;
3119 rval = qla2x00_find_new_loop_id(base_vha, fcport);
3120 if (rval != QLA_SUCCESS) {
3121 /* Ran out of IDs to use */
3122 break;
3123 }
3124
3125 /* Login and update database */
3126 qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
3127
3128 if (vha->vp_idx) {
3129 fcport->vha = vha;
3130 fcport->vp_idx = vha->vp_idx;
3131 }
3132 list_move_tail(&fcport->list, &vha->vp_fcports);
3133 }
3134 } while (0);
3135
3136 /* Free all new device structures not processed. */
3137 list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
3138 list_del(&fcport->list);
3139 kfree(fcport);
3140 }
3141
3142 if (rval) {
3143 ql_dbg(ql_dbg_disc, vha, 0x2068,
3144 "Configure fabric error exit rval=%d.\n", rval);
3145 }
3146
3147 return (rval);
3148 }
3149
3150 /*
3151 * qla2x00_find_all_fabric_devs
3152 *
3153 * Input:
3154 * ha = adapter block pointer.
3155 * dev = database device entry pointer.
3156 *
3157 * Returns:
3158 * 0 = success.
3159 *
3160 * Context:
3161 * Kernel context.
3162 */
3163 static int
3164 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
3165 struct list_head *new_fcports)
3166 {
3167 int rval;
3168 uint16_t loop_id;
3169 fc_port_t *fcport, *new_fcport, *fcptemp;
3170 int found;
3171
3172 sw_info_t *swl;
3173 int swl_idx;
3174 int first_dev, last_dev;
3175 port_id_t wrap = {}, nxt_d_id;
3176 struct qla_hw_data *ha = vha->hw;
3177 struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
3178 struct scsi_qla_host *tvp;
3179
3180 rval = QLA_SUCCESS;
3181
3182 /* Try GID_PT to get device list, else GAN. */
3183 swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
3184 if (!swl) {
3185 /*EMPTY*/
3186 ql_dbg(ql_dbg_disc, vha, 0x2054,
3187 "GID_PT allocations failed, fallback on GA_NXT.\n");
3188 } else {
3189 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
3190 kfree(swl);
3191 swl = NULL;
3192 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
3193 kfree(swl);
3194 swl = NULL;
3195 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
3196 kfree(swl);
3197 swl = NULL;
3198 } else if (ql2xiidmaenable &&
3199 qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
3200 qla2x00_gpsc(vha, swl);
3201 }
3202
3203 /* If other queries succeeded probe for FC-4 type */
3204 if (swl)
3205 qla2x00_gff_id(vha, swl);
3206 }
3207 swl_idx = 0;
3208
3209 /* Allocate temporary fcport for any new fcports discovered. */
3210 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
3211 if (new_fcport == NULL) {
3212 ql_log(ql_log_warn, vha, 0x205e,
3213 "Failed to allocate memory for fcport.\n");
3214 kfree(swl);
3215 return (QLA_MEMORY_ALLOC_FAILED);
3216 }
3217 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
3218 /* Set start port ID scan at adapter ID. */
3219 first_dev = 1;
3220 last_dev = 0;
3221
3222 /* Starting free loop ID. */
3223 loop_id = ha->min_external_loopid;
3224 for (; loop_id <= ha->max_loop_id; loop_id++) {
3225 if (qla2x00_is_reserved_id(vha, loop_id))
3226 continue;
3227
3228 if (ha->current_topology == ISP_CFG_FL &&
3229 (atomic_read(&vha->loop_down_timer) ||
3230 LOOP_TRANSITION(vha))) {
3231 atomic_set(&vha->loop_down_timer, 0);
3232 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
3233 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
3234 break;
3235 }
3236
3237 if (swl != NULL) {
3238 if (last_dev) {
3239 wrap.b24 = new_fcport->d_id.b24;
3240 } else {
3241 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
3242 memcpy(new_fcport->node_name,
3243 swl[swl_idx].node_name, WWN_SIZE);
3244 memcpy(new_fcport->port_name,
3245 swl[swl_idx].port_name, WWN_SIZE);
3246 memcpy(new_fcport->fabric_port_name,
3247 swl[swl_idx].fabric_port_name, WWN_SIZE);
3248 new_fcport->fp_speed = swl[swl_idx].fp_speed;
3249 new_fcport->fc4_type = swl[swl_idx].fc4_type;
3250
3251 if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
3252 last_dev = 1;
3253 }
3254 swl_idx++;
3255 }
3256 } else {
3257 /* Send GA_NXT to the switch */
3258 rval = qla2x00_ga_nxt(vha, new_fcport);
3259 if (rval != QLA_SUCCESS) {
3260 ql_log(ql_log_warn, vha, 0x2064,
3261 "SNS scan failed -- assuming "
3262 "zero-entry result.\n");
3263 list_for_each_entry_safe(fcport, fcptemp,
3264 new_fcports, list) {
3265 list_del(&fcport->list);
3266 kfree(fcport);
3267 }
3268 rval = QLA_SUCCESS;
3269 break;
3270 }
3271 }
3272
3273 /* If wrap on switch device list, exit. */
3274 if (first_dev) {
3275 wrap.b24 = new_fcport->d_id.b24;
3276 first_dev = 0;
3277 } else if (new_fcport->d_id.b24 == wrap.b24) {
3278 ql_dbg(ql_dbg_disc, vha, 0x2065,
3279 "Device wrap (%02x%02x%02x).\n",
3280 new_fcport->d_id.b.domain,
3281 new_fcport->d_id.b.area,
3282 new_fcport->d_id.b.al_pa);
3283 break;
3284 }
3285
3286 /* Bypass if same physical adapter. */
3287 if (new_fcport->d_id.b24 == base_vha->d_id.b24)
3288 continue;
3289
3290 /* Bypass virtual ports of the same host. */
3291 found = 0;
3292 if (ha->num_vhosts) {
3293 unsigned long flags;
3294
3295 spin_lock_irqsave(&ha->vport_slock, flags);
3296 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
3297 if (new_fcport->d_id.b24 == vp->d_id.b24) {
3298 found = 1;
3299 break;
3300 }
3301 }
3302 spin_unlock_irqrestore(&ha->vport_slock, flags);
3303
3304 if (found)
3305 continue;
3306 }
3307
3308 /* Bypass if same domain and area of adapter. */
3309 if (((new_fcport->d_id.b24 & 0xffff00) ==
3310 (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
3311 ISP_CFG_FL)
3312 continue;
3313
3314 /* Bypass reserved domain fields. */
3315 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
3316 continue;
3317
3318 /* Bypass ports whose FCP-4 type is not FCP_SCSI */
3319 if (ql2xgffidenable &&
3320 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI &&
3321 new_fcport->fc4_type != FC4_TYPE_UNKNOWN))
3322 continue;
3323
3324 /* Locate matching device in database. */
3325 found = 0;
3326 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3327 if (memcmp(new_fcport->port_name, fcport->port_name,
3328 WWN_SIZE))
3329 continue;
3330
3331 found++;
3332
3333 /* Update port state. */
3334 memcpy(fcport->fabric_port_name,
3335 new_fcport->fabric_port_name, WWN_SIZE);
3336 fcport->fp_speed = new_fcport->fp_speed;
3337
3338 /*
3339 * If address the same and state FCS_ONLINE, nothing
3340 * changed.
3341 */
3342 if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
3343 atomic_read(&fcport->state) == FCS_ONLINE) {
3344 break;
3345 }
3346
3347 /*
3348 * If device was not a fabric device before.
3349 */
3350 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
3351 fcport->d_id.b24 = new_fcport->d_id.b24;
3352 fcport->loop_id = FC_NO_LOOP_ID;
3353 fcport->flags |= (FCF_FABRIC_DEVICE |
3354 FCF_LOGIN_NEEDED);
3355 break;
3356 }
3357
3358 /*
3359 * Port ID changed or device was marked to be updated;
3360 * Log it out if still logged in and mark it for
3361 * relogin later.
3362 */
3363 fcport->d_id.b24 = new_fcport->d_id.b24;
3364 fcport->flags |= FCF_LOGIN_NEEDED;
3365 if (fcport->loop_id != FC_NO_LOOP_ID &&
3366 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
3367 fcport->port_type != FCT_INITIATOR &&
3368 fcport->port_type != FCT_BROADCAST) {
3369 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
3370 fcport->d_id.b.domain, fcport->d_id.b.area,
3371 fcport->d_id.b.al_pa);
3372 fcport->loop_id = FC_NO_LOOP_ID;
3373 }
3374
3375 break;
3376 }
3377
3378 if (found)
3379 continue;
3380 /* If device was not in our fcports list, then add it. */
3381 list_add_tail(&new_fcport->list, new_fcports);
3382
3383 /* Allocate a new replacement fcport. */
3384 nxt_d_id.b24 = new_fcport->d_id.b24;
3385 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
3386 if (new_fcport == NULL) {
3387 ql_log(ql_log_warn, vha, 0x2066,
3388 "Memory allocation failed for fcport.\n");
3389 kfree(swl);
3390 return (QLA_MEMORY_ALLOC_FAILED);
3391 }
3392 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
3393 new_fcport->d_id.b24 = nxt_d_id.b24;
3394 }
3395
3396 kfree(swl);
3397 kfree(new_fcport);
3398
3399 return (rval);
3400 }
3401
3402 /*
3403 * qla2x00_find_new_loop_id
3404 * Scan through our port list and find a new usable loop ID.
3405 *
3406 * Input:
3407 * ha: adapter state pointer.
3408 * dev: port structure pointer.
3409 *
3410 * Returns:
3411 * qla2x00 local function return status code.
3412 *
3413 * Context:
3414 * Kernel context.
3415 */
3416 int
3417 qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
3418 {
3419 int rval;
3420 int found;
3421 fc_port_t *fcport;
3422 uint16_t first_loop_id;
3423 struct qla_hw_data *ha = vha->hw;
3424 struct scsi_qla_host *vp;
3425 struct scsi_qla_host *tvp;
3426 unsigned long flags = 0;
3427
3428 rval = QLA_SUCCESS;
3429
3430 /* Save starting loop ID. */
3431 first_loop_id = dev->loop_id;
3432
3433 for (;;) {
3434 /* Skip loop ID if already used by adapter. */
3435 if (dev->loop_id == vha->loop_id)
3436 dev->loop_id++;
3437
3438 /* Skip reserved loop IDs. */
3439 while (qla2x00_is_reserved_id(vha, dev->loop_id))
3440 dev->loop_id++;
3441
3442 /* Reset loop ID if passed the end. */
3443 if (dev->loop_id > ha->max_loop_id) {
3444 /* first loop ID. */
3445 dev->loop_id = ha->min_external_loopid;
3446 }
3447
3448 /* Check for loop ID being already in use. */
3449 found = 0;
3450 fcport = NULL;
3451
3452 spin_lock_irqsave(&ha->vport_slock, flags);
3453 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
3454 list_for_each_entry(fcport, &vp->vp_fcports, list) {
3455 if (fcport->loop_id == dev->loop_id &&
3456 fcport != dev) {
3457 /* ID possibly in use */
3458 found++;
3459 break;
3460 }
3461 }
3462 if (found)
3463 break;
3464 }
3465 spin_unlock_irqrestore(&ha->vport_slock, flags);
3466
3467 /* If not in use then it is free to use. */
3468 if (!found) {
3469 break;
3470 }
3471
3472 /* ID in use. Try next value. */
3473 dev->loop_id++;
3474
3475 /* If wrap around. No free ID to use. */
3476 if (dev->loop_id == first_loop_id) {
3477 dev->loop_id = FC_NO_LOOP_ID;
3478 rval = QLA_FUNCTION_FAILED;
3479 break;
3480 }
3481 }
3482
3483 return (rval);
3484 }
3485
3486 /*
3487 * qla2x00_device_resync
3488 * Marks devices in the database that needs resynchronization.
3489 *
3490 * Input:
3491 * ha = adapter block pointer.
3492 *
3493 * Context:
3494 * Kernel context.
3495 */
3496 static int
3497 qla2x00_device_resync(scsi_qla_host_t *vha)
3498 {
3499 int rval;
3500 uint32_t mask;
3501 fc_port_t *fcport;
3502 uint32_t rscn_entry;
3503 uint8_t rscn_out_iter;
3504 uint8_t format;
3505 port_id_t d_id = {};
3506
3507 rval = QLA_RSCNS_HANDLED;
3508
3509 while (vha->rscn_out_ptr != vha->rscn_in_ptr ||
3510 vha->flags.rscn_queue_overflow) {
3511
3512 rscn_entry = vha->rscn_queue[vha->rscn_out_ptr];
3513 format = MSB(MSW(rscn_entry));
3514 d_id.b.domain = LSB(MSW(rscn_entry));
3515 d_id.b.area = MSB(LSW(rscn_entry));
3516 d_id.b.al_pa = LSB(LSW(rscn_entry));
3517
3518 ql_dbg(ql_dbg_disc, vha, 0x2020,
3519 "RSCN queue entry[%d] = [%02x/%02x%02x%02x].\n",
3520 vha->rscn_out_ptr, format, d_id.b.domain, d_id.b.area,
3521 d_id.b.al_pa);
3522
3523 vha->rscn_out_ptr++;
3524 if (vha->rscn_out_ptr == MAX_RSCN_COUNT)
3525 vha->rscn_out_ptr = 0;
3526
3527 /* Skip duplicate entries. */
3528 for (rscn_out_iter = vha->rscn_out_ptr;
3529 !vha->flags.rscn_queue_overflow &&
3530 rscn_out_iter != vha->rscn_in_ptr;
3531 rscn_out_iter = (rscn_out_iter ==
3532 (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
3533
3534 if (rscn_entry != vha->rscn_queue[rscn_out_iter])
3535 break;
3536
3537 ql_dbg(ql_dbg_disc, vha, 0x2021,
3538 "Skipping duplicate RSCN queue entry found at "
3539 "[%d].\n", rscn_out_iter);
3540
3541 vha->rscn_out_ptr = rscn_out_iter;
3542 }
3543
3544 /* Queue overflow, set switch default case. */
3545 if (vha->flags.rscn_queue_overflow) {
3546 ql_dbg(ql_dbg_disc, vha, 0x2022,
3547 "device_resync: rscn overflow.\n");
3548
3549 format = 3;
3550 vha->flags.rscn_queue_overflow = 0;
3551 }
3552
3553 switch (format) {
3554 case 0:
3555 mask = 0xffffff;
3556 break;
3557 case 1:
3558 mask = 0xffff00;
3559 break;
3560 case 2:
3561 mask = 0xff0000;
3562 break;
3563 default:
3564 mask = 0x0;
3565 d_id.b24 = 0;
3566 vha->rscn_out_ptr = vha->rscn_in_ptr;
3567 break;
3568 }
3569
3570 rval = QLA_SUCCESS;
3571
3572 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3573 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
3574 (fcport->d_id.b24 & mask) != d_id.b24 ||
3575 fcport->port_type == FCT_BROADCAST)
3576 continue;
3577
3578 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3579 if (format != 3 ||
3580 fcport->port_type != FCT_INITIATOR) {
3581 qla2x00_mark_device_lost(vha, fcport,
3582 0, 0);
3583 }
3584 }
3585 }
3586 }
3587 return (rval);
3588 }
3589
3590 /*
3591 * qla2x00_fabric_dev_login
3592 * Login fabric target device and update FC port database.
3593 *
3594 * Input:
3595 * ha: adapter state pointer.
3596 * fcport: port structure list pointer.
3597 * next_loopid: contains value of a new loop ID that can be used
3598 * by the next login attempt.
3599 *
3600 * Returns:
3601 * qla2x00 local function return status code.
3602 *
3603 * Context:
3604 * Kernel context.
3605 */
3606 static int
3607 qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
3608 uint16_t *next_loopid)
3609 {
3610 int rval;
3611 int retry;
3612 uint8_t opts;
3613 struct qla_hw_data *ha = vha->hw;
3614
3615 rval = QLA_SUCCESS;
3616 retry = 0;
3617
3618 if (IS_ALOGIO_CAPABLE(ha)) {
3619 if (fcport->flags & FCF_ASYNC_SENT)
3620 return rval;
3621 fcport->flags |= FCF_ASYNC_SENT;
3622 rval = qla2x00_post_async_login_work(vha, fcport, NULL);
3623 if (!rval)
3624 return rval;
3625 }
3626
3627 fcport->flags &= ~FCF_ASYNC_SENT;
3628 rval = qla2x00_fabric_login(vha, fcport, next_loopid);
3629 if (rval == QLA_SUCCESS) {
3630 /* Send an ADISC to FCP2 devices.*/
3631 opts = 0;
3632 if (fcport->flags & FCF_FCP2_DEVICE)
3633 opts |= BIT_1;
3634 rval = qla2x00_get_port_database(vha, fcport, opts);
3635 if (rval != QLA_SUCCESS) {
3636 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
3637 fcport->d_id.b.domain, fcport->d_id.b.area,
3638 fcport->d_id.b.al_pa);
3639 qla2x00_mark_device_lost(vha, fcport, 1, 0);
3640 } else {
3641 qla2x00_update_fcport(vha, fcport);
3642 }
3643 }
3644
3645 return (rval);
3646 }
3647
3648 /*
3649 * qla2x00_fabric_login
3650 * Issue fabric login command.
3651 *
3652 * Input:
3653 * ha = adapter block pointer.
3654 * device = pointer to FC device type structure.
3655 *
3656 * Returns:
3657 * 0 - Login successfully
3658 * 1 - Login failed
3659 * 2 - Initiator device
3660 * 3 - Fatal error
3661 */
3662 int
3663 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
3664 uint16_t *next_loopid)
3665 {
3666 int rval;
3667 int retry;
3668 uint16_t tmp_loopid;
3669 uint16_t mb[MAILBOX_REGISTER_COUNT];
3670 struct qla_hw_data *ha = vha->hw;
3671
3672 retry = 0;
3673 tmp_loopid = 0;
3674
3675 for (;;) {
3676 ql_dbg(ql_dbg_disc, vha, 0x2000,
3677 "Trying Fabric Login w/loop id 0x%04x for port "
3678 "%02x%02x%02x.\n",
3679 fcport->loop_id, fcport->d_id.b.domain,
3680 fcport->d_id.b.area, fcport->d_id.b.al_pa);
3681
3682 /* Login fcport on switch. */
3683 ha->isp_ops->fabric_login(vha, fcport->loop_id,
3684 fcport->d_id.b.domain, fcport->d_id.b.area,
3685 fcport->d_id.b.al_pa, mb, BIT_0);
3686 if (mb[0] == MBS_PORT_ID_USED) {
3687 /*
3688 * Device has another loop ID. The firmware team
3689 * recommends the driver perform an implicit login with
3690 * the specified ID again. The ID we just used is save
3691 * here so we return with an ID that can be tried by
3692 * the next login.
3693 */
3694 retry++;
3695 tmp_loopid = fcport->loop_id;
3696 fcport->loop_id = mb[1];
3697
3698 ql_dbg(ql_dbg_disc, vha, 0x2001,
3699 "Fabric Login: port in use - next loop "
3700 "id=0x%04x, port id= %02x%02x%02x.\n",
3701 fcport->loop_id, fcport->d_id.b.domain,
3702 fcport->d_id.b.area, fcport->d_id.b.al_pa);
3703
3704 } else if (mb[0] == MBS_COMMAND_COMPLETE) {
3705 /*
3706 * Login succeeded.
3707 */
3708 if (retry) {
3709 /* A retry occurred before. */
3710 *next_loopid = tmp_loopid;
3711 } else {
3712 /*
3713 * No retry occurred before. Just increment the
3714 * ID value for next login.
3715 */
3716 *next_loopid = (fcport->loop_id + 1);
3717 }
3718
3719 if (mb[1] & BIT_0) {
3720 fcport->port_type = FCT_INITIATOR;
3721 } else {
3722 fcport->port_type = FCT_TARGET;
3723 if (mb[1] & BIT_1) {
3724 fcport->flags |= FCF_FCP2_DEVICE;
3725 }
3726 }
3727
3728 if (mb[10] & BIT_0)
3729 fcport->supported_classes |= FC_COS_CLASS2;
3730 if (mb[10] & BIT_1)
3731 fcport->supported_classes |= FC_COS_CLASS3;
3732
3733 rval = QLA_SUCCESS;
3734 break;
3735 } else if (mb[0] == MBS_LOOP_ID_USED) {
3736 /*
3737 * Loop ID already used, try next loop ID.
3738 */
3739 fcport->loop_id++;
3740 rval = qla2x00_find_new_loop_id(vha, fcport);
3741 if (rval != QLA_SUCCESS) {
3742 /* Ran out of loop IDs to use */
3743 break;
3744 }
3745 } else if (mb[0] == MBS_COMMAND_ERROR) {
3746 /*
3747 * Firmware possibly timed out during login. If NO
3748 * retries are left to do then the device is declared
3749 * dead.
3750 */
3751 *next_loopid = fcport->loop_id;
3752 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
3753 fcport->d_id.b.domain, fcport->d_id.b.area,
3754 fcport->d_id.b.al_pa);
3755 qla2x00_mark_device_lost(vha, fcport, 1, 0);
3756
3757 rval = 1;
3758 break;
3759 } else {
3760 /*
3761 * unrecoverable / not handled error
3762 */
3763 ql_dbg(ql_dbg_disc, vha, 0x2002,
3764 "Failed=%x port_id=%02x%02x%02x loop_id=%x "
3765 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
3766 fcport->d_id.b.area, fcport->d_id.b.al_pa,
3767 fcport->loop_id, jiffies);
3768
3769 *next_loopid = fcport->loop_id;
3770 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
3771 fcport->d_id.b.domain, fcport->d_id.b.area,
3772 fcport->d_id.b.al_pa);
3773 fcport->loop_id = FC_NO_LOOP_ID;
3774 fcport->login_retry = 0;
3775
3776 rval = 3;
3777 break;
3778 }
3779 }
3780
3781 return (rval);
3782 }
3783
3784 /*
3785 * qla2x00_local_device_login
3786 * Issue local device login command.
3787 *
3788 * Input:
3789 * ha = adapter block pointer.
3790 * loop_id = loop id of device to login to.
3791 *
3792 * Returns (Where's the #define!!!!):
3793 * 0 - Login successfully
3794 * 1 - Login failed
3795 * 3 - Fatal error
3796 */
3797 int
3798 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
3799 {
3800 int rval;
3801 uint16_t mb[MAILBOX_REGISTER_COUNT];
3802
3803 memset(mb, 0, sizeof(mb));
3804 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
3805 if (rval == QLA_SUCCESS) {
3806 /* Interrogate mailbox registers for any errors */
3807 if (mb[0] == MBS_COMMAND_ERROR)
3808 rval = 1;
3809 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
3810 /* device not in PCB table */
3811 rval = 3;
3812 }
3813
3814 return (rval);
3815 }
3816
3817 /*
3818 * qla2x00_loop_resync
3819 * Resync with fibre channel devices.
3820 *
3821 * Input:
3822 * ha = adapter block pointer.
3823 *
3824 * Returns:
3825 * 0 = success
3826 */
3827 int
3828 qla2x00_loop_resync(scsi_qla_host_t *vha)
3829 {
3830 int rval = QLA_SUCCESS;
3831 uint32_t wait_time;
3832 struct req_que *req;
3833 struct rsp_que *rsp;
3834
3835 if (vha->hw->flags.cpu_affinity_enabled)
3836 req = vha->hw->req_q_map[0];
3837 else
3838 req = vha->req;
3839 rsp = req->rsp;
3840
3841 atomic_set(&vha->loop_state, LOOP_UPDATE);
3842 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
3843 if (vha->flags.online) {
3844 if (!(rval = qla2x00_fw_ready(vha))) {
3845 /* Wait at most MAX_TARGET RSCNs for a stable link. */
3846 wait_time = 256;
3847 do {
3848 atomic_set(&vha->loop_state, LOOP_UPDATE);
3849
3850 /* Issue a marker after FW becomes ready. */
3851 qla2x00_marker(vha, req, rsp, 0, 0,
3852 MK_SYNC_ALL);
3853 vha->marker_needed = 0;
3854
3855 /* Remap devices on Loop. */
3856 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
3857
3858 qla2x00_configure_loop(vha);
3859 wait_time--;
3860 } while (!atomic_read(&vha->loop_down_timer) &&
3861 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
3862 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
3863 &vha->dpc_flags)));
3864 }
3865 }
3866
3867 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
3868 return (QLA_FUNCTION_FAILED);
3869
3870 if (rval)
3871 ql_dbg(ql_dbg_disc, vha, 0x206c,
3872 "%s *** FAILED ***.\n", __func__);
3873
3874 return (rval);
3875 }
3876
3877 /*
3878 * qla2x00_perform_loop_resync
3879 * Description: This function will set the appropriate flags and call
3880 * qla2x00_loop_resync. If successful loop will be resynced
3881 * Arguments : scsi_qla_host_t pointer
3882 * returm : Success or Failure
3883 */
3884
3885 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
3886 {
3887 int32_t rval = 0;
3888
3889 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
3890 /*Configure the flags so that resync happens properly*/
3891 atomic_set(&ha->loop_down_timer, 0);
3892 if (!(ha->device_flags & DFLG_NO_CABLE)) {
3893 atomic_set(&ha->loop_state, LOOP_UP);
3894 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
3895 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
3896 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
3897
3898 rval = qla2x00_loop_resync(ha);
3899 } else
3900 atomic_set(&ha->loop_state, LOOP_DEAD);
3901
3902 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
3903 }
3904
3905 return rval;
3906 }
3907
3908 void
3909 qla2x00_update_fcports(scsi_qla_host_t *base_vha)
3910 {
3911 fc_port_t *fcport;
3912 struct scsi_qla_host *vha;
3913 struct qla_hw_data *ha = base_vha->hw;
3914 unsigned long flags;
3915
3916 spin_lock_irqsave(&ha->vport_slock, flags);
3917 /* Go with deferred removal of rport references. */
3918 list_for_each_entry(vha, &base_vha->hw->vp_list, list) {
3919 atomic_inc(&vha->vref_count);
3920 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3921 if (fcport->drport &&
3922 atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
3923 spin_unlock_irqrestore(&ha->vport_slock, flags);
3924
3925 qla2x00_rport_del(fcport);
3926
3927 spin_lock_irqsave(&ha->vport_slock, flags);
3928 }
3929 }
3930 atomic_dec(&vha->vref_count);
3931 }
3932 spin_unlock_irqrestore(&ha->vport_slock, flags);
3933 }
3934
3935 /*
3936 * qla82xx_quiescent_state_cleanup
3937 * Description: This function will block the new I/Os
3938 * Its not aborting any I/Os as context
3939 * is not destroyed during quiescence
3940 * Arguments: scsi_qla_host_t
3941 * return : void
3942 */
3943 void
3944 qla82xx_quiescent_state_cleanup(scsi_qla_host_t *vha)
3945 {
3946 struct qla_hw_data *ha = vha->hw;
3947 struct scsi_qla_host *vp;
3948
3949 ql_dbg(ql_dbg_p3p, vha, 0xb002,
3950 "Performing ISP error recovery - ha=%p.\n", ha);
3951
3952 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
3953 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
3954 atomic_set(&vha->loop_state, LOOP_DOWN);
3955 qla2x00_mark_all_devices_lost(vha, 0);
3956 list_for_each_entry(vp, &ha->vp_list, list)
3957 qla2x00_mark_all_devices_lost(vha, 0);
3958 } else {
3959 if (!atomic_read(&vha->loop_down_timer))
3960 atomic_set(&vha->loop_down_timer,
3961 LOOP_DOWN_TIME);
3962 }
3963 /* Wait for pending cmds to complete */
3964 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST);
3965 }
3966
3967 void
3968 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
3969 {
3970 struct qla_hw_data *ha = vha->hw;
3971 struct scsi_qla_host *vp;
3972 unsigned long flags;
3973 fc_port_t *fcport;
3974
3975 /* For ISP82XX, driver waits for completion of the commands.
3976 * online flag should be set.
3977 */
3978 if (!IS_QLA82XX(ha))
3979 vha->flags.online = 0;
3980 ha->flags.chip_reset_done = 0;
3981 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
3982 ha->qla_stats.total_isp_aborts++;
3983
3984 ql_log(ql_log_info, vha, 0x00af,
3985 "Performing ISP error recovery - ha=%p.\n", ha);
3986
3987 /* For ISP82XX, reset_chip is just disabling interrupts.
3988 * Driver waits for the completion of the commands.
3989 * the interrupts need to be enabled.
3990 */
3991 if (!IS_QLA82XX(ha))
3992 ha->isp_ops->reset_chip(vha);
3993
3994 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
3995 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
3996 atomic_set(&vha->loop_state, LOOP_DOWN);
3997 qla2x00_mark_all_devices_lost(vha, 0);
3998
3999 spin_lock_irqsave(&ha->vport_slock, flags);
4000 list_for_each_entry(vp, &ha->vp_list, list) {
4001 atomic_inc(&vp->vref_count);
4002 spin_unlock_irqrestore(&ha->vport_slock, flags);
4003
4004 qla2x00_mark_all_devices_lost(vp, 0);
4005
4006 spin_lock_irqsave(&ha->vport_slock, flags);
4007 atomic_dec(&vp->vref_count);
4008 }
4009 spin_unlock_irqrestore(&ha->vport_slock, flags);
4010 } else {
4011 if (!atomic_read(&vha->loop_down_timer))
4012 atomic_set(&vha->loop_down_timer,
4013 LOOP_DOWN_TIME);
4014 }
4015
4016 /* Clear all async request states across all VPs. */
4017 list_for_each_entry(fcport, &vha->vp_fcports, list)
4018 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
4019 spin_lock_irqsave(&ha->vport_slock, flags);
4020 list_for_each_entry(vp, &ha->vp_list, list) {
4021 atomic_inc(&vp->vref_count);
4022 spin_unlock_irqrestore(&ha->vport_slock, flags);
4023
4024 list_for_each_entry(fcport, &vp->vp_fcports, list)
4025 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
4026
4027 spin_lock_irqsave(&ha->vport_slock, flags);
4028 atomic_dec(&vp->vref_count);
4029 }
4030 spin_unlock_irqrestore(&ha->vport_slock, flags);
4031
4032 if (!ha->flags.eeh_busy) {
4033 /* Make sure for ISP 82XX IO DMA is complete */
4034 if (IS_QLA82XX(ha)) {
4035 qla82xx_chip_reset_cleanup(vha);
4036 ql_log(ql_log_info, vha, 0x00b4,
4037 "Done chip reset cleanup.\n");
4038
4039 /* Done waiting for pending commands.
4040 * Reset the online flag.
4041 */
4042 vha->flags.online = 0;
4043 }
4044
4045 /* Requeue all commands in outstanding command list. */
4046 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
4047 }
4048 }
4049
4050 /*
4051 * qla2x00_abort_isp
4052 * Resets ISP and aborts all outstanding commands.
4053 *
4054 * Input:
4055 * ha = adapter block pointer.
4056 *
4057 * Returns:
4058 * 0 = success
4059 */
4060 int
4061 qla2x00_abort_isp(scsi_qla_host_t *vha)
4062 {
4063 int rval;
4064 uint8_t status = 0;
4065 struct qla_hw_data *ha = vha->hw;
4066 struct scsi_qla_host *vp;
4067 struct req_que *req = ha->req_q_map[0];
4068 unsigned long flags;
4069
4070 if (vha->flags.online) {
4071 qla2x00_abort_isp_cleanup(vha);
4072
4073 if (unlikely(pci_channel_offline(ha->pdev) &&
4074 ha->flags.pci_channel_io_perm_failure)) {
4075 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
4076 status = 0;
4077 return status;
4078 }
4079
4080 ha->isp_ops->get_flash_version(vha, req->ring);
4081
4082 ha->isp_ops->nvram_config(vha);
4083
4084 if (!qla2x00_restart_isp(vha)) {
4085 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
4086
4087 if (!atomic_read(&vha->loop_down_timer)) {
4088 /*
4089 * Issue marker command only when we are going
4090 * to start the I/O .
4091 */
4092 vha->marker_needed = 1;
4093 }
4094
4095 vha->flags.online = 1;
4096
4097 ha->isp_ops->enable_intrs(ha);
4098
4099 ha->isp_abort_cnt = 0;
4100 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
4101
4102 if (IS_QLA81XX(ha))
4103 qla2x00_get_fw_version(vha,
4104 &ha->fw_major_version,
4105 &ha->fw_minor_version,
4106 &ha->fw_subminor_version,
4107 &ha->fw_attributes, &ha->fw_memory_size,
4108 ha->mpi_version, &ha->mpi_capabilities,
4109 ha->phy_version);
4110
4111 if (ha->fce) {
4112 ha->flags.fce_enabled = 1;
4113 memset(ha->fce, 0,
4114 fce_calc_size(ha->fce_bufs));
4115 rval = qla2x00_enable_fce_trace(vha,
4116 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
4117 &ha->fce_bufs);
4118 if (rval) {
4119 ql_log(ql_log_warn, vha, 0x8033,
4120 "Unable to reinitialize FCE "
4121 "(%d).\n", rval);
4122 ha->flags.fce_enabled = 0;
4123 }
4124 }
4125
4126 if (ha->eft) {
4127 memset(ha->eft, 0, EFT_SIZE);
4128 rval = qla2x00_enable_eft_trace(vha,
4129 ha->eft_dma, EFT_NUM_BUFFERS);
4130 if (rval) {
4131 ql_log(ql_log_warn, vha, 0x8034,
4132 "Unable to reinitialize EFT "
4133 "(%d).\n", rval);
4134 }
4135 }
4136 } else { /* failed the ISP abort */
4137 vha->flags.online = 1;
4138 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
4139 if (ha->isp_abort_cnt == 0) {
4140 ql_log(ql_log_fatal, vha, 0x8035,
4141 "ISP error recover failed - "
4142 "board disabled.\n");
4143 /*
4144 * The next call disables the board
4145 * completely.
4146 */
4147 ha->isp_ops->reset_adapter(vha);
4148 vha->flags.online = 0;
4149 clear_bit(ISP_ABORT_RETRY,
4150 &vha->dpc_flags);
4151 status = 0;
4152 } else { /* schedule another ISP abort */
4153 ha->isp_abort_cnt--;
4154 ql_dbg(ql_dbg_taskm, vha, 0x8020,
4155 "ISP abort - retry remaining %d.\n",
4156 ha->isp_abort_cnt);
4157 status = 1;
4158 }
4159 } else {
4160 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
4161 ql_dbg(ql_dbg_taskm, vha, 0x8021,
4162 "ISP error recovery - retrying (%d) "
4163 "more times.\n", ha->isp_abort_cnt);
4164 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
4165 status = 1;
4166 }
4167 }
4168
4169 }
4170
4171 if (!status) {
4172 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__);
4173
4174 spin_lock_irqsave(&ha->vport_slock, flags);
4175 list_for_each_entry(vp, &ha->vp_list, list) {
4176 if (vp->vp_idx) {
4177 atomic_inc(&vp->vref_count);
4178 spin_unlock_irqrestore(&ha->vport_slock, flags);
4179
4180 qla2x00_vp_abort_isp(vp);
4181
4182 spin_lock_irqsave(&ha->vport_slock, flags);
4183 atomic_dec(&vp->vref_count);
4184 }
4185 }
4186 spin_unlock_irqrestore(&ha->vport_slock, flags);
4187
4188 } else {
4189 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n");
4190 }
4191
4192 return(status);
4193 }
4194
4195 /*
4196 * qla2x00_restart_isp
4197 * restarts the ISP after a reset
4198 *
4199 * Input:
4200 * ha = adapter block pointer.
4201 *
4202 * Returns:
4203 * 0 = success
4204 */
4205 static int
4206 qla2x00_restart_isp(scsi_qla_host_t *vha)
4207 {
4208 int status = 0;
4209 uint32_t wait_time;
4210 struct qla_hw_data *ha = vha->hw;
4211 struct req_que *req = ha->req_q_map[0];
4212 struct rsp_que *rsp = ha->rsp_q_map[0];
4213
4214 /* If firmware needs to be loaded */
4215 if (qla2x00_isp_firmware(vha)) {
4216 vha->flags.online = 0;
4217 status = ha->isp_ops->chip_diag(vha);
4218 if (!status)
4219 status = qla2x00_setup_chip(vha);
4220 }
4221
4222 if (!status && !(status = qla2x00_init_rings(vha))) {
4223 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
4224 ha->flags.chip_reset_done = 1;
4225 /* Initialize the queues in use */
4226 qla25xx_init_queues(ha);
4227
4228 status = qla2x00_fw_ready(vha);
4229 if (!status) {
4230 ql_dbg(ql_dbg_taskm, vha, 0x8031,
4231 "Start configure loop status = %d.\n", status);
4232
4233 /* Issue a marker after FW becomes ready. */
4234 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
4235
4236 vha->flags.online = 1;
4237 /* Wait at most MAX_TARGET RSCNs for a stable link. */
4238 wait_time = 256;
4239 do {
4240 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
4241 qla2x00_configure_loop(vha);
4242 wait_time--;
4243 } while (!atomic_read(&vha->loop_down_timer) &&
4244 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
4245 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
4246 &vha->dpc_flags)));
4247 }
4248
4249 /* if no cable then assume it's good */
4250 if ((vha->device_flags & DFLG_NO_CABLE))
4251 status = 0;
4252
4253 ql_dbg(ql_dbg_taskm, vha, 0x8032,
4254 "Configure loop done, status = 0x%x.\n", status);
4255 }
4256 return (status);
4257 }
4258
4259 static int
4260 qla25xx_init_queues(struct qla_hw_data *ha)
4261 {
4262 struct rsp_que *rsp = NULL;
4263 struct req_que *req = NULL;
4264 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
4265 int ret = -1;
4266 int i;
4267
4268 for (i = 1; i < ha->max_rsp_queues; i++) {
4269 rsp = ha->rsp_q_map[i];
4270 if (rsp) {
4271 rsp->options &= ~BIT_0;
4272 ret = qla25xx_init_rsp_que(base_vha, rsp);
4273 if (ret != QLA_SUCCESS)
4274 ql_dbg(ql_dbg_init, base_vha, 0x00ff,
4275 "%s Rsp que: %d init failed.\n",
4276 __func__, rsp->id);
4277 else
4278 ql_dbg(ql_dbg_init, base_vha, 0x0100,
4279 "%s Rsp que: %d inited.\n",
4280 __func__, rsp->id);
4281 }
4282 }
4283 for (i = 1; i < ha->max_req_queues; i++) {
4284 req = ha->req_q_map[i];
4285 if (req) {
4286 /* Clear outstanding commands array. */
4287 req->options &= ~BIT_0;
4288 ret = qla25xx_init_req_que(base_vha, req);
4289 if (ret != QLA_SUCCESS)
4290 ql_dbg(ql_dbg_init, base_vha, 0x0101,
4291 "%s Req que: %d init failed.\n",
4292 __func__, req->id);
4293 else
4294 ql_dbg(ql_dbg_init, base_vha, 0x0102,
4295 "%s Req que: %d inited.\n",
4296 __func__, req->id);
4297 }
4298 }
4299 return ret;
4300 }
4301
4302 /*
4303 * qla2x00_reset_adapter
4304 * Reset adapter.
4305 *
4306 * Input:
4307 * ha = adapter block pointer.
4308 */
4309 void
4310 qla2x00_reset_adapter(scsi_qla_host_t *vha)
4311 {
4312 unsigned long flags = 0;
4313 struct qla_hw_data *ha = vha->hw;
4314 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4315
4316 vha->flags.online = 0;
4317 ha->isp_ops->disable_intrs(ha);
4318
4319 spin_lock_irqsave(&ha->hardware_lock, flags);
4320 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
4321 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
4322 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
4323 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
4324 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4325 }
4326
4327 void
4328 qla24xx_reset_adapter(scsi_qla_host_t *vha)
4329 {
4330 unsigned long flags = 0;
4331 struct qla_hw_data *ha = vha->hw;
4332 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
4333
4334 if (IS_QLA82XX(ha))
4335 return;
4336
4337 vha->flags.online = 0;
4338 ha->isp_ops->disable_intrs(ha);
4339
4340 spin_lock_irqsave(&ha->hardware_lock, flags);
4341 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
4342 RD_REG_DWORD(&reg->hccr);
4343 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
4344 RD_REG_DWORD(&reg->hccr);
4345 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4346
4347 if (IS_NOPOLLING_TYPE(ha))
4348 ha->isp_ops->enable_intrs(ha);
4349 }
4350
4351 /* On sparc systems, obtain port and node WWN from firmware
4352 * properties.
4353 */
4354 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
4355 struct nvram_24xx *nv)
4356 {
4357 #ifdef CONFIG_SPARC
4358 struct qla_hw_data *ha = vha->hw;
4359 struct pci_dev *pdev = ha->pdev;
4360 struct device_node *dp = pci_device_to_OF_node(pdev);
4361 const u8 *val;
4362 int len;
4363
4364 val = of_get_property(dp, "port-wwn", &len);
4365 if (val && len >= WWN_SIZE)
4366 memcpy(nv->port_name, val, WWN_SIZE);
4367
4368 val = of_get_property(dp, "node-wwn", &len);
4369 if (val && len >= WWN_SIZE)
4370 memcpy(nv->node_name, val, WWN_SIZE);
4371 #endif
4372 }
4373
4374 int
4375 qla24xx_nvram_config(scsi_qla_host_t *vha)
4376 {
4377 int rval;
4378 struct init_cb_24xx *icb;
4379 struct nvram_24xx *nv;
4380 uint32_t *dptr;
4381 uint8_t *dptr1, *dptr2;
4382 uint32_t chksum;
4383 uint16_t cnt;
4384 struct qla_hw_data *ha = vha->hw;
4385
4386 rval = QLA_SUCCESS;
4387 icb = (struct init_cb_24xx *)ha->init_cb;
4388 nv = ha->nvram;
4389
4390 /* Determine NVRAM starting address. */
4391 if (ha->flags.port0) {
4392 ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
4393 ha->vpd_base = FA_NVRAM_VPD0_ADDR;
4394 } else {
4395 ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
4396 ha->vpd_base = FA_NVRAM_VPD1_ADDR;
4397 }
4398 ha->nvram_size = sizeof(struct nvram_24xx);
4399 ha->vpd_size = FA_NVRAM_VPD_SIZE;
4400 if (IS_QLA82XX(ha))
4401 ha->vpd_size = FA_VPD_SIZE_82XX;
4402
4403 /* Get VPD data into cache */
4404 ha->vpd = ha->nvram + VPD_OFFSET;
4405 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
4406 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
4407
4408 /* Get NVRAM data into cache and calculate checksum. */
4409 dptr = (uint32_t *)nv;
4410 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
4411 ha->nvram_size);
4412 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
4413 chksum += le32_to_cpu(*dptr++);
4414
4415 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
4416 "Contents of NVRAM\n");
4417 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
4418 (uint8_t *)nv, ha->nvram_size);
4419
4420 /* Bad NVRAM data, set defaults parameters. */
4421 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
4422 || nv->id[3] != ' ' ||
4423 nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
4424 /* Reset NVRAM data. */
4425 ql_log(ql_log_warn, vha, 0x006b,
4426 "Inconisistent NVRAM detected: checksum=0x%x id=%c "
4427 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version);
4428 ql_log(ql_log_warn, vha, 0x006c,
4429 "Falling back to functioning (yet invalid -- WWPN) "
4430 "defaults.\n");
4431
4432 /*
4433 * Set default initialization control block.
4434 */
4435 memset(nv, 0, ha->nvram_size);
4436 nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
4437 nv->version = __constant_cpu_to_le16(ICB_VERSION);
4438 nv->frame_payload_size = __constant_cpu_to_le16(2048);
4439 nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
4440 nv->exchange_count = __constant_cpu_to_le16(0);
4441 nv->hard_address = __constant_cpu_to_le16(124);
4442 nv->port_name[0] = 0x21;
4443 nv->port_name[1] = 0x00 + ha->port_no;
4444 nv->port_name[2] = 0x00;
4445 nv->port_name[3] = 0xe0;
4446 nv->port_name[4] = 0x8b;
4447 nv->port_name[5] = 0x1c;
4448 nv->port_name[6] = 0x55;
4449 nv->port_name[7] = 0x86;
4450 nv->node_name[0] = 0x20;
4451 nv->node_name[1] = 0x00;
4452 nv->node_name[2] = 0x00;
4453 nv->node_name[3] = 0xe0;
4454 nv->node_name[4] = 0x8b;
4455 nv->node_name[5] = 0x1c;
4456 nv->node_name[6] = 0x55;
4457 nv->node_name[7] = 0x86;
4458 qla24xx_nvram_wwn_from_ofw(vha, nv);
4459 nv->login_retry_count = __constant_cpu_to_le16(8);
4460 nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
4461 nv->login_timeout = __constant_cpu_to_le16(0);
4462 nv->firmware_options_1 =
4463 __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
4464 nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
4465 nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
4466 nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
4467 nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
4468 nv->efi_parameters = __constant_cpu_to_le32(0);
4469 nv->reset_delay = 5;
4470 nv->max_luns_per_target = __constant_cpu_to_le16(128);
4471 nv->port_down_retry_count = __constant_cpu_to_le16(30);
4472 nv->link_down_timeout = __constant_cpu_to_le16(30);
4473
4474 rval = 1;
4475 }
4476
4477 /* Reset Initialization control block */
4478 memset(icb, 0, ha->init_cb_size);
4479
4480 /* Copy 1st segment. */
4481 dptr1 = (uint8_t *)icb;
4482 dptr2 = (uint8_t *)&nv->version;
4483 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
4484 while (cnt--)
4485 *dptr1++ = *dptr2++;
4486
4487 icb->login_retry_count = nv->login_retry_count;
4488 icb->link_down_on_nos = nv->link_down_on_nos;
4489
4490 /* Copy 2nd segment. */
4491 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
4492 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
4493 cnt = (uint8_t *)&icb->reserved_3 -
4494 (uint8_t *)&icb->interrupt_delay_timer;
4495 while (cnt--)
4496 *dptr1++ = *dptr2++;
4497
4498 /*
4499 * Setup driver NVRAM options.
4500 */
4501 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
4502 "QLA2462");
4503
4504 /* Use alternate WWN? */
4505 if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
4506 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
4507 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
4508 }
4509
4510 /* Prepare nodename */
4511 if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
4512 /*
4513 * Firmware will apply the following mask if the nodename was
4514 * not provided.
4515 */
4516 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
4517 icb->node_name[0] &= 0xF0;
4518 }
4519
4520 /* Set host adapter parameters. */
4521 ha->flags.disable_risc_code_load = 0;
4522 ha->flags.enable_lip_reset = 0;
4523 ha->flags.enable_lip_full_login =
4524 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
4525 ha->flags.enable_target_reset =
4526 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
4527 ha->flags.enable_led_scheme = 0;
4528 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
4529
4530 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
4531 (BIT_6 | BIT_5 | BIT_4)) >> 4;
4532
4533 memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
4534 sizeof(ha->fw_seriallink_options24));
4535
4536 /* save HBA serial number */
4537 ha->serial0 = icb->port_name[5];
4538 ha->serial1 = icb->port_name[6];
4539 ha->serial2 = icb->port_name[7];
4540 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
4541 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
4542
4543 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
4544
4545 ha->retry_count = le16_to_cpu(nv->login_retry_count);
4546
4547 /* Set minimum login_timeout to 4 seconds. */
4548 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
4549 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
4550 if (le16_to_cpu(nv->login_timeout) < 4)
4551 nv->login_timeout = __constant_cpu_to_le16(4);
4552 ha->login_timeout = le16_to_cpu(nv->login_timeout);
4553 icb->login_timeout = nv->login_timeout;
4554
4555 /* Set minimum RATOV to 100 tenths of a second. */
4556 ha->r_a_tov = 100;
4557
4558 ha->loop_reset_delay = nv->reset_delay;
4559
4560 /* Link Down Timeout = 0:
4561 *
4562 * When Port Down timer expires we will start returning
4563 * I/O's to OS with "DID_NO_CONNECT".
4564 *
4565 * Link Down Timeout != 0:
4566 *
4567 * The driver waits for the link to come up after link down
4568 * before returning I/Os to OS with "DID_NO_CONNECT".
4569 */
4570 if (le16_to_cpu(nv->link_down_timeout) == 0) {
4571 ha->loop_down_abort_time =
4572 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
4573 } else {
4574 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
4575 ha->loop_down_abort_time =
4576 (LOOP_DOWN_TIME - ha->link_down_timeout);
4577 }
4578
4579 /* Need enough time to try and get the port back. */
4580 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
4581 if (qlport_down_retry)
4582 ha->port_down_retry_count = qlport_down_retry;
4583
4584 /* Set login_retry_count */
4585 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
4586 if (ha->port_down_retry_count ==
4587 le16_to_cpu(nv->port_down_retry_count) &&
4588 ha->port_down_retry_count > 3)
4589 ha->login_retry_count = ha->port_down_retry_count;
4590 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
4591 ha->login_retry_count = ha->port_down_retry_count;
4592 if (ql2xloginretrycount)
4593 ha->login_retry_count = ql2xloginretrycount;
4594
4595 /* Enable ZIO. */
4596 if (!vha->flags.init_done) {
4597 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
4598 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
4599 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
4600 le16_to_cpu(icb->interrupt_delay_timer): 2;
4601 }
4602 icb->firmware_options_2 &= __constant_cpu_to_le32(
4603 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
4604 vha->flags.process_response_queue = 0;
4605 if (ha->zio_mode != QLA_ZIO_DISABLED) {
4606 ha->zio_mode = QLA_ZIO_MODE_6;
4607
4608 ql_log(ql_log_info, vha, 0x006f,
4609 "ZIO mode %d enabled; timer delay (%d us).\n",
4610 ha->zio_mode, ha->zio_timer * 100);
4611
4612 icb->firmware_options_2 |= cpu_to_le32(
4613 (uint32_t)ha->zio_mode);
4614 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
4615 vha->flags.process_response_queue = 1;
4616 }
4617
4618 if (rval) {
4619 ql_log(ql_log_warn, vha, 0x0070,
4620 "NVRAM configuration failed.\n");
4621 }
4622 return (rval);
4623 }
4624
4625 static int
4626 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
4627 uint32_t faddr)
4628 {
4629 int rval = QLA_SUCCESS;
4630 int segments, fragment;
4631 uint32_t *dcode, dlen;
4632 uint32_t risc_addr;
4633 uint32_t risc_size;
4634 uint32_t i;
4635 struct qla_hw_data *ha = vha->hw;
4636 struct req_que *req = ha->req_q_map[0];
4637
4638 ql_dbg(ql_dbg_init, vha, 0x008b,
4639 "Loading firmware from flash (%x).\n", faddr);
4640
4641 rval = QLA_SUCCESS;
4642
4643 segments = FA_RISC_CODE_SEGMENTS;
4644 dcode = (uint32_t *)req->ring;
4645 *srisc_addr = 0;
4646
4647 /* Validate firmware image by checking version. */
4648 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
4649 for (i = 0; i < 4; i++)
4650 dcode[i] = be32_to_cpu(dcode[i]);
4651 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
4652 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
4653 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
4654 dcode[3] == 0)) {
4655 ql_log(ql_log_fatal, vha, 0x008c,
4656 "Unable to verify the integrity of flash firmware "
4657 "image.\n");
4658 ql_log(ql_log_fatal, vha, 0x008d,
4659 "Firmware data: %08x %08x %08x %08x.\n",
4660 dcode[0], dcode[1], dcode[2], dcode[3]);
4661
4662 return QLA_FUNCTION_FAILED;
4663 }
4664
4665 while (segments && rval == QLA_SUCCESS) {
4666 /* Read segment's load information. */
4667 qla24xx_read_flash_data(vha, dcode, faddr, 4);
4668
4669 risc_addr = be32_to_cpu(dcode[2]);
4670 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
4671 risc_size = be32_to_cpu(dcode[3]);
4672
4673 fragment = 0;
4674 while (risc_size > 0 && rval == QLA_SUCCESS) {
4675 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
4676 if (dlen > risc_size)
4677 dlen = risc_size;
4678
4679 ql_dbg(ql_dbg_init, vha, 0x008e,
4680 "Loading risc segment@ risc addr %x "
4681 "number of dwords 0x%x offset 0x%x.\n",
4682 risc_addr, dlen, faddr);
4683
4684 qla24xx_read_flash_data(vha, dcode, faddr, dlen);
4685 for (i = 0; i < dlen; i++)
4686 dcode[i] = swab32(dcode[i]);
4687
4688 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
4689 dlen);
4690 if (rval) {
4691 ql_log(ql_log_fatal, vha, 0x008f,
4692 "Failed to load segment %d of firmware.\n",
4693 fragment);
4694 break;
4695 }
4696
4697 faddr += dlen;
4698 risc_addr += dlen;
4699 risc_size -= dlen;
4700 fragment++;
4701 }
4702
4703 /* Next segment. */
4704 segments--;
4705 }
4706
4707 return rval;
4708 }
4709
4710 #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
4711
4712 int
4713 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
4714 {
4715 int rval;
4716 int i, fragment;
4717 uint16_t *wcode, *fwcode;
4718 uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
4719 struct fw_blob *blob;
4720 struct qla_hw_data *ha = vha->hw;
4721 struct req_que *req = ha->req_q_map[0];
4722
4723 /* Load firmware blob. */
4724 blob = qla2x00_request_firmware(vha);
4725 if (!blob) {
4726 ql_log(ql_log_info, vha, 0x0083,
4727 "Fimware image unavailable.\n");
4728 ql_log(ql_log_info, vha, 0x0084,
4729 "Firmware images can be retrieved from: "QLA_FW_URL ".\n");
4730 return QLA_FUNCTION_FAILED;
4731 }
4732
4733 rval = QLA_SUCCESS;
4734
4735 wcode = (uint16_t *)req->ring;
4736 *srisc_addr = 0;
4737 fwcode = (uint16_t *)blob->fw->data;
4738 fwclen = 0;
4739
4740 /* Validate firmware image by checking version. */
4741 if (blob->fw->size < 8 * sizeof(uint16_t)) {
4742 ql_log(ql_log_fatal, vha, 0x0085,
4743 "Unable to verify integrity of firmware image (%Zd).\n",
4744 blob->fw->size);
4745 goto fail_fw_integrity;
4746 }
4747 for (i = 0; i < 4; i++)
4748 wcode[i] = be16_to_cpu(fwcode[i + 4]);
4749 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
4750 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
4751 wcode[2] == 0 && wcode[3] == 0)) {
4752 ql_log(ql_log_fatal, vha, 0x0086,
4753 "Unable to verify integrity of firmware image.\n");
4754 ql_log(ql_log_fatal, vha, 0x0087,
4755 "Firmware data: %04x %04x %04x %04x.\n",
4756 wcode[0], wcode[1], wcode[2], wcode[3]);
4757 goto fail_fw_integrity;
4758 }
4759
4760 seg = blob->segs;
4761 while (*seg && rval == QLA_SUCCESS) {
4762 risc_addr = *seg;
4763 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
4764 risc_size = be16_to_cpu(fwcode[3]);
4765
4766 /* Validate firmware image size. */
4767 fwclen += risc_size * sizeof(uint16_t);
4768 if (blob->fw->size < fwclen) {
4769 ql_log(ql_log_fatal, vha, 0x0088,
4770 "Unable to verify integrity of firmware image "
4771 "(%Zd).\n", blob->fw->size);
4772 goto fail_fw_integrity;
4773 }
4774
4775 fragment = 0;
4776 while (risc_size > 0 && rval == QLA_SUCCESS) {
4777 wlen = (uint16_t)(ha->fw_transfer_size >> 1);
4778 if (wlen > risc_size)
4779 wlen = risc_size;
4780 ql_dbg(ql_dbg_init, vha, 0x0089,
4781 "Loading risc segment@ risc addr %x number of "
4782 "words 0x%x.\n", risc_addr, wlen);
4783
4784 for (i = 0; i < wlen; i++)
4785 wcode[i] = swab16(fwcode[i]);
4786
4787 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
4788 wlen);
4789 if (rval) {
4790 ql_log(ql_log_fatal, vha, 0x008a,
4791 "Failed to load segment %d of firmware.\n",
4792 fragment);
4793 break;
4794 }
4795
4796 fwcode += wlen;
4797 risc_addr += wlen;
4798 risc_size -= wlen;
4799 fragment++;
4800 }
4801
4802 /* Next segment. */
4803 seg++;
4804 }
4805 return rval;
4806
4807 fail_fw_integrity:
4808 return QLA_FUNCTION_FAILED;
4809 }
4810
4811 static int
4812 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
4813 {
4814 int rval;
4815 int segments, fragment;
4816 uint32_t *dcode, dlen;
4817 uint32_t risc_addr;
4818 uint32_t risc_size;
4819 uint32_t i;
4820 struct fw_blob *blob;
4821 uint32_t *fwcode, fwclen;
4822 struct qla_hw_data *ha = vha->hw;
4823 struct req_que *req = ha->req_q_map[0];
4824
4825 /* Load firmware blob. */
4826 blob = qla2x00_request_firmware(vha);
4827 if (!blob) {
4828 ql_log(ql_log_warn, vha, 0x0090,
4829 "Fimware image unavailable.\n");
4830 ql_log(ql_log_warn, vha, 0x0091,
4831 "Firmware images can be retrieved from: "
4832 QLA_FW_URL ".\n");
4833
4834 return QLA_FUNCTION_FAILED;
4835 }
4836
4837 ql_log(ql_log_info, vha, 0x0092,
4838 "Loading via request-firmware.\n");
4839
4840 rval = QLA_SUCCESS;
4841
4842 segments = FA_RISC_CODE_SEGMENTS;
4843 dcode = (uint32_t *)req->ring;
4844 *srisc_addr = 0;
4845 fwcode = (uint32_t *)blob->fw->data;
4846 fwclen = 0;
4847
4848 /* Validate firmware image by checking version. */
4849 if (blob->fw->size < 8 * sizeof(uint32_t)) {
4850 ql_log(ql_log_fatal, vha, 0x0093,
4851 "Unable to verify integrity of firmware image (%Zd).\n",
4852 blob->fw->size);
4853 goto fail_fw_integrity;
4854 }
4855 for (i = 0; i < 4; i++)
4856 dcode[i] = be32_to_cpu(fwcode[i + 4]);
4857 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
4858 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
4859 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
4860 dcode[3] == 0)) {
4861 ql_log(ql_log_fatal, vha, 0x0094,
4862 "Unable to verify integrity of firmware image (%Zd).\n",
4863 blob->fw->size);
4864 ql_log(ql_log_fatal, vha, 0x0095,
4865 "Firmware data: %08x %08x %08x %08x.\n",
4866 dcode[0], dcode[1], dcode[2], dcode[3]);
4867 goto fail_fw_integrity;
4868 }
4869
4870 while (segments && rval == QLA_SUCCESS) {
4871 risc_addr = be32_to_cpu(fwcode[2]);
4872 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
4873 risc_size = be32_to_cpu(fwcode[3]);
4874
4875 /* Validate firmware image size. */
4876 fwclen += risc_size * sizeof(uint32_t);
4877 if (blob->fw->size < fwclen) {
4878 ql_log(ql_log_fatal, vha, 0x0096,
4879 "Unable to verify integrity of firmware image "
4880 "(%Zd).\n", blob->fw->size);
4881
4882 goto fail_fw_integrity;
4883 }
4884
4885 fragment = 0;
4886 while (risc_size > 0 && rval == QLA_SUCCESS) {
4887 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
4888 if (dlen > risc_size)
4889 dlen = risc_size;
4890
4891 ql_dbg(ql_dbg_init, vha, 0x0097,
4892 "Loading risc segment@ risc addr %x "
4893 "number of dwords 0x%x.\n", risc_addr, dlen);
4894
4895 for (i = 0; i < dlen; i++)
4896 dcode[i] = swab32(fwcode[i]);
4897
4898 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
4899 dlen);
4900 if (rval) {
4901 ql_log(ql_log_fatal, vha, 0x0098,
4902 "Failed to load segment %d of firmware.\n",
4903 fragment);
4904 break;
4905 }
4906
4907 fwcode += dlen;
4908 risc_addr += dlen;
4909 risc_size -= dlen;
4910 fragment++;
4911 }
4912
4913 /* Next segment. */
4914 segments--;
4915 }
4916 return rval;
4917
4918 fail_fw_integrity:
4919 return QLA_FUNCTION_FAILED;
4920 }
4921
4922 int
4923 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
4924 {
4925 int rval;
4926
4927 if (ql2xfwloadbin == 1)
4928 return qla81xx_load_risc(vha, srisc_addr);
4929
4930 /*
4931 * FW Load priority:
4932 * 1) Firmware via request-firmware interface (.bin file).
4933 * 2) Firmware residing in flash.
4934 */
4935 rval = qla24xx_load_risc_blob(vha, srisc_addr);
4936 if (rval == QLA_SUCCESS)
4937 return rval;
4938
4939 return qla24xx_load_risc_flash(vha, srisc_addr,
4940 vha->hw->flt_region_fw);
4941 }
4942
4943 int
4944 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
4945 {
4946 int rval;
4947 struct qla_hw_data *ha = vha->hw;
4948
4949 if (ql2xfwloadbin == 2)
4950 goto try_blob_fw;
4951
4952 /*
4953 * FW Load priority:
4954 * 1) Firmware residing in flash.
4955 * 2) Firmware via request-firmware interface (.bin file).
4956 * 3) Golden-Firmware residing in flash -- limited operation.
4957 */
4958 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
4959 if (rval == QLA_SUCCESS)
4960 return rval;
4961
4962 try_blob_fw:
4963 rval = qla24xx_load_risc_blob(vha, srisc_addr);
4964 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
4965 return rval;
4966
4967 ql_log(ql_log_info, vha, 0x0099,
4968 "Attempting to fallback to golden firmware.\n");
4969 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
4970 if (rval != QLA_SUCCESS)
4971 return rval;
4972
4973 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n");
4974 ha->flags.running_gold_fw = 1;
4975
4976 return rval;
4977 }
4978
4979 void
4980 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
4981 {
4982 int ret, retries;
4983 struct qla_hw_data *ha = vha->hw;
4984
4985 if (ha->flags.pci_channel_io_perm_failure)
4986 return;
4987 if (!IS_FWI2_CAPABLE(ha))
4988 return;
4989 if (!ha->fw_major_version)
4990 return;
4991
4992 ret = qla2x00_stop_firmware(vha);
4993 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
4994 ret != QLA_INVALID_COMMAND && retries ; retries--) {
4995 ha->isp_ops->reset_chip(vha);
4996 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
4997 continue;
4998 if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
4999 continue;
5000 ql_log(ql_log_info, vha, 0x8015,
5001 "Attempting retry of stop-firmware command.\n");
5002 ret = qla2x00_stop_firmware(vha);
5003 }
5004 }
5005
5006 int
5007 qla24xx_configure_vhba(scsi_qla_host_t *vha)
5008 {
5009 int rval = QLA_SUCCESS;
5010 uint16_t mb[MAILBOX_REGISTER_COUNT];
5011 struct qla_hw_data *ha = vha->hw;
5012 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
5013 struct req_que *req;
5014 struct rsp_que *rsp;
5015
5016 if (!vha->vp_idx)
5017 return -EINVAL;
5018
5019 rval = qla2x00_fw_ready(base_vha);
5020 if (ha->flags.cpu_affinity_enabled)
5021 req = ha->req_q_map[0];
5022 else
5023 req = vha->req;
5024 rsp = req->rsp;
5025
5026 if (rval == QLA_SUCCESS) {
5027 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5028 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
5029 }
5030
5031 vha->flags.management_server_logged_in = 0;
5032
5033 /* Login to SNS first */
5034 ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1);
5035 if (mb[0] != MBS_COMMAND_COMPLETE) {
5036 ql_dbg(ql_dbg_init, vha, 0x0103,
5037 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x "
5038 "mb[6]=%x mb[7]=%x.\n",
5039 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
5040 return (QLA_FUNCTION_FAILED);
5041 }
5042
5043 atomic_set(&vha->loop_down_timer, 0);
5044 atomic_set(&vha->loop_state, LOOP_UP);
5045 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5046 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5047 rval = qla2x00_loop_resync(base_vha);
5048
5049 return rval;
5050 }
5051
5052 /* 84XX Support **************************************************************/
5053
5054 static LIST_HEAD(qla_cs84xx_list);
5055 static DEFINE_MUTEX(qla_cs84xx_mutex);
5056
5057 static struct qla_chip_state_84xx *
5058 qla84xx_get_chip(struct scsi_qla_host *vha)
5059 {
5060 struct qla_chip_state_84xx *cs84xx;
5061 struct qla_hw_data *ha = vha->hw;
5062
5063 mutex_lock(&qla_cs84xx_mutex);
5064
5065 /* Find any shared 84xx chip. */
5066 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
5067 if (cs84xx->bus == ha->pdev->bus) {
5068 kref_get(&cs84xx->kref);
5069 goto done;
5070 }
5071 }
5072
5073 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
5074 if (!cs84xx)
5075 goto done;
5076
5077 kref_init(&cs84xx->kref);
5078 spin_lock_init(&cs84xx->access_lock);
5079 mutex_init(&cs84xx->fw_update_mutex);
5080 cs84xx->bus = ha->pdev->bus;
5081
5082 list_add_tail(&cs84xx->list, &qla_cs84xx_list);
5083 done:
5084 mutex_unlock(&qla_cs84xx_mutex);
5085 return cs84xx;
5086 }
5087
5088 static void
5089 __qla84xx_chip_release(struct kref *kref)
5090 {
5091 struct qla_chip_state_84xx *cs84xx =
5092 container_of(kref, struct qla_chip_state_84xx, kref);
5093
5094 mutex_lock(&qla_cs84xx_mutex);
5095 list_del(&cs84xx->list);
5096 mutex_unlock(&qla_cs84xx_mutex);
5097 kfree(cs84xx);
5098 }
5099
5100 void
5101 qla84xx_put_chip(struct scsi_qla_host *vha)
5102 {
5103 struct qla_hw_data *ha = vha->hw;
5104 if (ha->cs84xx)
5105 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
5106 }
5107
5108 static int
5109 qla84xx_init_chip(scsi_qla_host_t *vha)
5110 {
5111 int rval;
5112 uint16_t status[2];
5113 struct qla_hw_data *ha = vha->hw;
5114
5115 mutex_lock(&ha->cs84xx->fw_update_mutex);
5116
5117 rval = qla84xx_verify_chip(vha, status);
5118
5119 mutex_unlock(&ha->cs84xx->fw_update_mutex);
5120
5121 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
5122 QLA_SUCCESS;
5123 }
5124
5125 /* 81XX Support **************************************************************/
5126
5127 int
5128 qla81xx_nvram_config(scsi_qla_host_t *vha)
5129 {
5130 int rval;
5131 struct init_cb_81xx *icb;
5132 struct nvram_81xx *nv;
5133 uint32_t *dptr;
5134 uint8_t *dptr1, *dptr2;
5135 uint32_t chksum;
5136 uint16_t cnt;
5137 struct qla_hw_data *ha = vha->hw;
5138
5139 rval = QLA_SUCCESS;
5140 icb = (struct init_cb_81xx *)ha->init_cb;
5141 nv = ha->nvram;
5142
5143 /* Determine NVRAM starting address. */
5144 ha->nvram_size = sizeof(struct nvram_81xx);
5145 ha->vpd_size = FA_NVRAM_VPD_SIZE;
5146
5147 /* Get VPD data into cache */
5148 ha->vpd = ha->nvram + VPD_OFFSET;
5149 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
5150 ha->vpd_size);
5151
5152 /* Get NVRAM data into cache and calculate checksum. */
5153 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
5154 ha->nvram_size);
5155 dptr = (uint32_t *)nv;
5156 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
5157 chksum += le32_to_cpu(*dptr++);
5158
5159 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
5160 "Contents of NVRAM:\n");
5161 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
5162 (uint8_t *)nv, ha->nvram_size);
5163
5164 /* Bad NVRAM data, set defaults parameters. */
5165 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
5166 || nv->id[3] != ' ' ||
5167 nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
5168 /* Reset NVRAM data. */
5169 ql_log(ql_log_info, vha, 0x0073,
5170 "Inconisistent NVRAM detected: checksum=0x%x id=%c "
5171 "version=0x%x.\n", chksum, nv->id[0],
5172 le16_to_cpu(nv->nvram_version));
5173 ql_log(ql_log_info, vha, 0x0074,
5174 "Falling back to functioning (yet invalid -- WWPN) "
5175 "defaults.\n");
5176
5177 /*
5178 * Set default initialization control block.
5179 */
5180 memset(nv, 0, ha->nvram_size);
5181 nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
5182 nv->version = __constant_cpu_to_le16(ICB_VERSION);
5183 nv->frame_payload_size = __constant_cpu_to_le16(2048);
5184 nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
5185 nv->exchange_count = __constant_cpu_to_le16(0);
5186 nv->port_name[0] = 0x21;
5187 nv->port_name[1] = 0x00 + ha->port_no;
5188 nv->port_name[2] = 0x00;
5189 nv->port_name[3] = 0xe0;
5190 nv->port_name[4] = 0x8b;
5191 nv->port_name[5] = 0x1c;
5192 nv->port_name[6] = 0x55;
5193 nv->port_name[7] = 0x86;
5194 nv->node_name[0] = 0x20;
5195 nv->node_name[1] = 0x00;
5196 nv->node_name[2] = 0x00;
5197 nv->node_name[3] = 0xe0;
5198 nv->node_name[4] = 0x8b;
5199 nv->node_name[5] = 0x1c;
5200 nv->node_name[6] = 0x55;
5201 nv->node_name[7] = 0x86;
5202 nv->login_retry_count = __constant_cpu_to_le16(8);
5203 nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
5204 nv->login_timeout = __constant_cpu_to_le16(0);
5205 nv->firmware_options_1 =
5206 __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
5207 nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
5208 nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
5209 nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
5210 nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
5211 nv->efi_parameters = __constant_cpu_to_le32(0);
5212 nv->reset_delay = 5;
5213 nv->max_luns_per_target = __constant_cpu_to_le16(128);
5214 nv->port_down_retry_count = __constant_cpu_to_le16(30);
5215 nv->link_down_timeout = __constant_cpu_to_le16(30);
5216 nv->enode_mac[0] = 0x00;
5217 nv->enode_mac[1] = 0x02;
5218 nv->enode_mac[2] = 0x03;
5219 nv->enode_mac[3] = 0x04;
5220 nv->enode_mac[4] = 0x05;
5221 nv->enode_mac[5] = 0x06 + ha->port_no;
5222
5223 rval = 1;
5224 }
5225
5226 /* Reset Initialization control block */
5227 memset(icb, 0, ha->init_cb_size);
5228
5229 /* Copy 1st segment. */
5230 dptr1 = (uint8_t *)icb;
5231 dptr2 = (uint8_t *)&nv->version;
5232 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
5233 while (cnt--)
5234 *dptr1++ = *dptr2++;
5235
5236 icb->login_retry_count = nv->login_retry_count;
5237
5238 /* Copy 2nd segment. */
5239 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
5240 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
5241 cnt = (uint8_t *)&icb->reserved_5 -
5242 (uint8_t *)&icb->interrupt_delay_timer;
5243 while (cnt--)
5244 *dptr1++ = *dptr2++;
5245
5246 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
5247 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
5248 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
5249 icb->enode_mac[0] = 0x01;
5250 icb->enode_mac[1] = 0x02;
5251 icb->enode_mac[2] = 0x03;
5252 icb->enode_mac[3] = 0x04;
5253 icb->enode_mac[4] = 0x05;
5254 icb->enode_mac[5] = 0x06 + ha->port_no;
5255 }
5256
5257 /* Use extended-initialization control block. */
5258 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
5259
5260 /*
5261 * Setup driver NVRAM options.
5262 */
5263 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
5264 "QLE8XXX");
5265
5266 /* Use alternate WWN? */
5267 if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
5268 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
5269 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
5270 }
5271
5272 /* Prepare nodename */
5273 if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
5274 /*
5275 * Firmware will apply the following mask if the nodename was
5276 * not provided.
5277 */
5278 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
5279 icb->node_name[0] &= 0xF0;
5280 }
5281
5282 /* Set host adapter parameters. */
5283 ha->flags.disable_risc_code_load = 0;
5284 ha->flags.enable_lip_reset = 0;
5285 ha->flags.enable_lip_full_login =
5286 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
5287 ha->flags.enable_target_reset =
5288 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
5289 ha->flags.enable_led_scheme = 0;
5290 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
5291
5292 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
5293 (BIT_6 | BIT_5 | BIT_4)) >> 4;
5294
5295 /* save HBA serial number */
5296 ha->serial0 = icb->port_name[5];
5297 ha->serial1 = icb->port_name[6];
5298 ha->serial2 = icb->port_name[7];
5299 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
5300 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
5301
5302 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
5303
5304 ha->retry_count = le16_to_cpu(nv->login_retry_count);
5305
5306 /* Set minimum login_timeout to 4 seconds. */
5307 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
5308 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
5309 if (le16_to_cpu(nv->login_timeout) < 4)
5310 nv->login_timeout = __constant_cpu_to_le16(4);
5311 ha->login_timeout = le16_to_cpu(nv->login_timeout);
5312 icb->login_timeout = nv->login_timeout;
5313
5314 /* Set minimum RATOV to 100 tenths of a second. */
5315 ha->r_a_tov = 100;
5316
5317 ha->loop_reset_delay = nv->reset_delay;
5318
5319 /* Link Down Timeout = 0:
5320 *
5321 * When Port Down timer expires we will start returning
5322 * I/O's to OS with "DID_NO_CONNECT".
5323 *
5324 * Link Down Timeout != 0:
5325 *
5326 * The driver waits for the link to come up after link down
5327 * before returning I/Os to OS with "DID_NO_CONNECT".
5328 */
5329 if (le16_to_cpu(nv->link_down_timeout) == 0) {
5330 ha->loop_down_abort_time =
5331 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
5332 } else {
5333 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
5334 ha->loop_down_abort_time =
5335 (LOOP_DOWN_TIME - ha->link_down_timeout);
5336 }
5337
5338 /* Need enough time to try and get the port back. */
5339 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
5340 if (qlport_down_retry)
5341 ha->port_down_retry_count = qlport_down_retry;
5342
5343 /* Set login_retry_count */
5344 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
5345 if (ha->port_down_retry_count ==
5346 le16_to_cpu(nv->port_down_retry_count) &&
5347 ha->port_down_retry_count > 3)
5348 ha->login_retry_count = ha->port_down_retry_count;
5349 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
5350 ha->login_retry_count = ha->port_down_retry_count;
5351 if (ql2xloginretrycount)
5352 ha->login_retry_count = ql2xloginretrycount;
5353
5354 /* Enable ZIO. */
5355 if (!vha->flags.init_done) {
5356 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
5357 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
5358 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
5359 le16_to_cpu(icb->interrupt_delay_timer): 2;
5360 }
5361 icb->firmware_options_2 &= __constant_cpu_to_le32(
5362 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
5363 vha->flags.process_response_queue = 0;
5364 if (ha->zio_mode != QLA_ZIO_DISABLED) {
5365 ha->zio_mode = QLA_ZIO_MODE_6;
5366
5367 ql_log(ql_log_info, vha, 0x0075,
5368 "ZIO mode %d enabled; timer delay (%d us).\n",
5369 ha->zio_mode,
5370 ha->zio_timer * 100);
5371
5372 icb->firmware_options_2 |= cpu_to_le32(
5373 (uint32_t)ha->zio_mode);
5374 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
5375 vha->flags.process_response_queue = 1;
5376 }
5377
5378 if (rval) {
5379 ql_log(ql_log_warn, vha, 0x0076,
5380 "NVRAM configuration failed.\n");
5381 }
5382 return (rval);
5383 }
5384
5385 int
5386 qla82xx_restart_isp(scsi_qla_host_t *vha)
5387 {
5388 int status, rval;
5389 uint32_t wait_time;
5390 struct qla_hw_data *ha = vha->hw;
5391 struct req_que *req = ha->req_q_map[0];
5392 struct rsp_que *rsp = ha->rsp_q_map[0];
5393 struct scsi_qla_host *vp;
5394 unsigned long flags;
5395
5396 status = qla2x00_init_rings(vha);
5397 if (!status) {
5398 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5399 ha->flags.chip_reset_done = 1;
5400
5401 status = qla2x00_fw_ready(vha);
5402 if (!status) {
5403 ql_log(ql_log_info, vha, 0x803c,
5404 "Start configure loop, status =%d.\n", status);
5405
5406 /* Issue a marker after FW becomes ready. */
5407 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
5408
5409 vha->flags.online = 1;
5410 /* Wait at most MAX_TARGET RSCNs for a stable link. */
5411 wait_time = 256;
5412 do {
5413 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5414 qla2x00_configure_loop(vha);
5415 wait_time--;
5416 } while (!atomic_read(&vha->loop_down_timer) &&
5417 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) &&
5418 wait_time &&
5419 (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)));
5420 }
5421
5422 /* if no cable then assume it's good */
5423 if ((vha->device_flags & DFLG_NO_CABLE))
5424 status = 0;
5425
5426 ql_log(ql_log_info, vha, 0x803d,
5427 "Configure loop done, status = 0x%x.\n", status);
5428 }
5429
5430 if (!status) {
5431 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5432
5433 if (!atomic_read(&vha->loop_down_timer)) {
5434 /*
5435 * Issue marker command only when we are going
5436 * to start the I/O .
5437 */
5438 vha->marker_needed = 1;
5439 }
5440
5441 vha->flags.online = 1;
5442
5443 ha->isp_ops->enable_intrs(ha);
5444
5445 ha->isp_abort_cnt = 0;
5446 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
5447
5448 /* Update the firmware version */
5449 qla2x00_get_fw_version(vha, &ha->fw_major_version,
5450 &ha->fw_minor_version, &ha->fw_subminor_version,
5451 &ha->fw_attributes, &ha->fw_memory_size,
5452 ha->mpi_version, &ha->mpi_capabilities,
5453 ha->phy_version);
5454
5455 if (ha->fce) {
5456 ha->flags.fce_enabled = 1;
5457 memset(ha->fce, 0,
5458 fce_calc_size(ha->fce_bufs));
5459 rval = qla2x00_enable_fce_trace(vha,
5460 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
5461 &ha->fce_bufs);
5462 if (rval) {
5463 ql_log(ql_log_warn, vha, 0x803e,
5464 "Unable to reinitialize FCE (%d).\n",
5465 rval);
5466 ha->flags.fce_enabled = 0;
5467 }
5468 }
5469
5470 if (ha->eft) {
5471 memset(ha->eft, 0, EFT_SIZE);
5472 rval = qla2x00_enable_eft_trace(vha,
5473 ha->eft_dma, EFT_NUM_BUFFERS);
5474 if (rval) {
5475 ql_log(ql_log_warn, vha, 0x803f,
5476 "Unable to reinitialize EFT (%d).\n",
5477 rval);
5478 }
5479 }
5480 }
5481
5482 if (!status) {
5483 ql_dbg(ql_dbg_taskm, vha, 0x8040,
5484 "qla82xx_restart_isp succeeded.\n");
5485
5486 spin_lock_irqsave(&ha->vport_slock, flags);
5487 list_for_each_entry(vp, &ha->vp_list, list) {
5488 if (vp->vp_idx) {
5489 atomic_inc(&vp->vref_count);
5490 spin_unlock_irqrestore(&ha->vport_slock, flags);
5491
5492 qla2x00_vp_abort_isp(vp);
5493
5494 spin_lock_irqsave(&ha->vport_slock, flags);
5495 atomic_dec(&vp->vref_count);
5496 }
5497 }
5498 spin_unlock_irqrestore(&ha->vport_slock, flags);
5499
5500 } else {
5501 ql_log(ql_log_warn, vha, 0x8041,
5502 "qla82xx_restart_isp **** FAILED ****.\n");
5503 }
5504
5505 return status;
5506 }
5507
5508 void
5509 qla81xx_update_fw_options(scsi_qla_host_t *vha)
5510 {
5511 struct qla_hw_data *ha = vha->hw;
5512
5513 if (!ql2xetsenable)
5514 return;
5515
5516 /* Enable ETS Burst. */
5517 memset(ha->fw_options, 0, sizeof(ha->fw_options));
5518 ha->fw_options[2] |= BIT_9;
5519 qla2x00_set_fw_options(vha, ha->fw_options);
5520 }
5521
5522 /*
5523 * qla24xx_get_fcp_prio
5524 * Gets the fcp cmd priority value for the logged in port.
5525 * Looks for a match of the port descriptors within
5526 * each of the fcp prio config entries. If a match is found,
5527 * the tag (priority) value is returned.
5528 *
5529 * Input:
5530 * vha = scsi host structure pointer.
5531 * fcport = port structure pointer.
5532 *
5533 * Return:
5534 * non-zero (if found)
5535 * -1 (if not found)
5536 *
5537 * Context:
5538 * Kernel context
5539 */
5540 static int
5541 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
5542 {
5543 int i, entries;
5544 uint8_t pid_match, wwn_match;
5545 int priority;
5546 uint32_t pid1, pid2;
5547 uint64_t wwn1, wwn2;
5548 struct qla_fcp_prio_entry *pri_entry;
5549 struct qla_hw_data *ha = vha->hw;
5550
5551 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
5552 return -1;
5553
5554 priority = -1;
5555 entries = ha->fcp_prio_cfg->num_entries;
5556 pri_entry = &ha->fcp_prio_cfg->entry[0];
5557
5558 for (i = 0; i < entries; i++) {
5559 pid_match = wwn_match = 0;
5560
5561 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
5562 pri_entry++;
5563 continue;
5564 }
5565
5566 /* check source pid for a match */
5567 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
5568 pid1 = pri_entry->src_pid & INVALID_PORT_ID;
5569 pid2 = vha->d_id.b24 & INVALID_PORT_ID;
5570 if (pid1 == INVALID_PORT_ID)
5571 pid_match++;
5572 else if (pid1 == pid2)
5573 pid_match++;
5574 }
5575
5576 /* check destination pid for a match */
5577 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
5578 pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
5579 pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
5580 if (pid1 == INVALID_PORT_ID)
5581 pid_match++;
5582 else if (pid1 == pid2)
5583 pid_match++;
5584 }
5585
5586 /* check source WWN for a match */
5587 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
5588 wwn1 = wwn_to_u64(vha->port_name);
5589 wwn2 = wwn_to_u64(pri_entry->src_wwpn);
5590 if (wwn2 == (uint64_t)-1)
5591 wwn_match++;
5592 else if (wwn1 == wwn2)
5593 wwn_match++;
5594 }
5595
5596 /* check destination WWN for a match */
5597 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
5598 wwn1 = wwn_to_u64(fcport->port_name);
5599 wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
5600 if (wwn2 == (uint64_t)-1)
5601 wwn_match++;
5602 else if (wwn1 == wwn2)
5603 wwn_match++;
5604 }
5605
5606 if (pid_match == 2 || wwn_match == 2) {
5607 /* Found a matching entry */
5608 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
5609 priority = pri_entry->tag;
5610 break;
5611 }
5612
5613 pri_entry++;
5614 }
5615
5616 return priority;
5617 }
5618
5619 /*
5620 * qla24xx_update_fcport_fcp_prio
5621 * Activates fcp priority for the logged in fc port
5622 *
5623 * Input:
5624 * vha = scsi host structure pointer.
5625 * fcp = port structure pointer.
5626 *
5627 * Return:
5628 * QLA_SUCCESS or QLA_FUNCTION_FAILED
5629 *
5630 * Context:
5631 * Kernel context.
5632 */
5633 int
5634 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
5635 {
5636 int ret;
5637 int priority;
5638 uint16_t mb[5];
5639
5640 if (fcport->port_type != FCT_TARGET ||
5641 fcport->loop_id == FC_NO_LOOP_ID)
5642 return QLA_FUNCTION_FAILED;
5643
5644 priority = qla24xx_get_fcp_prio(vha, fcport);
5645 if (priority < 0)
5646 return QLA_FUNCTION_FAILED;
5647
5648 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
5649 if (ret == QLA_SUCCESS)
5650 fcport->fcp_prio = priority;
5651 else
5652 ql_dbg(ql_dbg_user, vha, 0x704f,
5653 "Unable to activate fcp priority, ret=0x%x.\n", ret);
5654
5655 return ret;
5656 }
5657
5658 /*
5659 * qla24xx_update_all_fcp_prio
5660 * Activates fcp priority for all the logged in ports
5661 *
5662 * Input:
5663 * ha = adapter block pointer.
5664 *
5665 * Return:
5666 * QLA_SUCCESS or QLA_FUNCTION_FAILED
5667 *
5668 * Context:
5669 * Kernel context.
5670 */
5671 int
5672 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
5673 {
5674 int ret;
5675 fc_port_t *fcport;
5676
5677 ret = QLA_FUNCTION_FAILED;
5678 /* We need to set priority for all logged in ports */
5679 list_for_each_entry(fcport, &vha->vp_fcports, list)
5680 ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
5681
5682 return ret;
5683 }
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