include: replace linux/module.h with "struct module" wherever possible
[linux-2.6/next.git] / drivers / usb / host / xhci-hub.c
blobce60c21f6402bfd0a269b329dde989e55162bedd
1 /*
2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
6 * Author: Sarah Sharp
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/gfp.h>
24 #include <asm/unaligned.h>
26 #include "xhci.h"
28 #define PORT_WAKE_BITS (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
29 #define PORT_RWC_BITS (PORT_CSC | PORT_PEC | PORT_WRC | PORT_OCC | \
30 PORT_RC | PORT_PLC | PORT_PE)
32 static void xhci_common_hub_descriptor(struct xhci_hcd *xhci,
33 struct usb_hub_descriptor *desc, int ports)
35 u16 temp;
37 desc->bPwrOn2PwrGood = 10; /* xhci section 5.4.9 says 20ms max */
38 desc->bHubContrCurrent = 0;
40 desc->bNbrPorts = ports;
41 /* Ugh, these should be #defines, FIXME */
42 /* Using table 11-13 in USB 2.0 spec. */
43 temp = 0;
44 /* Bits 1:0 - support port power switching, or power always on */
45 if (HCC_PPC(xhci->hcc_params))
46 temp |= 0x0001;
47 else
48 temp |= 0x0002;
49 /* Bit 2 - root hubs are not part of a compound device */
50 /* Bits 4:3 - individual port over current protection */
51 temp |= 0x0008;
52 /* Bits 6:5 - no TTs in root ports */
53 /* Bit 7 - no port indicators */
54 desc->wHubCharacteristics = cpu_to_le16(temp);
57 /* Fill in the USB 2.0 roothub descriptor */
58 static void xhci_usb2_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
59 struct usb_hub_descriptor *desc)
61 int ports;
62 u16 temp;
63 __u8 port_removable[(USB_MAXCHILDREN + 1 + 7) / 8];
64 u32 portsc;
65 unsigned int i;
67 ports = xhci->num_usb2_ports;
69 xhci_common_hub_descriptor(xhci, desc, ports);
70 desc->bDescriptorType = 0x29;
71 temp = 1 + (ports / 8);
72 desc->bDescLength = 7 + 2 * temp;
74 /* The Device Removable bits are reported on a byte granularity.
75 * If the port doesn't exist within that byte, the bit is set to 0.
77 memset(port_removable, 0, sizeof(port_removable));
78 for (i = 0; i < ports; i++) {
79 portsc = xhci_readl(xhci, xhci->usb3_ports[i]);
80 /* If a device is removable, PORTSC reports a 0, same as in the
81 * hub descriptor DeviceRemovable bits.
83 if (portsc & PORT_DEV_REMOVE)
84 /* This math is hairy because bit 0 of DeviceRemovable
85 * is reserved, and bit 1 is for port 1, etc.
87 port_removable[(i + 1) / 8] |= 1 << ((i + 1) % 8);
90 /* ch11.h defines a hub descriptor that has room for USB_MAXCHILDREN
91 * ports on it. The USB 2.0 specification says that there are two
92 * variable length fields at the end of the hub descriptor:
93 * DeviceRemovable and PortPwrCtrlMask. But since we can have less than
94 * USB_MAXCHILDREN ports, we may need to use the DeviceRemovable array
95 * to set PortPwrCtrlMask bits. PortPwrCtrlMask must always be set to
96 * 0xFF, so we initialize the both arrays (DeviceRemovable and
97 * PortPwrCtrlMask) to 0xFF. Then we set the DeviceRemovable for each
98 * set of ports that actually exist.
100 memset(desc->u.hs.DeviceRemovable, 0xff,
101 sizeof(desc->u.hs.DeviceRemovable));
102 memset(desc->u.hs.PortPwrCtrlMask, 0xff,
103 sizeof(desc->u.hs.PortPwrCtrlMask));
105 for (i = 0; i < (ports + 1 + 7) / 8; i++)
106 memset(&desc->u.hs.DeviceRemovable[i], port_removable[i],
107 sizeof(__u8));
110 /* Fill in the USB 3.0 roothub descriptor */
111 static void xhci_usb3_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
112 struct usb_hub_descriptor *desc)
114 int ports;
115 u16 port_removable;
116 u32 portsc;
117 unsigned int i;
119 ports = xhci->num_usb3_ports;
120 xhci_common_hub_descriptor(xhci, desc, ports);
121 desc->bDescriptorType = 0x2a;
122 desc->bDescLength = 12;
124 /* header decode latency should be zero for roothubs,
125 * see section 4.23.5.2.
127 desc->u.ss.bHubHdrDecLat = 0;
128 desc->u.ss.wHubDelay = 0;
130 port_removable = 0;
131 /* bit 0 is reserved, bit 1 is for port 1, etc. */
132 for (i = 0; i < ports; i++) {
133 portsc = xhci_readl(xhci, xhci->usb3_ports[i]);
134 if (portsc & PORT_DEV_REMOVE)
135 port_removable |= 1 << (i + 1);
137 memset(&desc->u.ss.DeviceRemovable,
138 (__force __u16) cpu_to_le16(port_removable),
139 sizeof(__u16));
142 static void xhci_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
143 struct usb_hub_descriptor *desc)
146 if (hcd->speed == HCD_USB3)
147 xhci_usb3_hub_descriptor(hcd, xhci, desc);
148 else
149 xhci_usb2_hub_descriptor(hcd, xhci, desc);
153 static unsigned int xhci_port_speed(unsigned int port_status)
155 if (DEV_LOWSPEED(port_status))
156 return USB_PORT_STAT_LOW_SPEED;
157 if (DEV_HIGHSPEED(port_status))
158 return USB_PORT_STAT_HIGH_SPEED;
160 * FIXME: Yes, we should check for full speed, but the core uses that as
161 * a default in portspeed() in usb/core/hub.c (which is the only place
162 * USB_PORT_STAT_*_SPEED is used).
164 return 0;
168 * These bits are Read Only (RO) and should be saved and written to the
169 * registers: 0, 3, 10:13, 30
170 * connect status, over-current status, port speed, and device removable.
171 * connect status and port speed are also sticky - meaning they're in
172 * the AUX well and they aren't changed by a hot, warm, or cold reset.
174 #define XHCI_PORT_RO ((1<<0) | (1<<3) | (0xf<<10) | (1<<30))
176 * These bits are RW; writing a 0 clears the bit, writing a 1 sets the bit:
177 * bits 5:8, 9, 14:15, 25:27
178 * link state, port power, port indicator state, "wake on" enable state
180 #define XHCI_PORT_RWS ((0xf<<5) | (1<<9) | (0x3<<14) | (0x7<<25))
182 * These bits are RW; writing a 1 sets the bit, writing a 0 has no effect:
183 * bit 4 (port reset)
185 #define XHCI_PORT_RW1S ((1<<4))
187 * These bits are RW; writing a 1 clears the bit, writing a 0 has no effect:
188 * bits 1, 17, 18, 19, 20, 21, 22, 23
189 * port enable/disable, and
190 * change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
191 * over-current, reset, link state, and L1 change
193 #define XHCI_PORT_RW1CS ((1<<1) | (0x7f<<17))
195 * Bit 16 is RW, and writing a '1' to it causes the link state control to be
196 * latched in
198 #define XHCI_PORT_RW ((1<<16))
200 * These bits are Reserved Zero (RsvdZ) and zero should be written to them:
201 * bits 2, 24, 28:31
203 #define XHCI_PORT_RZ ((1<<2) | (1<<24) | (0xf<<28))
206 * Given a port state, this function returns a value that would result in the
207 * port being in the same state, if the value was written to the port status
208 * control register.
209 * Save Read Only (RO) bits and save read/write bits where
210 * writing a 0 clears the bit and writing a 1 sets the bit (RWS).
211 * For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect.
213 u32 xhci_port_state_to_neutral(u32 state)
215 /* Save read-only status and port state */
216 return (state & XHCI_PORT_RO) | (state & XHCI_PORT_RWS);
220 * find slot id based on port number.
221 * @port: The one-based port number from one of the two split roothubs.
223 int xhci_find_slot_id_by_port(struct usb_hcd *hcd, struct xhci_hcd *xhci,
224 u16 port)
226 int slot_id;
227 int i;
228 enum usb_device_speed speed;
230 slot_id = 0;
231 for (i = 0; i < MAX_HC_SLOTS; i++) {
232 if (!xhci->devs[i])
233 continue;
234 speed = xhci->devs[i]->udev->speed;
235 if (((speed == USB_SPEED_SUPER) == (hcd->speed == HCD_USB3))
236 && xhci->devs[i]->port == port) {
237 slot_id = i;
238 break;
242 return slot_id;
246 * Stop device
247 * It issues stop endpoint command for EP 0 to 30. And wait the last command
248 * to complete.
249 * suspend will set to 1, if suspend bit need to set in command.
251 static int xhci_stop_device(struct xhci_hcd *xhci, int slot_id, int suspend)
253 struct xhci_virt_device *virt_dev;
254 struct xhci_command *cmd;
255 unsigned long flags;
256 int timeleft;
257 int ret;
258 int i;
260 ret = 0;
261 virt_dev = xhci->devs[slot_id];
262 cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
263 if (!cmd) {
264 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
265 return -ENOMEM;
268 spin_lock_irqsave(&xhci->lock, flags);
269 for (i = LAST_EP_INDEX; i > 0; i--) {
270 if (virt_dev->eps[i].ring && virt_dev->eps[i].ring->dequeue)
271 xhci_queue_stop_endpoint(xhci, slot_id, i, suspend);
273 cmd->command_trb = xhci->cmd_ring->enqueue;
274 list_add_tail(&cmd->cmd_list, &virt_dev->cmd_list);
275 xhci_queue_stop_endpoint(xhci, slot_id, 0, suspend);
276 xhci_ring_cmd_db(xhci);
277 spin_unlock_irqrestore(&xhci->lock, flags);
279 /* Wait for last stop endpoint command to finish */
280 timeleft = wait_for_completion_interruptible_timeout(
281 cmd->completion,
282 USB_CTRL_SET_TIMEOUT);
283 if (timeleft <= 0) {
284 xhci_warn(xhci, "%s while waiting for stop endpoint command\n",
285 timeleft == 0 ? "Timeout" : "Signal");
286 spin_lock_irqsave(&xhci->lock, flags);
287 /* The timeout might have raced with the event ring handler, so
288 * only delete from the list if the item isn't poisoned.
290 if (cmd->cmd_list.next != LIST_POISON1)
291 list_del(&cmd->cmd_list);
292 spin_unlock_irqrestore(&xhci->lock, flags);
293 ret = -ETIME;
294 goto command_cleanup;
297 command_cleanup:
298 xhci_free_command(xhci, cmd);
299 return ret;
303 * Ring device, it rings the all doorbells unconditionally.
305 void xhci_ring_device(struct xhci_hcd *xhci, int slot_id)
307 int i;
309 for (i = 0; i < LAST_EP_INDEX + 1; i++)
310 if (xhci->devs[slot_id]->eps[i].ring &&
311 xhci->devs[slot_id]->eps[i].ring->dequeue)
312 xhci_ring_ep_doorbell(xhci, slot_id, i, 0);
314 return;
317 static void xhci_disable_port(struct usb_hcd *hcd, struct xhci_hcd *xhci,
318 u16 wIndex, __le32 __iomem *addr, u32 port_status)
320 /* Don't allow the USB core to disable SuperSpeed ports. */
321 if (hcd->speed == HCD_USB3) {
322 xhci_dbg(xhci, "Ignoring request to disable "
323 "SuperSpeed port.\n");
324 return;
327 /* Write 1 to disable the port */
328 xhci_writel(xhci, port_status | PORT_PE, addr);
329 port_status = xhci_readl(xhci, addr);
330 xhci_dbg(xhci, "disable port, actual port %d status = 0x%x\n",
331 wIndex, port_status);
334 static void xhci_clear_port_change_bit(struct xhci_hcd *xhci, u16 wValue,
335 u16 wIndex, __le32 __iomem *addr, u32 port_status)
337 char *port_change_bit;
338 u32 status;
340 switch (wValue) {
341 case USB_PORT_FEAT_C_RESET:
342 status = PORT_RC;
343 port_change_bit = "reset";
344 break;
345 case USB_PORT_FEAT_C_BH_PORT_RESET:
346 status = PORT_WRC;
347 port_change_bit = "warm(BH) reset";
348 break;
349 case USB_PORT_FEAT_C_CONNECTION:
350 status = PORT_CSC;
351 port_change_bit = "connect";
352 break;
353 case USB_PORT_FEAT_C_OVER_CURRENT:
354 status = PORT_OCC;
355 port_change_bit = "over-current";
356 break;
357 case USB_PORT_FEAT_C_ENABLE:
358 status = PORT_PEC;
359 port_change_bit = "enable/disable";
360 break;
361 case USB_PORT_FEAT_C_SUSPEND:
362 status = PORT_PLC;
363 port_change_bit = "suspend/resume";
364 break;
365 case USB_PORT_FEAT_C_PORT_LINK_STATE:
366 status = PORT_PLC;
367 port_change_bit = "link state";
368 break;
369 default:
370 /* Should never happen */
371 return;
373 /* Change bits are all write 1 to clear */
374 xhci_writel(xhci, port_status | status, addr);
375 port_status = xhci_readl(xhci, addr);
376 xhci_dbg(xhci, "clear port %s change, actual port %d status = 0x%x\n",
377 port_change_bit, wIndex, port_status);
380 static int xhci_get_ports(struct usb_hcd *hcd, __le32 __iomem ***port_array)
382 int max_ports;
383 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
385 if (hcd->speed == HCD_USB3) {
386 max_ports = xhci->num_usb3_ports;
387 *port_array = xhci->usb3_ports;
388 } else {
389 max_ports = xhci->num_usb2_ports;
390 *port_array = xhci->usb2_ports;
393 return max_ports;
396 int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
397 u16 wIndex, char *buf, u16 wLength)
399 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
400 int max_ports;
401 unsigned long flags;
402 u32 temp, temp1, status;
403 int retval = 0;
404 __le32 __iomem **port_array;
405 int slot_id;
406 struct xhci_bus_state *bus_state;
407 u16 link_state = 0;
409 max_ports = xhci_get_ports(hcd, &port_array);
410 bus_state = &xhci->bus_state[hcd_index(hcd)];
412 spin_lock_irqsave(&xhci->lock, flags);
413 switch (typeReq) {
414 case GetHubStatus:
415 /* No power source, over-current reported per port */
416 memset(buf, 0, 4);
417 break;
418 case GetHubDescriptor:
419 /* Check to make sure userspace is asking for the USB 3.0 hub
420 * descriptor for the USB 3.0 roothub. If not, we stall the
421 * endpoint, like external hubs do.
423 if (hcd->speed == HCD_USB3 &&
424 (wLength < USB_DT_SS_HUB_SIZE ||
425 wValue != (USB_DT_SS_HUB << 8))) {
426 xhci_dbg(xhci, "Wrong hub descriptor type for "
427 "USB 3.0 roothub.\n");
428 goto error;
430 xhci_hub_descriptor(hcd, xhci,
431 (struct usb_hub_descriptor *) buf);
432 break;
433 case GetPortStatus:
434 if (!wIndex || wIndex > max_ports)
435 goto error;
436 wIndex--;
437 status = 0;
438 temp = xhci_readl(xhci, port_array[wIndex]);
439 if (temp == 0xffffffff) {
440 retval = -ENODEV;
441 break;
443 xhci_dbg(xhci, "get port status, actual port %d status = 0x%x\n", wIndex, temp);
445 /* wPortChange bits */
446 if (temp & PORT_CSC)
447 status |= USB_PORT_STAT_C_CONNECTION << 16;
448 if (temp & PORT_PEC)
449 status |= USB_PORT_STAT_C_ENABLE << 16;
450 if ((temp & PORT_OCC))
451 status |= USB_PORT_STAT_C_OVERCURRENT << 16;
452 if ((temp & PORT_RC))
453 status |= USB_PORT_STAT_C_RESET << 16;
454 /* USB3.0 only */
455 if (hcd->speed == HCD_USB3) {
456 if ((temp & PORT_PLC))
457 status |= USB_PORT_STAT_C_LINK_STATE << 16;
458 if ((temp & PORT_WRC))
459 status |= USB_PORT_STAT_C_BH_RESET << 16;
462 if (hcd->speed != HCD_USB3) {
463 if ((temp & PORT_PLS_MASK) == XDEV_U3
464 && (temp & PORT_POWER))
465 status |= USB_PORT_STAT_SUSPEND;
467 if ((temp & PORT_PLS_MASK) == XDEV_RESUME) {
468 if ((temp & PORT_RESET) || !(temp & PORT_PE))
469 goto error;
470 if (!DEV_SUPERSPEED(temp) && time_after_eq(jiffies,
471 bus_state->resume_done[wIndex])) {
472 xhci_dbg(xhci, "Resume USB2 port %d\n",
473 wIndex + 1);
474 bus_state->resume_done[wIndex] = 0;
475 temp1 = xhci_port_state_to_neutral(temp);
476 temp1 &= ~PORT_PLS_MASK;
477 temp1 |= PORT_LINK_STROBE | XDEV_U0;
478 xhci_writel(xhci, temp1, port_array[wIndex]);
480 xhci_dbg(xhci, "set port %d resume\n",
481 wIndex + 1);
482 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
483 wIndex + 1);
484 if (!slot_id) {
485 xhci_dbg(xhci, "slot_id is zero\n");
486 goto error;
488 xhci_ring_device(xhci, slot_id);
489 bus_state->port_c_suspend |= 1 << wIndex;
490 bus_state->suspended_ports &= ~(1 << wIndex);
493 if ((temp & PORT_PLS_MASK) == XDEV_U0
494 && (temp & PORT_POWER)
495 && (bus_state->suspended_ports & (1 << wIndex))) {
496 bus_state->suspended_ports &= ~(1 << wIndex);
497 if (hcd->speed != HCD_USB3)
498 bus_state->port_c_suspend |= 1 << wIndex;
500 if (temp & PORT_CONNECT) {
501 status |= USB_PORT_STAT_CONNECTION;
502 status |= xhci_port_speed(temp);
504 if (temp & PORT_PE)
505 status |= USB_PORT_STAT_ENABLE;
506 if (temp & PORT_OC)
507 status |= USB_PORT_STAT_OVERCURRENT;
508 if (temp & PORT_RESET)
509 status |= USB_PORT_STAT_RESET;
510 if (temp & PORT_POWER) {
511 if (hcd->speed == HCD_USB3)
512 status |= USB_SS_PORT_STAT_POWER;
513 else
514 status |= USB_PORT_STAT_POWER;
516 /* Port Link State */
517 if (hcd->speed == HCD_USB3) {
518 /* resume state is a xHCI internal state.
519 * Do not report it to usb core.
521 if ((temp & PORT_PLS_MASK) != XDEV_RESUME)
522 status |= (temp & PORT_PLS_MASK);
524 if (bus_state->port_c_suspend & (1 << wIndex))
525 status |= 1 << USB_PORT_FEAT_C_SUSPEND;
526 xhci_dbg(xhci, "Get port status returned 0x%x\n", status);
527 put_unaligned(cpu_to_le32(status), (__le32 *) buf);
528 break;
529 case SetPortFeature:
530 if (wValue == USB_PORT_FEAT_LINK_STATE)
531 link_state = (wIndex & 0xff00) >> 3;
532 wIndex &= 0xff;
533 if (!wIndex || wIndex > max_ports)
534 goto error;
535 wIndex--;
536 temp = xhci_readl(xhci, port_array[wIndex]);
537 if (temp == 0xffffffff) {
538 retval = -ENODEV;
539 break;
541 temp = xhci_port_state_to_neutral(temp);
542 /* FIXME: What new port features do we need to support? */
543 switch (wValue) {
544 case USB_PORT_FEAT_SUSPEND:
545 temp = xhci_readl(xhci, port_array[wIndex]);
546 /* In spec software should not attempt to suspend
547 * a port unless the port reports that it is in the
548 * enabled (PED = ‘1’,PLS < ‘3’) state.
550 if ((temp & PORT_PE) == 0 || (temp & PORT_RESET)
551 || (temp & PORT_PLS_MASK) >= XDEV_U3) {
552 xhci_warn(xhci, "USB core suspending device "
553 "not in U0/U1/U2.\n");
554 goto error;
557 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
558 wIndex + 1);
559 if (!slot_id) {
560 xhci_warn(xhci, "slot_id is zero\n");
561 goto error;
563 /* unlock to execute stop endpoint commands */
564 spin_unlock_irqrestore(&xhci->lock, flags);
565 xhci_stop_device(xhci, slot_id, 1);
566 spin_lock_irqsave(&xhci->lock, flags);
568 temp = xhci_port_state_to_neutral(temp);
569 temp &= ~PORT_PLS_MASK;
570 temp |= PORT_LINK_STROBE | XDEV_U3;
571 xhci_writel(xhci, temp, port_array[wIndex]);
573 spin_unlock_irqrestore(&xhci->lock, flags);
574 msleep(10); /* wait device to enter */
575 spin_lock_irqsave(&xhci->lock, flags);
577 temp = xhci_readl(xhci, port_array[wIndex]);
578 bus_state->suspended_ports |= 1 << wIndex;
579 break;
580 case USB_PORT_FEAT_LINK_STATE:
581 temp = xhci_readl(xhci, port_array[wIndex]);
582 /* Software should not attempt to set
583 * port link state above '5' (Rx.Detect) and the port
584 * must be enabled.
586 if ((temp & PORT_PE) == 0 ||
587 (link_state > USB_SS_PORT_LS_RX_DETECT)) {
588 xhci_warn(xhci, "Cannot set link state.\n");
589 goto error;
592 if (link_state == USB_SS_PORT_LS_U3) {
593 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
594 wIndex + 1);
595 if (slot_id) {
596 /* unlock to execute stop endpoint
597 * commands */
598 spin_unlock_irqrestore(&xhci->lock,
599 flags);
600 xhci_stop_device(xhci, slot_id, 1);
601 spin_lock_irqsave(&xhci->lock, flags);
605 temp = xhci_port_state_to_neutral(temp);
606 temp &= ~PORT_PLS_MASK;
607 temp |= PORT_LINK_STROBE | link_state;
608 xhci_writel(xhci, temp, port_array[wIndex]);
610 spin_unlock_irqrestore(&xhci->lock, flags);
611 msleep(20); /* wait device to enter */
612 spin_lock_irqsave(&xhci->lock, flags);
614 temp = xhci_readl(xhci, port_array[wIndex]);
615 if (link_state == USB_SS_PORT_LS_U3)
616 bus_state->suspended_ports |= 1 << wIndex;
617 break;
618 case USB_PORT_FEAT_POWER:
620 * Turn on ports, even if there isn't per-port switching.
621 * HC will report connect events even before this is set.
622 * However, khubd will ignore the roothub events until
623 * the roothub is registered.
625 xhci_writel(xhci, temp | PORT_POWER,
626 port_array[wIndex]);
628 temp = xhci_readl(xhci, port_array[wIndex]);
629 xhci_dbg(xhci, "set port power, actual port %d status = 0x%x\n", wIndex, temp);
630 break;
631 case USB_PORT_FEAT_RESET:
632 temp = (temp | PORT_RESET);
633 xhci_writel(xhci, temp, port_array[wIndex]);
635 temp = xhci_readl(xhci, port_array[wIndex]);
636 xhci_dbg(xhci, "set port reset, actual port %d status = 0x%x\n", wIndex, temp);
637 break;
638 case USB_PORT_FEAT_BH_PORT_RESET:
639 temp |= PORT_WR;
640 xhci_writel(xhci, temp, port_array[wIndex]);
642 temp = xhci_readl(xhci, port_array[wIndex]);
643 break;
644 default:
645 goto error;
647 /* unblock any posted writes */
648 temp = xhci_readl(xhci, port_array[wIndex]);
649 break;
650 case ClearPortFeature:
651 if (!wIndex || wIndex > max_ports)
652 goto error;
653 wIndex--;
654 temp = xhci_readl(xhci, port_array[wIndex]);
655 if (temp == 0xffffffff) {
656 retval = -ENODEV;
657 break;
659 /* FIXME: What new port features do we need to support? */
660 temp = xhci_port_state_to_neutral(temp);
661 switch (wValue) {
662 case USB_PORT_FEAT_SUSPEND:
663 temp = xhci_readl(xhci, port_array[wIndex]);
664 xhci_dbg(xhci, "clear USB_PORT_FEAT_SUSPEND\n");
665 xhci_dbg(xhci, "PORTSC %04x\n", temp);
666 if (temp & PORT_RESET)
667 goto error;
668 if (temp & XDEV_U3) {
669 if ((temp & PORT_PE) == 0)
670 goto error;
672 temp = xhci_port_state_to_neutral(temp);
673 temp &= ~PORT_PLS_MASK;
674 temp |= PORT_LINK_STROBE | XDEV_RESUME;
675 xhci_writel(xhci, temp,
676 port_array[wIndex]);
678 spin_unlock_irqrestore(&xhci->lock,
679 flags);
680 msleep(20);
681 spin_lock_irqsave(&xhci->lock, flags);
683 temp = xhci_readl(xhci,
684 port_array[wIndex]);
685 temp = xhci_port_state_to_neutral(temp);
686 temp &= ~PORT_PLS_MASK;
687 temp |= PORT_LINK_STROBE | XDEV_U0;
688 xhci_writel(xhci, temp,
689 port_array[wIndex]);
691 bus_state->port_c_suspend |= 1 << wIndex;
693 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
694 wIndex + 1);
695 if (!slot_id) {
696 xhci_dbg(xhci, "slot_id is zero\n");
697 goto error;
699 xhci_ring_device(xhci, slot_id);
700 break;
701 case USB_PORT_FEAT_C_SUSPEND:
702 bus_state->port_c_suspend &= ~(1 << wIndex);
703 case USB_PORT_FEAT_C_RESET:
704 case USB_PORT_FEAT_C_BH_PORT_RESET:
705 case USB_PORT_FEAT_C_CONNECTION:
706 case USB_PORT_FEAT_C_OVER_CURRENT:
707 case USB_PORT_FEAT_C_ENABLE:
708 case USB_PORT_FEAT_C_PORT_LINK_STATE:
709 xhci_clear_port_change_bit(xhci, wValue, wIndex,
710 port_array[wIndex], temp);
711 break;
712 case USB_PORT_FEAT_ENABLE:
713 xhci_disable_port(hcd, xhci, wIndex,
714 port_array[wIndex], temp);
715 break;
716 default:
717 goto error;
719 break;
720 default:
721 error:
722 /* "stall" on error */
723 retval = -EPIPE;
725 spin_unlock_irqrestore(&xhci->lock, flags);
726 return retval;
730 * Returns 0 if the status hasn't changed, or the number of bytes in buf.
731 * Ports are 0-indexed from the HCD point of view,
732 * and 1-indexed from the USB core pointer of view.
734 * Note that the status change bits will be cleared as soon as a port status
735 * change event is generated, so we use the saved status from that event.
737 int xhci_hub_status_data(struct usb_hcd *hcd, char *buf)
739 unsigned long flags;
740 u32 temp, status;
741 u32 mask;
742 int i, retval;
743 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
744 int max_ports;
745 __le32 __iomem **port_array;
746 struct xhci_bus_state *bus_state;
748 max_ports = xhci_get_ports(hcd, &port_array);
749 bus_state = &xhci->bus_state[hcd_index(hcd)];
751 /* Initial status is no changes */
752 retval = (max_ports + 8) / 8;
753 memset(buf, 0, retval);
754 status = 0;
756 mask = PORT_CSC | PORT_PEC | PORT_OCC | PORT_PLC;
758 spin_lock_irqsave(&xhci->lock, flags);
759 /* For each port, did anything change? If so, set that bit in buf. */
760 for (i = 0; i < max_ports; i++) {
761 temp = xhci_readl(xhci, port_array[i]);
762 if (temp == 0xffffffff) {
763 retval = -ENODEV;
764 break;
766 if ((temp & mask) != 0 ||
767 (bus_state->port_c_suspend & 1 << i) ||
768 (bus_state->resume_done[i] && time_after_eq(
769 jiffies, bus_state->resume_done[i]))) {
770 buf[(i + 1) / 8] |= 1 << (i + 1) % 8;
771 status = 1;
774 spin_unlock_irqrestore(&xhci->lock, flags);
775 return status ? retval : 0;
778 #ifdef CONFIG_PM
780 int xhci_bus_suspend(struct usb_hcd *hcd)
782 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
783 int max_ports, port_index;
784 __le32 __iomem **port_array;
785 struct xhci_bus_state *bus_state;
786 unsigned long flags;
788 max_ports = xhci_get_ports(hcd, &port_array);
789 bus_state = &xhci->bus_state[hcd_index(hcd)];
791 spin_lock_irqsave(&xhci->lock, flags);
793 if (hcd->self.root_hub->do_remote_wakeup) {
794 port_index = max_ports;
795 while (port_index--) {
796 if (bus_state->resume_done[port_index] != 0) {
797 spin_unlock_irqrestore(&xhci->lock, flags);
798 xhci_dbg(xhci, "suspend failed because "
799 "port %d is resuming\n",
800 port_index + 1);
801 return -EBUSY;
806 port_index = max_ports;
807 bus_state->bus_suspended = 0;
808 while (port_index--) {
809 /* suspend the port if the port is not suspended */
810 u32 t1, t2;
811 int slot_id;
813 t1 = xhci_readl(xhci, port_array[port_index]);
814 t2 = xhci_port_state_to_neutral(t1);
816 if ((t1 & PORT_PE) && !(t1 & PORT_PLS_MASK)) {
817 xhci_dbg(xhci, "port %d not suspended\n", port_index);
818 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
819 port_index + 1);
820 if (slot_id) {
821 spin_unlock_irqrestore(&xhci->lock, flags);
822 xhci_stop_device(xhci, slot_id, 1);
823 spin_lock_irqsave(&xhci->lock, flags);
825 t2 &= ~PORT_PLS_MASK;
826 t2 |= PORT_LINK_STROBE | XDEV_U3;
827 set_bit(port_index, &bus_state->bus_suspended);
829 if (hcd->self.root_hub->do_remote_wakeup) {
830 if (t1 & PORT_CONNECT) {
831 t2 |= PORT_WKOC_E | PORT_WKDISC_E;
832 t2 &= ~PORT_WKCONN_E;
833 } else {
834 t2 |= PORT_WKOC_E | PORT_WKCONN_E;
835 t2 &= ~PORT_WKDISC_E;
837 } else
838 t2 &= ~PORT_WAKE_BITS;
840 t1 = xhci_port_state_to_neutral(t1);
841 if (t1 != t2)
842 xhci_writel(xhci, t2, port_array[port_index]);
844 if (hcd->speed != HCD_USB3) {
845 /* enable remote wake up for USB 2.0 */
846 __le32 __iomem *addr;
847 u32 tmp;
849 /* Add one to the port status register address to get
850 * the port power control register address.
852 addr = port_array[port_index] + 1;
853 tmp = xhci_readl(xhci, addr);
854 tmp |= PORT_RWE;
855 xhci_writel(xhci, tmp, addr);
858 hcd->state = HC_STATE_SUSPENDED;
859 bus_state->next_statechange = jiffies + msecs_to_jiffies(10);
860 spin_unlock_irqrestore(&xhci->lock, flags);
861 return 0;
864 int xhci_bus_resume(struct usb_hcd *hcd)
866 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
867 int max_ports, port_index;
868 __le32 __iomem **port_array;
869 struct xhci_bus_state *bus_state;
870 u32 temp;
871 unsigned long flags;
873 max_ports = xhci_get_ports(hcd, &port_array);
874 bus_state = &xhci->bus_state[hcd_index(hcd)];
876 if (time_before(jiffies, bus_state->next_statechange))
877 msleep(5);
879 spin_lock_irqsave(&xhci->lock, flags);
880 if (!HCD_HW_ACCESSIBLE(hcd)) {
881 spin_unlock_irqrestore(&xhci->lock, flags);
882 return -ESHUTDOWN;
885 /* delay the irqs */
886 temp = xhci_readl(xhci, &xhci->op_regs->command);
887 temp &= ~CMD_EIE;
888 xhci_writel(xhci, temp, &xhci->op_regs->command);
890 port_index = max_ports;
891 while (port_index--) {
892 /* Check whether need resume ports. If needed
893 resume port and disable remote wakeup */
894 u32 temp;
895 int slot_id;
897 temp = xhci_readl(xhci, port_array[port_index]);
898 if (DEV_SUPERSPEED(temp))
899 temp &= ~(PORT_RWC_BITS | PORT_CEC | PORT_WAKE_BITS);
900 else
901 temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
902 if (test_bit(port_index, &bus_state->bus_suspended) &&
903 (temp & PORT_PLS_MASK)) {
904 if (DEV_SUPERSPEED(temp)) {
905 temp = xhci_port_state_to_neutral(temp);
906 temp &= ~PORT_PLS_MASK;
907 temp |= PORT_LINK_STROBE | XDEV_U0;
908 xhci_writel(xhci, temp, port_array[port_index]);
909 } else {
910 temp = xhci_port_state_to_neutral(temp);
911 temp &= ~PORT_PLS_MASK;
912 temp |= PORT_LINK_STROBE | XDEV_RESUME;
913 xhci_writel(xhci, temp, port_array[port_index]);
915 spin_unlock_irqrestore(&xhci->lock, flags);
916 msleep(20);
917 spin_lock_irqsave(&xhci->lock, flags);
919 temp = xhci_readl(xhci, port_array[port_index]);
920 temp = xhci_port_state_to_neutral(temp);
921 temp &= ~PORT_PLS_MASK;
922 temp |= PORT_LINK_STROBE | XDEV_U0;
923 xhci_writel(xhci, temp, port_array[port_index]);
925 /* wait for the port to enter U0 and report port link
926 * state change.
928 spin_unlock_irqrestore(&xhci->lock, flags);
929 msleep(20);
930 spin_lock_irqsave(&xhci->lock, flags);
932 /* Clear PLC */
933 temp = xhci_readl(xhci, port_array[port_index]);
934 if (temp & PORT_PLC) {
935 temp = xhci_port_state_to_neutral(temp);
936 temp |= PORT_PLC;
937 xhci_writel(xhci, temp, port_array[port_index]);
940 slot_id = xhci_find_slot_id_by_port(hcd,
941 xhci, port_index + 1);
942 if (slot_id)
943 xhci_ring_device(xhci, slot_id);
944 } else
945 xhci_writel(xhci, temp, port_array[port_index]);
947 if (hcd->speed != HCD_USB3) {
948 /* disable remote wake up for USB 2.0 */
949 __le32 __iomem *addr;
950 u32 tmp;
952 /* Add one to the port status register address to get
953 * the port power control register address.
955 addr = port_array[port_index] + 1;
956 tmp = xhci_readl(xhci, addr);
957 tmp &= ~PORT_RWE;
958 xhci_writel(xhci, tmp, addr);
962 (void) xhci_readl(xhci, &xhci->op_regs->command);
964 bus_state->next_statechange = jiffies + msecs_to_jiffies(5);
965 /* re-enable irqs */
966 temp = xhci_readl(xhci, &xhci->op_regs->command);
967 temp |= CMD_EIE;
968 xhci_writel(xhci, temp, &xhci->op_regs->command);
969 temp = xhci_readl(xhci, &xhci->op_regs->command);
971 spin_unlock_irqrestore(&xhci->lock, flags);
972 return 0;
975 #endif /* CONFIG_PM */