drivers/usb/musb/musb_core.h

   1 /*
   2  * MUSB OTG driver defines
   3  *
   4  * Copyright 2005 Mentor Graphics Corporation
   5  * Copyright (C) 2005-2006 by Texas Instruments
   6  * Copyright (C) 2006-2007 Nokia Corporation
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License
  10  * version 2 as published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but
  13  * WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20  * 02110-1301 USA
  21  *
  22  * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
  23  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  24  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  25  * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  26  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  27  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  28  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  29  * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  31  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  *
  33  */
  34
  35 #ifndef __MUSB_CORE_H__
  36 #define __MUSB_CORE_H__
  37
  38 #include <linux/slab.h>
  39 #include <linux/list.h>
  40 #include <linux/interrupt.h>
  41 #include <linux/errno.h>
  42 #include <linux/timer.h>
  43 #include <linux/clk.h>
  44 #include <linux/device.h>
  45 #include <linux/usb/ch9.h>
  46 #include <linux/usb/gadget.h>
  47 #include <linux/usb.h>
  48 #include <linux/usb/otg.h>
  49 #include <linux/usb/musb.h>
  50
  51 struct musb;
  52 struct musb_hw_ep;
  53 struct musb_ep;
  54
  55 /* Helper defines for struct musb->hwvers */
  56 #define MUSB_HWVERS_MAJOR(x)    ((x >> 10) & 0x1f)
  57 #define MUSB_HWVERS_MINOR(x)    (x & 0x3ff)
  58 #define MUSB_HWVERS_RC          0x8000
  59 #define MUSB_HWVERS_1300        0x52C
  60 #define MUSB_HWVERS_1400        0x590
  61 #define MUSB_HWVERS_1800        0x720
  62 #define MUSB_HWVERS_1900        0x784
  63 #define MUSB_HWVERS_2000        0x800
  64
  65 #include "musb_debug.h"
  66 #include "musb_dma.h"
  67
  68 #include "musb_io.h"
  69 #include "musb_regs.h"
  70
  71 #include "musb_gadget.h"
  72 #include <linux/usb/hcd.h>
  73 #include "musb_host.h"
  74
  75 #define is_peripheral_enabled(musb)     ((musb)->board_mode != MUSB_HOST)
  76 #define is_host_enabled(musb)           ((musb)->board_mode != MUSB_PERIPHERAL)
  77 #define is_otg_enabled(musb)            ((musb)->board_mode == MUSB_OTG)
  78
  79 /* NOTE:  otg and peripheral-only state machines start at B_IDLE.
  80  * OTG or host-only go to A_IDLE when ID is sensed.
  81  */
  82 #define is_peripheral_active(m)         (!(m)->is_host)
  83 #define is_host_active(m)               ((m)->is_host)
  84
  85 #ifndef CONFIG_HAVE_CLK
  86 /* Dummy stub for clk framework */
  87 #define clk_get(dev, id)        NULL
  88 #define clk_put(clock)          do {} while (0)
  89 #define clk_enable(clock)       do {} while (0)
  90 #define clk_disable(clock)      do {} while (0)
  91 #endif
  92
  93 #ifdef CONFIG_PROC_FS
  94 #include <linux/fs.h>
  95 #define MUSB_CONFIG_PROC_FS
  96 #endif
  97
  98 /****************************** PERIPHERAL ROLE *****************************/
  99
 100 #define is_peripheral_capable() (1)
 101
 102 extern irqreturn_t musb_g_ep0_irq(struct musb *);
 103 extern void musb_g_tx(struct musb *, u8);
 104 extern void musb_g_rx(struct musb *, u8);
 105 extern void musb_g_reset(struct musb *);
 106 extern void musb_g_suspend(struct musb *);
 107 extern void musb_g_resume(struct musb *);
 108 extern void musb_g_wakeup(struct musb *);
 109 extern void musb_g_disconnect(struct musb *);
 110
 111 /****************************** HOST ROLE ***********************************/
 112
 113 #define is_host_capable()       (1)
 114
 115 extern irqreturn_t musb_h_ep0_irq(struct musb *);
 116 extern void musb_host_tx(struct musb *, u8);
 117 extern void musb_host_rx(struct musb *, u8);
 118
 119 /****************************** CONSTANTS ********************************/
 120
 121 #ifndef MUSB_C_NUM_EPS
 122 #define MUSB_C_NUM_EPS ((u8)16)
 123 #endif
 124
 125 #ifndef MUSB_MAX_END0_PACKET
 126 #define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
 127 #endif
 128
 129 /* host side ep0 states */
 130 enum musb_h_ep0_state {
 131         MUSB_EP0_IDLE,
 132         MUSB_EP0_START,                 /* expect ack of setup */
 133         MUSB_EP0_IN,                    /* expect IN DATA */
 134         MUSB_EP0_OUT,                   /* expect ack of OUT DATA */
 135         MUSB_EP0_STATUS,                /* expect ack of STATUS */
 136 } __attribute__ ((packed));
 137
 138 /* peripheral side ep0 states */
 139 enum musb_g_ep0_state {
 140         MUSB_EP0_STAGE_IDLE,            /* idle, waiting for SETUP */
 141         MUSB_EP0_STAGE_SETUP,           /* received SETUP */
 142         MUSB_EP0_STAGE_TX,              /* IN data */
 143         MUSB_EP0_STAGE_RX,              /* OUT data */
 144         MUSB_EP0_STAGE_STATUSIN,        /* (after OUT data) */
 145         MUSB_EP0_STAGE_STATUSOUT,       /* (after IN data) */
 146         MUSB_EP0_STAGE_ACKWAIT,         /* after zlp, before statusin */
 147 } __attribute__ ((packed));
 148
 149 /*
 150  * OTG protocol constants.  See USB OTG 1.3 spec,
 151  * sections 5.5 "Device Timings" and 6.6.5 "Timers".
 152  */
 153 #define OTG_TIME_A_WAIT_VRISE   100             /* msec (max) */
 154 #define OTG_TIME_A_WAIT_BCON    1100            /* min 1 second */
 155 #define OTG_TIME_A_AIDL_BDIS    200             /* min 200 msec */
 156 #define OTG_TIME_B_ASE0_BRST    100             /* min 3.125 ms */
 157
 158
 159 /*************************** REGISTER ACCESS ********************************/
 160
 161 /* Endpoint registers (other than dynfifo setup) can be accessed either
 162  * directly with the "flat" model, or after setting up an index register.
 163  */
 164
 165 #if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_SOC_OMAP2430) \
 166                 || defined(CONFIG_SOC_OMAP3430) || defined(CONFIG_BLACKFIN) \
 167                 || defined(CONFIG_ARCH_OMAP4)
 168 /* REVISIT indexed access seemed to
 169  * misbehave (on DaVinci) for at least peripheral IN ...
 170  */
 171 #define MUSB_FLAT_REG
 172 #endif
 173
 174 /* TUSB mapping: "flat" plus ep0 special cases */
 175 #if     defined(CONFIG_USB_MUSB_TUSB6010)
 176 #define musb_ep_select(_mbase, _epnum) \
 177         musb_writeb((_mbase), MUSB_INDEX, (_epnum))
 178 #define MUSB_EP_OFFSET                  MUSB_TUSB_OFFSET
 179
 180 /* "flat" mapping: each endpoint has its own i/o address */
 181 #elif   defined(MUSB_FLAT_REG)
 182 #define musb_ep_select(_mbase, _epnum)  (((void)(_mbase)), ((void)(_epnum)))
 183 #define MUSB_EP_OFFSET                  MUSB_FLAT_OFFSET
 184
 185 /* "indexed" mapping: INDEX register controls register bank select */
 186 #else
 187 #define musb_ep_select(_mbase, _epnum) \
 188         musb_writeb((_mbase), MUSB_INDEX, (_epnum))
 189 #define MUSB_EP_OFFSET                  MUSB_INDEXED_OFFSET
 190 #endif
 191
 192 /****************************** FUNCTIONS ********************************/
 193
 194 #define MUSB_HST_MODE(_musb)\
 195         { (_musb)->is_host = true; }
 196 #define MUSB_DEV_MODE(_musb) \
 197         { (_musb)->is_host = false; }
 198
 199 #define test_devctl_hst_mode(_x) \
 200         (musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)
 201
 202 #define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
 203
 204 /******************************** TYPES *************************************/
 205
 206 /**
 207  * struct musb_platform_ops - Operations passed to musb_core by HW glue layer
 208  * @init:       turns on clocks, sets up platform-specific registers, etc
 209  * @exit:       undoes @init
 210  * @set_mode:   forcefully changes operating mode
 211  * @try_ilde:   tries to idle the IP
 212  * @vbus_status: returns vbus status if possible
 213  * @set_vbus:   forces vbus status
 214  * @adjust_channel_params: pre check for standard dma channel_program func
 215  */
 216 struct musb_platform_ops {
 217         int     (*init)(struct musb *musb);
 218         int     (*exit)(struct musb *musb);
 219
 220         void    (*enable)(struct musb *musb);
 221         void    (*disable)(struct musb *musb);
 222
 223         int     (*set_mode)(struct musb *musb, u8 mode);
 224         void    (*try_idle)(struct musb *musb, unsigned long timeout);
 225
 226         int     (*vbus_status)(struct musb *musb);
 227         void    (*set_vbus)(struct musb *musb, int on);
 228
 229         int     (*adjust_channel_params)(struct dma_channel *channel,
 230                                 u16 packet_sz, u8 *mode,
 231                                 dma_addr_t *dma_addr, u32 *len);
 232 };
 233
 234 /*
 235  * struct musb_hw_ep - endpoint hardware (bidirectional)
 236  *
 237  * Ordered slightly for better cacheline locality.
 238  */
 239 struct musb_hw_ep {
 240         struct musb             *musb;
 241         void __iomem            *fifo;
 242         void __iomem            *regs;
 243
 244 #ifdef CONFIG_USB_MUSB_TUSB6010
 245         void __iomem            *conf;
 246 #endif
 247
 248         /* index in musb->endpoints[]  */
 249         u8                      epnum;
 250
 251         /* hardware configuration, possibly dynamic */
 252         bool                    is_shared_fifo;
 253         bool                    tx_double_buffered;
 254         bool                    rx_double_buffered;
 255         u16                     max_packet_sz_tx;
 256         u16                     max_packet_sz_rx;
 257
 258         struct dma_channel      *tx_channel;
 259         struct dma_channel      *rx_channel;
 260
 261 #ifdef CONFIG_USB_MUSB_TUSB6010
 262         /* TUSB has "asynchronous" and "synchronous" dma modes */
 263         dma_addr_t              fifo_async;
 264         dma_addr_t              fifo_sync;
 265         void __iomem            *fifo_sync_va;
 266 #endif
 267
 268         void __iomem            *target_regs;
 269
 270         /* currently scheduled peripheral endpoint */
 271         struct musb_qh          *in_qh;
 272         struct musb_qh          *out_qh;
 273
 274         u8                      rx_reinit;
 275         u8                      tx_reinit;
 276
 277         /* peripheral side */
 278         struct musb_ep          ep_in;                  /* TX */
 279         struct musb_ep          ep_out;                 /* RX */
 280 };
 281
 282 static inline struct musb_request *next_in_request(struct musb_hw_ep *hw_ep)
 283 {
 284         return next_request(&hw_ep->ep_in);
 285 }
 286
 287 static inline struct musb_request *next_out_request(struct musb_hw_ep *hw_ep)
 288 {
 289         return next_request(&hw_ep->ep_out);
 290 }
 291
 292 struct musb_csr_regs {
 293         /* FIFO registers */
 294         u16 txmaxp, txcsr, rxmaxp, rxcsr;
 295         u16 rxfifoadd, txfifoadd;
 296         u8 txtype, txinterval, rxtype, rxinterval;
 297         u8 rxfifosz, txfifosz;
 298         u8 txfunaddr, txhubaddr, txhubport;
 299         u8 rxfunaddr, rxhubaddr, rxhubport;
 300 };
 301
 302 struct musb_context_registers {
 303
 304         u8 power;
 305         u16 intrtxe, intrrxe;
 306         u8 intrusbe;
 307         u16 frame;
 308         u8 index, testmode;
 309
 310         u8 devctl, busctl, misc;
 311
 312         struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
 313 };
 314
 315 /*
 316  * struct musb - Driver instance data.
 317  */
 318 struct musb {
 319         /* device lock */
 320         spinlock_t              lock;
 321
 322         const struct musb_platform_ops *ops;
 323         struct musb_context_registers context;
 324
 325         irqreturn_t             (*isr)(int, void *);
 326         struct work_struct      irq_work;
 327         u16                     hwvers;
 328
 329 /* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
 330 #define MUSB_PORT_STAT_RESUME   (1 << 31)
 331
 332         u32                     port1_status;
 333
 334         unsigned long           rh_timer;
 335
 336         enum musb_h_ep0_state   ep0_stage;
 337
 338         /* bulk traffic normally dedicates endpoint hardware, and each
 339          * direction has its own ring of host side endpoints.
 340          * we try to progress the transfer at the head of each endpoint's
 341          * queue until it completes or NAKs too much; then we try the next
 342          * endpoint.
 343          */
 344         struct musb_hw_ep       *bulk_ep;
 345
 346         struct list_head        control;        /* of musb_qh */
 347         struct list_head        in_bulk;        /* of musb_qh */
 348         struct list_head        out_bulk;       /* of musb_qh */
 349
 350         struct timer_list       otg_timer;
 351         struct notifier_block   nb;
 352
 353         struct dma_controller   *dma_controller;
 354
 355         struct device           *controller;
 356         void __iomem            *ctrl_base;
 357         void __iomem            *mregs;
 358
 359 #ifdef CONFIG_USB_MUSB_TUSB6010
 360         dma_addr_t              async;
 361         dma_addr_t              sync;
 362         void __iomem            *sync_va;
 363 #endif
 364
 365         /* passed down from chip/board specific irq handlers */
 366         u8                      int_usb;
 367         u16                     int_rx;
 368         u16                     int_tx;
 369
 370         struct otg_transceiver  *xceiv;
 371
 372         int nIrq;
 373         unsigned                irq_wake:1;
 374
 375         struct musb_hw_ep        endpoints[MUSB_C_NUM_EPS];
 376 #define control_ep              endpoints
 377
 378 #define VBUSERR_RETRY_COUNT     3
 379         u16                     vbuserr_retry;
 380         u16 epmask;
 381         u8 nr_endpoints;
 382
 383         u8 board_mode;          /* enum musb_mode */
 384         int                     (*board_set_power)(int state);
 385
 386         u8                      min_power;      /* vbus for periph, in mA/2 */
 387
 388         bool                    is_host;
 389
 390         int                     a_wait_bcon;    /* VBUS timeout in msecs */
 391         unsigned long           idle_timeout;   /* Next timeout in jiffies */
 392
 393         /* active means connected and not suspended */
 394         unsigned                is_active:1;
 395
 396         unsigned is_multipoint:1;
 397         unsigned ignore_disconnect:1;   /* during bus resets */
 398
 399         unsigned                hb_iso_rx:1;    /* high bandwidth iso rx? */
 400         unsigned                hb_iso_tx:1;    /* high bandwidth iso tx? */
 401         unsigned                dyn_fifo:1;     /* dynamic FIFO supported? */
 402
 403         unsigned                bulk_split:1;
 404 #define can_bulk_split(musb,type) \
 405         (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)
 406
 407         unsigned                bulk_combine:1;
 408 #define can_bulk_combine(musb,type) \
 409         (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)
 410
 411         /* is_suspended means USB B_PERIPHERAL suspend */
 412         unsigned                is_suspended:1;
 413
 414         /* may_wakeup means remote wakeup is enabled */
 415         unsigned                may_wakeup:1;
 416
 417         /* is_self_powered is reported in device status and the
 418          * config descriptor.  is_bus_powered means B_PERIPHERAL
 419          * draws some VBUS current; both can be true.
 420          */
 421         unsigned                is_self_powered:1;
 422         unsigned                is_bus_powered:1;
 423
 424         unsigned                set_address:1;
 425         unsigned                test_mode:1;
 426         unsigned                softconnect:1;
 427
 428         u8                      address;
 429         u8                      test_mode_nr;
 430         u16                     ackpend;                /* ep0 */
 431         enum musb_g_ep0_state   ep0_state;
 432         struct usb_gadget       g;                      /* the gadget */
 433         struct usb_gadget_driver *gadget_driver;        /* its driver */
 434
 435         /*
 436          * FIXME: Remove this flag.
 437          *
 438          * This is only added to allow Blackfin to work
 439          * with current driver. For some unknown reason
 440          * Blackfin doesn't work with double buffering
 441          * and that's enabled by default.
 442          *
 443          * We added this flag to forcefully disable double
 444          * buffering until we get it working.
 445          */
 446         unsigned                double_buffer_not_ok:1 __deprecated;
 447
 448         struct musb_hdrc_config *config;
 449
 450 #ifdef MUSB_CONFIG_PROC_FS
 451         struct proc_dir_entry *proc_entry;
 452 #endif
 453 };
 454
 455 static inline struct musb *gadget_to_musb(struct usb_gadget *g)
 456 {
 457         return container_of(g, struct musb, g);
 458 }
 459
 460 #ifdef CONFIG_BLACKFIN
 461 static inline int musb_read_fifosize(struct musb *musb,
 462                 struct musb_hw_ep *hw_ep, u8 epnum)
 463 {
 464         musb->nr_endpoints++;
 465         musb->epmask |= (1 << epnum);
 466
 467         if (epnum < 5) {
 468                 hw_ep->max_packet_sz_tx = 128;
 469                 hw_ep->max_packet_sz_rx = 128;
 470         } else {
 471                 hw_ep->max_packet_sz_tx = 1024;
 472                 hw_ep->max_packet_sz_rx = 1024;
 473         }
 474         hw_ep->is_shared_fifo = false;
 475
 476         return 0;
 477 }
 478
 479 static inline void musb_configure_ep0(struct musb *musb)
 480 {
 481         musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
 482         musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
 483         musb->endpoints[0].is_shared_fifo = true;
 484 }
 485
 486 #else
 487
 488 static inline int musb_read_fifosize(struct musb *musb,
 489                 struct musb_hw_ep *hw_ep, u8 epnum)
 490 {
 491         void *mbase = musb->mregs;
 492         u8 reg = 0;
 493
 494         /* read from core using indexed model */
 495         reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE));
 496         /* 0's returned when no more endpoints */
 497         if (!reg)
 498                 return -ENODEV;
 499
 500         musb->nr_endpoints++;
 501         musb->epmask |= (1 << epnum);
 502
 503         hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
 504
 505         /* shared TX/RX FIFO? */
 506         if ((reg & 0xf0) == 0xf0) {
 507                 hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
 508                 hw_ep->is_shared_fifo = true;
 509                 return 0;
 510         } else {
 511                 hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
 512                 hw_ep->is_shared_fifo = false;
 513         }
 514
 515         return 0;
 516 }
 517
 518 static inline void musb_configure_ep0(struct musb *musb)
 519 {
 520         musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
 521         musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
 522         musb->endpoints[0].is_shared_fifo = true;
 523 }
 524 #endif /* CONFIG_BLACKFIN */
 525
 526
 527 /***************************** Glue it together *****************************/
 528
 529 extern const char musb_driver_name[];
 530
 531 extern void musb_start(struct musb *musb);
 532 extern void musb_stop(struct musb *musb);
 533
 534 extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src);
 535 extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst);
 536
 537 extern void musb_load_testpacket(struct musb *);
 538
 539 extern irqreturn_t musb_interrupt(struct musb *);
 540
 541 extern void musb_hnp_stop(struct musb *musb);
 542
 543 static inline void musb_platform_set_vbus(struct musb *musb, int is_on)
 544 {
 545         if (musb->ops->set_vbus)
 546                 musb->ops->set_vbus(musb, is_on);
 547 }
 548
 549 static inline void musb_platform_enable(struct musb *musb)
 550 {
 551         if (musb->ops->enable)
 552                 musb->ops->enable(musb);
 553 }
 554
 555 static inline void musb_platform_disable(struct musb *musb)
 556 {
 557         if (musb->ops->disable)
 558                 musb->ops->disable(musb);
 559 }
 560
 561 static inline int musb_platform_set_mode(struct musb *musb, u8 mode)
 562 {
 563         if (!musb->ops->set_mode)
 564                 return 0;
 565
 566         return musb->ops->set_mode(musb, mode);
 567 }
 568
 569 static inline void musb_platform_try_idle(struct musb *musb,
 570                 unsigned long timeout)
 571 {
 572         if (musb->ops->try_idle)
 573                 musb->ops->try_idle(musb, timeout);
 574 }
 575
 576 static inline int musb_platform_get_vbus_status(struct musb *musb)
 577 {
 578         if (!musb->ops->vbus_status)
 579                 return 0;
 580
 581         return musb->ops->vbus_status(musb);
 582 }
 583
 584 static inline int musb_platform_init(struct musb *musb)
 585 {
 586         if (!musb->ops->init)
 587                 return -EINVAL;
 588
 589         return musb->ops->init(musb);
 590 }
 591
 592 static inline int musb_platform_exit(struct musb *musb)
 593 {
 594         if (!musb->ops->exit)
 595                 return -EINVAL;
 596
 597         return musb->ops->exit(musb);
 598 }
 599
 600 #endif  /* __MUSB_CORE_H__ */