include: replace linux/module.h with "struct module" wherever possible
[linux-2.6/next.git] / drivers / video / atmel_lcdfb.c
blob005eb362e37097973e4dfd0c900a74b5a0b0ec2f
1 /*
2 * Driver for AT91/AT32 LCD Controller
4 * Copyright (C) 2007 Atmel Corporation
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive for
8 * more details.
9 */
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/interrupt.h>
15 #include <linux/clk.h>
16 #include <linux/fb.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/backlight.h>
20 #include <linux/gfp.h>
21 #include <linux/module.h>
23 #include <mach/board.h>
24 #include <mach/cpu.h>
25 #include <mach/gpio.h>
27 #include <video/atmel_lcdc.h>
29 #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
30 #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
32 /* configurable parameters */
33 #define ATMEL_LCDC_CVAL_DEFAULT 0xc8
34 #define ATMEL_LCDC_DMA_BURST_LEN 8 /* words */
35 #define ATMEL_LCDC_FIFO_SIZE 512 /* words */
37 #if defined(CONFIG_ARCH_AT91)
38 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
39 | FBINFO_PARTIAL_PAN_OK \
40 | FBINFO_HWACCEL_YPAN)
42 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
43 struct fb_var_screeninfo *var)
47 #elif defined(CONFIG_AVR32)
48 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
49 | FBINFO_PARTIAL_PAN_OK \
50 | FBINFO_HWACCEL_XPAN \
51 | FBINFO_HWACCEL_YPAN)
53 static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
54 struct fb_var_screeninfo *var)
56 u32 dma2dcfg;
57 u32 pixeloff;
59 pixeloff = (var->xoffset * var->bits_per_pixel) & 0x1f;
61 dma2dcfg = ((var->xres_virtual - var->xres) * var->bits_per_pixel) / 8;
62 dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
63 lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
65 /* Update configuration */
66 lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
67 lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
68 | ATMEL_LCDC_DMAUPDT);
70 #endif
72 static u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
73 | ATMEL_LCDC_POL_POSITIVE
74 | ATMEL_LCDC_ENA_PWMENABLE;
76 #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
78 /* some bl->props field just changed */
79 static int atmel_bl_update_status(struct backlight_device *bl)
81 struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
82 int power = sinfo->bl_power;
83 int brightness = bl->props.brightness;
85 /* REVISIT there may be a meaningful difference between
86 * fb_blank and power ... there seem to be some cases
87 * this doesn't handle correctly.
89 if (bl->props.fb_blank != sinfo->bl_power)
90 power = bl->props.fb_blank;
91 else if (bl->props.power != sinfo->bl_power)
92 power = bl->props.power;
94 if (brightness < 0 && power == FB_BLANK_UNBLANK)
95 brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
96 else if (power != FB_BLANK_UNBLANK)
97 brightness = 0;
99 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
100 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
101 brightness ? contrast_ctr : 0);
103 bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
105 return 0;
108 static int atmel_bl_get_brightness(struct backlight_device *bl)
110 struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
112 return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
115 static const struct backlight_ops atmel_lcdc_bl_ops = {
116 .update_status = atmel_bl_update_status,
117 .get_brightness = atmel_bl_get_brightness,
120 static void init_backlight(struct atmel_lcdfb_info *sinfo)
122 struct backlight_properties props;
123 struct backlight_device *bl;
125 sinfo->bl_power = FB_BLANK_UNBLANK;
127 if (sinfo->backlight)
128 return;
130 memset(&props, 0, sizeof(struct backlight_properties));
131 props.type = BACKLIGHT_RAW;
132 props.max_brightness = 0xff;
133 bl = backlight_device_register("backlight", &sinfo->pdev->dev, sinfo,
134 &atmel_lcdc_bl_ops, &props);
135 if (IS_ERR(bl)) {
136 dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
137 PTR_ERR(bl));
138 return;
140 sinfo->backlight = bl;
142 bl->props.power = FB_BLANK_UNBLANK;
143 bl->props.fb_blank = FB_BLANK_UNBLANK;
144 bl->props.brightness = atmel_bl_get_brightness(bl);
147 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
149 if (sinfo->backlight)
150 backlight_device_unregister(sinfo->backlight);
153 #else
155 static void init_backlight(struct atmel_lcdfb_info *sinfo)
157 dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
160 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
164 #endif
166 static void init_contrast(struct atmel_lcdfb_info *sinfo)
168 /* contrast pwm can be 'inverted' */
169 if (sinfo->lcdcon_pol_negative)
170 contrast_ctr &= ~(ATMEL_LCDC_POL_POSITIVE);
172 /* have some default contrast/backlight settings */
173 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
174 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
176 if (sinfo->lcdcon_is_backlight)
177 init_backlight(sinfo);
181 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
182 .type = FB_TYPE_PACKED_PIXELS,
183 .visual = FB_VISUAL_TRUECOLOR,
184 .xpanstep = 0,
185 .ypanstep = 1,
186 .ywrapstep = 0,
187 .accel = FB_ACCEL_NONE,
190 static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2)
192 unsigned long value;
194 if (!(cpu_is_at91sam9261() || cpu_is_at91sam9g10()
195 || cpu_is_at32ap7000()))
196 return xres;
198 value = xres;
199 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
200 /* STN display */
201 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
202 value *= 3;
204 if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
205 || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
206 && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
207 value = DIV_ROUND_UP(value, 4);
208 else
209 value = DIV_ROUND_UP(value, 8);
212 return value;
215 static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info *sinfo)
217 /* Turn off the LCD controller and the DMA controller */
218 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
219 sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
221 /* Wait for the LCDC core to become idle */
222 while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
223 msleep(10);
225 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
228 static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo)
230 atmel_lcdfb_stop_nowait(sinfo);
232 /* Wait for DMA engine to become idle... */
233 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
234 msleep(10);
237 static void atmel_lcdfb_start(struct atmel_lcdfb_info *sinfo)
239 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
240 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
241 (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET)
242 | ATMEL_LCDC_PWR);
245 static void atmel_lcdfb_update_dma(struct fb_info *info,
246 struct fb_var_screeninfo *var)
248 struct atmel_lcdfb_info *sinfo = info->par;
249 struct fb_fix_screeninfo *fix = &info->fix;
250 unsigned long dma_addr;
252 dma_addr = (fix->smem_start + var->yoffset * fix->line_length
253 + var->xoffset * var->bits_per_pixel / 8);
255 dma_addr &= ~3UL;
257 /* Set framebuffer DMA base address and pixel offset */
258 lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
260 atmel_lcdfb_update_dma2d(sinfo, var);
263 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
265 struct fb_info *info = sinfo->info;
267 dma_free_writecombine(info->device, info->fix.smem_len,
268 info->screen_base, info->fix.smem_start);
272 * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
273 * @sinfo: the frame buffer to allocate memory for
275 * This function is called only from the atmel_lcdfb_probe()
276 * so no locking by fb_info->mm_lock around smem_len setting is needed.
278 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
280 struct fb_info *info = sinfo->info;
281 struct fb_var_screeninfo *var = &info->var;
282 unsigned int smem_len;
284 smem_len = (var->xres_virtual * var->yres_virtual
285 * ((var->bits_per_pixel + 7) / 8));
286 info->fix.smem_len = max(smem_len, sinfo->smem_len);
288 info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
289 (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
291 if (!info->screen_base) {
292 return -ENOMEM;
295 memset(info->screen_base, 0, info->fix.smem_len);
297 return 0;
300 static const struct fb_videomode *atmel_lcdfb_choose_mode(struct fb_var_screeninfo *var,
301 struct fb_info *info)
303 struct fb_videomode varfbmode;
304 const struct fb_videomode *fbmode = NULL;
306 fb_var_to_videomode(&varfbmode, var);
307 fbmode = fb_find_nearest_mode(&varfbmode, &info->modelist);
308 if (fbmode)
309 fb_videomode_to_var(var, fbmode);
310 return fbmode;
315 * atmel_lcdfb_check_var - Validates a var passed in.
316 * @var: frame buffer variable screen structure
317 * @info: frame buffer structure that represents a single frame buffer
319 * Checks to see if the hardware supports the state requested by
320 * var passed in. This function does not alter the hardware
321 * state!!! This means the data stored in struct fb_info and
322 * struct atmel_lcdfb_info do not change. This includes the var
323 * inside of struct fb_info. Do NOT change these. This function
324 * can be called on its own if we intent to only test a mode and
325 * not actually set it. The stuff in modedb.c is a example of
326 * this. If the var passed in is slightly off by what the
327 * hardware can support then we alter the var PASSED in to what
328 * we can do. If the hardware doesn't support mode change a
329 * -EINVAL will be returned by the upper layers. You don't need
330 * to implement this function then. If you hardware doesn't
331 * support changing the resolution then this function is not
332 * needed. In this case the driver would just provide a var that
333 * represents the static state the screen is in.
335 * Returns negative errno on error, or zero on success.
337 static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
338 struct fb_info *info)
340 struct device *dev = info->device;
341 struct atmel_lcdfb_info *sinfo = info->par;
342 unsigned long clk_value_khz;
344 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
346 dev_dbg(dev, "%s:\n", __func__);
348 if (!(var->pixclock && var->bits_per_pixel)) {
349 /* choose a suitable mode if possible */
350 if (!atmel_lcdfb_choose_mode(var, info)) {
351 dev_err(dev, "needed value not specified\n");
352 return -EINVAL;
356 dev_dbg(dev, " resolution: %ux%u\n", var->xres, var->yres);
357 dev_dbg(dev, " pixclk: %lu KHz\n", PICOS2KHZ(var->pixclock));
358 dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel);
359 dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz);
361 if (PICOS2KHZ(var->pixclock) > clk_value_khz) {
362 dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
363 return -EINVAL;
366 /* Do not allow to have real resoulution larger than virtual */
367 if (var->xres > var->xres_virtual)
368 var->xres_virtual = var->xres;
370 if (var->yres > var->yres_virtual)
371 var->yres_virtual = var->yres;
373 /* Force same alignment for each line */
374 var->xres = (var->xres + 3) & ~3UL;
375 var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
377 var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
378 var->transp.msb_right = 0;
379 var->transp.offset = var->transp.length = 0;
380 var->xoffset = var->yoffset = 0;
382 if (info->fix.smem_len) {
383 unsigned int smem_len = (var->xres_virtual * var->yres_virtual
384 * ((var->bits_per_pixel + 7) / 8));
385 if (smem_len > info->fix.smem_len)
386 return -EINVAL;
389 /* Saturate vertical and horizontal timings at maximum values */
390 var->vsync_len = min_t(u32, var->vsync_len,
391 (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
392 var->upper_margin = min_t(u32, var->upper_margin,
393 ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
394 var->lower_margin = min_t(u32, var->lower_margin,
395 ATMEL_LCDC_VFP);
396 var->right_margin = min_t(u32, var->right_margin,
397 (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
398 var->hsync_len = min_t(u32, var->hsync_len,
399 (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
400 var->left_margin = min_t(u32, var->left_margin,
401 ATMEL_LCDC_HBP + 1);
403 /* Some parameters can't be zero */
404 var->vsync_len = max_t(u32, var->vsync_len, 1);
405 var->right_margin = max_t(u32, var->right_margin, 1);
406 var->hsync_len = max_t(u32, var->hsync_len, 1);
407 var->left_margin = max_t(u32, var->left_margin, 1);
409 switch (var->bits_per_pixel) {
410 case 1:
411 case 2:
412 case 4:
413 case 8:
414 var->red.offset = var->green.offset = var->blue.offset = 0;
415 var->red.length = var->green.length = var->blue.length
416 = var->bits_per_pixel;
417 break;
418 case 15:
419 case 16:
420 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
421 /* RGB:565 mode */
422 var->red.offset = 11;
423 var->blue.offset = 0;
424 var->green.length = 6;
425 } else if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB555) {
426 var->red.offset = 10;
427 var->blue.offset = 0;
428 var->green.length = 5;
429 } else {
430 /* BGR:555 mode */
431 var->red.offset = 0;
432 var->blue.offset = 10;
433 var->green.length = 5;
435 var->green.offset = 5;
436 var->red.length = var->blue.length = 5;
437 break;
438 case 32:
439 var->transp.offset = 24;
440 var->transp.length = 8;
441 /* fall through */
442 case 24:
443 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
444 /* RGB:888 mode */
445 var->red.offset = 16;
446 var->blue.offset = 0;
447 } else {
448 /* BGR:888 mode */
449 var->red.offset = 0;
450 var->blue.offset = 16;
452 var->green.offset = 8;
453 var->red.length = var->green.length = var->blue.length = 8;
454 break;
455 default:
456 dev_err(dev, "color depth %d not supported\n",
457 var->bits_per_pixel);
458 return -EINVAL;
461 return 0;
465 * LCD reset sequence
467 static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo)
469 might_sleep();
471 atmel_lcdfb_stop(sinfo);
472 atmel_lcdfb_start(sinfo);
476 * atmel_lcdfb_set_par - Alters the hardware state.
477 * @info: frame buffer structure that represents a single frame buffer
479 * Using the fb_var_screeninfo in fb_info we set the resolution
480 * of the this particular framebuffer. This function alters the
481 * par AND the fb_fix_screeninfo stored in fb_info. It doesn't
482 * not alter var in fb_info since we are using that data. This
483 * means we depend on the data in var inside fb_info to be
484 * supported by the hardware. atmel_lcdfb_check_var is always called
485 * before atmel_lcdfb_set_par to ensure this. Again if you can't
486 * change the resolution you don't need this function.
489 static int atmel_lcdfb_set_par(struct fb_info *info)
491 struct atmel_lcdfb_info *sinfo = info->par;
492 unsigned long hozval_linesz;
493 unsigned long value;
494 unsigned long clk_value_khz;
495 unsigned long bits_per_line;
496 unsigned long pix_factor = 2;
498 might_sleep();
500 dev_dbg(info->device, "%s:\n", __func__);
501 dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n",
502 info->var.xres, info->var.yres,
503 info->var.xres_virtual, info->var.yres_virtual);
505 atmel_lcdfb_stop_nowait(sinfo);
507 if (info->var.bits_per_pixel == 1)
508 info->fix.visual = FB_VISUAL_MONO01;
509 else if (info->var.bits_per_pixel <= 8)
510 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
511 else
512 info->fix.visual = FB_VISUAL_TRUECOLOR;
514 bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
515 info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
517 /* Re-initialize the DMA engine... */
518 dev_dbg(info->device, " * update DMA engine\n");
519 atmel_lcdfb_update_dma(info, &info->var);
521 /* ...set frame size and burst length = 8 words (?) */
522 value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
523 value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
524 lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
526 /* Now, the LCDC core... */
528 /* Set pixel clock */
529 if (cpu_is_at91sam9g45() && !cpu_is_at91sam9g45es())
530 pix_factor = 1;
532 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
534 value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
536 if (value < pix_factor) {
537 dev_notice(info->device, "Bypassing pixel clock divider\n");
538 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
539 } else {
540 value = (value / pix_factor) - 1;
541 dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n",
542 value);
543 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
544 value << ATMEL_LCDC_CLKVAL_OFFSET);
545 info->var.pixclock =
546 KHZ2PICOS(clk_value_khz / (pix_factor * (value + 1)));
547 dev_dbg(info->device, " updated pixclk: %lu KHz\n",
548 PICOS2KHZ(info->var.pixclock));
552 /* Initialize control register 2 */
553 value = sinfo->default_lcdcon2;
555 if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
556 value |= ATMEL_LCDC_INVLINE_INVERTED;
557 if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
558 value |= ATMEL_LCDC_INVFRAME_INVERTED;
560 switch (info->var.bits_per_pixel) {
561 case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
562 case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
563 case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
564 case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
565 case 15: /* fall through */
566 case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
567 case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
568 case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
569 default: BUG(); break;
571 dev_dbg(info->device, " * LCDCON2 = %08lx\n", value);
572 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
574 /* Vertical timing */
575 value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
576 value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
577 value |= info->var.lower_margin;
578 dev_dbg(info->device, " * LCDTIM1 = %08lx\n", value);
579 lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
581 /* Horizontal timing */
582 value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
583 value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
584 value |= (info->var.left_margin - 1);
585 dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value);
586 lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
588 /* Horizontal value (aka line size) */
589 hozval_linesz = compute_hozval(info->var.xres,
590 lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2));
592 /* Display size */
593 value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
594 value |= info->var.yres - 1;
595 dev_dbg(info->device, " * LCDFRMCFG = %08lx\n", value);
596 lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
598 /* FIFO Threshold: Use formula from data sheet */
599 value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
600 lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
602 /* Toggle LCD_MODE every frame */
603 lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
605 /* Disable all interrupts */
606 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
607 /* Enable FIFO & DMA errors */
608 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
610 /* ...wait for DMA engine to become idle... */
611 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
612 msleep(10);
614 atmel_lcdfb_start(sinfo);
616 dev_dbg(info->device, " * DONE\n");
618 return 0;
621 static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
623 chan &= 0xffff;
624 chan >>= 16 - bf->length;
625 return chan << bf->offset;
629 * atmel_lcdfb_setcolreg - Optional function. Sets a color register.
630 * @regno: Which register in the CLUT we are programming
631 * @red: The red value which can be up to 16 bits wide
632 * @green: The green value which can be up to 16 bits wide
633 * @blue: The blue value which can be up to 16 bits wide.
634 * @transp: If supported the alpha value which can be up to 16 bits wide.
635 * @info: frame buffer info structure
637 * Set a single color register. The values supplied have a 16 bit
638 * magnitude which needs to be scaled in this function for the hardware.
639 * Things to take into consideration are how many color registers, if
640 * any, are supported with the current color visual. With truecolor mode
641 * no color palettes are supported. Here a pseudo palette is created
642 * which we store the value in pseudo_palette in struct fb_info. For
643 * pseudocolor mode we have a limited color palette. To deal with this
644 * we can program what color is displayed for a particular pixel value.
645 * DirectColor is similar in that we can program each color field. If
646 * we have a static colormap we don't need to implement this function.
648 * Returns negative errno on error, or zero on success. In an
649 * ideal world, this would have been the case, but as it turns
650 * out, the other drivers return 1 on failure, so that's what
651 * we're going to do.
653 static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
654 unsigned int green, unsigned int blue,
655 unsigned int transp, struct fb_info *info)
657 struct atmel_lcdfb_info *sinfo = info->par;
658 unsigned int val;
659 u32 *pal;
660 int ret = 1;
662 if (info->var.grayscale)
663 red = green = blue = (19595 * red + 38470 * green
664 + 7471 * blue) >> 16;
666 switch (info->fix.visual) {
667 case FB_VISUAL_TRUECOLOR:
668 if (regno < 16) {
669 pal = info->pseudo_palette;
671 val = chan_to_field(red, &info->var.red);
672 val |= chan_to_field(green, &info->var.green);
673 val |= chan_to_field(blue, &info->var.blue);
675 pal[regno] = val;
676 ret = 0;
678 break;
680 case FB_VISUAL_PSEUDOCOLOR:
681 if (regno < 256) {
682 val = ((red >> 11) & 0x001f);
683 val |= ((green >> 6) & 0x03e0);
684 val |= ((blue >> 1) & 0x7c00);
687 * TODO: intensity bit. Maybe something like
688 * ~(red[10] ^ green[10] ^ blue[10]) & 1
691 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
692 ret = 0;
694 break;
696 case FB_VISUAL_MONO01:
697 if (regno < 2) {
698 val = (regno == 0) ? 0x00 : 0x1F;
699 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
700 ret = 0;
702 break;
706 return ret;
709 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
710 struct fb_info *info)
712 dev_dbg(info->device, "%s\n", __func__);
714 atmel_lcdfb_update_dma(info, var);
716 return 0;
719 static int atmel_lcdfb_blank(int blank_mode, struct fb_info *info)
721 struct atmel_lcdfb_info *sinfo = info->par;
723 switch (blank_mode) {
724 case FB_BLANK_UNBLANK:
725 case FB_BLANK_NORMAL:
726 atmel_lcdfb_start(sinfo);
727 break;
728 case FB_BLANK_VSYNC_SUSPEND:
729 case FB_BLANK_HSYNC_SUSPEND:
730 break;
731 case FB_BLANK_POWERDOWN:
732 atmel_lcdfb_stop(sinfo);
733 break;
734 default:
735 return -EINVAL;
738 /* let fbcon do a soft blank for us */
739 return ((blank_mode == FB_BLANK_NORMAL) ? 1 : 0);
742 static struct fb_ops atmel_lcdfb_ops = {
743 .owner = THIS_MODULE,
744 .fb_check_var = atmel_lcdfb_check_var,
745 .fb_set_par = atmel_lcdfb_set_par,
746 .fb_setcolreg = atmel_lcdfb_setcolreg,
747 .fb_blank = atmel_lcdfb_blank,
748 .fb_pan_display = atmel_lcdfb_pan_display,
749 .fb_fillrect = cfb_fillrect,
750 .fb_copyarea = cfb_copyarea,
751 .fb_imageblit = cfb_imageblit,
754 static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
756 struct fb_info *info = dev_id;
757 struct atmel_lcdfb_info *sinfo = info->par;
758 u32 status;
760 status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
761 if (status & ATMEL_LCDC_UFLWI) {
762 dev_warn(info->device, "FIFO underflow %#x\n", status);
763 /* reset DMA and FIFO to avoid screen shifting */
764 schedule_work(&sinfo->task);
766 lcdc_writel(sinfo, ATMEL_LCDC_ICR, status);
767 return IRQ_HANDLED;
771 * LCD controller task (to reset the LCD)
773 static void atmel_lcdfb_task(struct work_struct *work)
775 struct atmel_lcdfb_info *sinfo =
776 container_of(work, struct atmel_lcdfb_info, task);
778 atmel_lcdfb_reset(sinfo);
781 static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
783 struct fb_info *info = sinfo->info;
784 int ret = 0;
786 info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
788 dev_info(info->device,
789 "%luKiB frame buffer at %08lx (mapped at %p)\n",
790 (unsigned long)info->fix.smem_len / 1024,
791 (unsigned long)info->fix.smem_start,
792 info->screen_base);
794 /* Allocate colormap */
795 ret = fb_alloc_cmap(&info->cmap, 256, 0);
796 if (ret < 0)
797 dev_err(info->device, "Alloc color map failed\n");
799 return ret;
802 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
804 if (sinfo->bus_clk)
805 clk_enable(sinfo->bus_clk);
806 clk_enable(sinfo->lcdc_clk);
809 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
811 if (sinfo->bus_clk)
812 clk_disable(sinfo->bus_clk);
813 clk_disable(sinfo->lcdc_clk);
817 static int __init atmel_lcdfb_probe(struct platform_device *pdev)
819 struct device *dev = &pdev->dev;
820 struct fb_info *info;
821 struct atmel_lcdfb_info *sinfo;
822 struct atmel_lcdfb_info *pdata_sinfo;
823 struct fb_videomode fbmode;
824 struct resource *regs = NULL;
825 struct resource *map = NULL;
826 int ret;
828 dev_dbg(dev, "%s BEGIN\n", __func__);
830 ret = -ENOMEM;
831 info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
832 if (!info) {
833 dev_err(dev, "cannot allocate memory\n");
834 goto out;
837 sinfo = info->par;
839 if (dev->platform_data) {
840 pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data;
841 sinfo->default_bpp = pdata_sinfo->default_bpp;
842 sinfo->default_dmacon = pdata_sinfo->default_dmacon;
843 sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2;
844 sinfo->default_monspecs = pdata_sinfo->default_monspecs;
845 sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
846 sinfo->guard_time = pdata_sinfo->guard_time;
847 sinfo->smem_len = pdata_sinfo->smem_len;
848 sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight;
849 sinfo->lcdcon_pol_negative = pdata_sinfo->lcdcon_pol_negative;
850 sinfo->lcd_wiring_mode = pdata_sinfo->lcd_wiring_mode;
851 } else {
852 dev_err(dev, "cannot get default configuration\n");
853 goto free_info;
855 sinfo->info = info;
856 sinfo->pdev = pdev;
858 strcpy(info->fix.id, sinfo->pdev->name);
859 info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
860 info->pseudo_palette = sinfo->pseudo_palette;
861 info->fbops = &atmel_lcdfb_ops;
863 memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs));
864 info->fix = atmel_lcdfb_fix;
866 /* Enable LCDC Clocks */
867 if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()
868 || cpu_is_at32ap7000()) {
869 sinfo->bus_clk = clk_get(dev, "hck1");
870 if (IS_ERR(sinfo->bus_clk)) {
871 ret = PTR_ERR(sinfo->bus_clk);
872 goto free_info;
875 sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
876 if (IS_ERR(sinfo->lcdc_clk)) {
877 ret = PTR_ERR(sinfo->lcdc_clk);
878 goto put_bus_clk;
880 atmel_lcdfb_start_clock(sinfo);
882 ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
883 info->monspecs.modedb_len, info->monspecs.modedb,
884 sinfo->default_bpp);
885 if (!ret) {
886 dev_err(dev, "no suitable video mode found\n");
887 goto stop_clk;
891 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
892 if (!regs) {
893 dev_err(dev, "resources unusable\n");
894 ret = -ENXIO;
895 goto stop_clk;
898 sinfo->irq_base = platform_get_irq(pdev, 0);
899 if (sinfo->irq_base < 0) {
900 dev_err(dev, "unable to get irq\n");
901 ret = sinfo->irq_base;
902 goto stop_clk;
905 /* Initialize video memory */
906 map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
907 if (map) {
908 /* use a pre-allocated memory buffer */
909 info->fix.smem_start = map->start;
910 info->fix.smem_len = resource_size(map);
911 if (!request_mem_region(info->fix.smem_start,
912 info->fix.smem_len, pdev->name)) {
913 ret = -EBUSY;
914 goto stop_clk;
917 info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
918 if (!info->screen_base)
919 goto release_intmem;
922 * Don't clear the framebuffer -- someone may have set
923 * up a splash image.
925 } else {
926 /* alocate memory buffer */
927 ret = atmel_lcdfb_alloc_video_memory(sinfo);
928 if (ret < 0) {
929 dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
930 goto stop_clk;
934 /* LCDC registers */
935 info->fix.mmio_start = regs->start;
936 info->fix.mmio_len = resource_size(regs);
938 if (!request_mem_region(info->fix.mmio_start,
939 info->fix.mmio_len, pdev->name)) {
940 ret = -EBUSY;
941 goto free_fb;
944 sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
945 if (!sinfo->mmio) {
946 dev_err(dev, "cannot map LCDC registers\n");
947 goto release_mem;
950 /* Initialize PWM for contrast or backlight ("off") */
951 init_contrast(sinfo);
953 /* interrupt */
954 ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
955 if (ret) {
956 dev_err(dev, "request_irq failed: %d\n", ret);
957 goto unmap_mmio;
960 /* Some operations on the LCDC might sleep and
961 * require a preemptible task context */
962 INIT_WORK(&sinfo->task, atmel_lcdfb_task);
964 ret = atmel_lcdfb_init_fbinfo(sinfo);
965 if (ret < 0) {
966 dev_err(dev, "init fbinfo failed: %d\n", ret);
967 goto unregister_irqs;
971 * This makes sure that our colour bitfield
972 * descriptors are correctly initialised.
974 atmel_lcdfb_check_var(&info->var, info);
976 ret = fb_set_var(info, &info->var);
977 if (ret) {
978 dev_warn(dev, "unable to set display parameters\n");
979 goto free_cmap;
982 dev_set_drvdata(dev, info);
985 * Tell the world that we're ready to go
987 ret = register_framebuffer(info);
988 if (ret < 0) {
989 dev_err(dev, "failed to register framebuffer device: %d\n", ret);
990 goto reset_drvdata;
993 /* add selected videomode to modelist */
994 fb_var_to_videomode(&fbmode, &info->var);
995 fb_add_videomode(&fbmode, &info->modelist);
997 /* Power up the LCDC screen */
998 if (sinfo->atmel_lcdfb_power_control)
999 sinfo->atmel_lcdfb_power_control(1);
1001 dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %d\n",
1002 info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
1004 return 0;
1006 reset_drvdata:
1007 dev_set_drvdata(dev, NULL);
1008 free_cmap:
1009 fb_dealloc_cmap(&info->cmap);
1010 unregister_irqs:
1011 cancel_work_sync(&sinfo->task);
1012 free_irq(sinfo->irq_base, info);
1013 unmap_mmio:
1014 exit_backlight(sinfo);
1015 iounmap(sinfo->mmio);
1016 release_mem:
1017 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1018 free_fb:
1019 if (map)
1020 iounmap(info->screen_base);
1021 else
1022 atmel_lcdfb_free_video_memory(sinfo);
1024 release_intmem:
1025 if (map)
1026 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1027 stop_clk:
1028 atmel_lcdfb_stop_clock(sinfo);
1029 clk_put(sinfo->lcdc_clk);
1030 put_bus_clk:
1031 if (sinfo->bus_clk)
1032 clk_put(sinfo->bus_clk);
1033 free_info:
1034 framebuffer_release(info);
1035 out:
1036 dev_dbg(dev, "%s FAILED\n", __func__);
1037 return ret;
1040 static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
1042 struct device *dev = &pdev->dev;
1043 struct fb_info *info = dev_get_drvdata(dev);
1044 struct atmel_lcdfb_info *sinfo;
1046 if (!info || !info->par)
1047 return 0;
1048 sinfo = info->par;
1050 cancel_work_sync(&sinfo->task);
1051 exit_backlight(sinfo);
1052 if (sinfo->atmel_lcdfb_power_control)
1053 sinfo->atmel_lcdfb_power_control(0);
1054 unregister_framebuffer(info);
1055 atmel_lcdfb_stop_clock(sinfo);
1056 clk_put(sinfo->lcdc_clk);
1057 if (sinfo->bus_clk)
1058 clk_put(sinfo->bus_clk);
1059 fb_dealloc_cmap(&info->cmap);
1060 free_irq(sinfo->irq_base, info);
1061 iounmap(sinfo->mmio);
1062 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1063 if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
1064 iounmap(info->screen_base);
1065 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1066 } else {
1067 atmel_lcdfb_free_video_memory(sinfo);
1070 dev_set_drvdata(dev, NULL);
1071 framebuffer_release(info);
1073 return 0;
1076 #ifdef CONFIG_PM
1078 static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
1080 struct fb_info *info = platform_get_drvdata(pdev);
1081 struct atmel_lcdfb_info *sinfo = info->par;
1084 * We don't want to handle interrupts while the clock is
1085 * stopped. It may take forever.
1087 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
1089 sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
1090 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
1091 if (sinfo->atmel_lcdfb_power_control)
1092 sinfo->atmel_lcdfb_power_control(0);
1094 atmel_lcdfb_stop(sinfo);
1095 atmel_lcdfb_stop_clock(sinfo);
1097 return 0;
1100 static int atmel_lcdfb_resume(struct platform_device *pdev)
1102 struct fb_info *info = platform_get_drvdata(pdev);
1103 struct atmel_lcdfb_info *sinfo = info->par;
1105 atmel_lcdfb_start_clock(sinfo);
1106 atmel_lcdfb_start(sinfo);
1107 if (sinfo->atmel_lcdfb_power_control)
1108 sinfo->atmel_lcdfb_power_control(1);
1109 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
1111 /* Enable FIFO & DMA errors */
1112 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI
1113 | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
1115 return 0;
1118 #else
1119 #define atmel_lcdfb_suspend NULL
1120 #define atmel_lcdfb_resume NULL
1121 #endif
1123 static struct platform_driver atmel_lcdfb_driver = {
1124 .remove = __exit_p(atmel_lcdfb_remove),
1125 .suspend = atmel_lcdfb_suspend,
1126 .resume = atmel_lcdfb_resume,
1128 .driver = {
1129 .name = "atmel_lcdfb",
1130 .owner = THIS_MODULE,
1134 static int __init atmel_lcdfb_init(void)
1136 return platform_driver_probe(&atmel_lcdfb_driver, atmel_lcdfb_probe);
1139 static void __exit atmel_lcdfb_exit(void)
1141 platform_driver_unregister(&atmel_lcdfb_driver);
1144 module_init(atmel_lcdfb_init);
1145 module_exit(atmel_lcdfb_exit);
1147 MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
1148 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
1149 MODULE_LICENSE("GPL");