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Linux 2.6.25-rc4
[linux-2.6/next.git] / arch / ia64 / kernel / ptrace.c
blob331d6768b5d50f7257cb6c389929fdfb989800c9
1 /*
2 * Kernel support for the ptrace() and syscall tracing interfaces.
3 *
4 * Copyright (C) 1999-2005 Hewlett-Packard Co
5 * David Mosberger-Tang <davidm@hpl.hp.com>
6 *
7 * Derived from the x86 and Alpha versions.
8 */
9 #include <linux/kernel.h>
10 #include <linux/sched.h>
11 #include <linux/slab.h>
12 #include <linux/mm.h>
13 #include <linux/errno.h>
14 #include <linux/ptrace.h>
15 #include <linux/smp_lock.h>
16 #include <linux/user.h>
17 #include <linux/security.h>
18 #include <linux/audit.h>
19 #include <linux/signal.h>
20
21 #include <asm/pgtable.h>
22 #include <asm/processor.h>
23 #include <asm/ptrace_offsets.h>
24 #include <asm/rse.h>
25 #include <asm/system.h>
26 #include <asm/uaccess.h>
27 #include <asm/unwind.h>
28 #ifdef CONFIG_PERFMON
29 #include <asm/perfmon.h>
30 #endif
31
32 #include "entry.h"
33
34 /*
35 * Bits in the PSR that we allow ptrace() to change:
36 * be, up, ac, mfl, mfh (the user mask; five bits total)
37 * db (debug breakpoint fault; one bit)
38 * id (instruction debug fault disable; one bit)
39 * dd (data debug fault disable; one bit)
40 * ri (restart instruction; two bits)
41 * is (instruction set; one bit)
42 */
43 #define IPSR_MASK (IA64_PSR_UM | IA64_PSR_DB | IA64_PSR_IS \
44 | IA64_PSR_ID | IA64_PSR_DD | IA64_PSR_RI)
45
46 #define MASK(nbits) ((1UL << (nbits)) - 1) /* mask with NBITS bits set */
47 #define PFM_MASK MASK(38)
48
49 #define PTRACE_DEBUG 0
50
51 #if PTRACE_DEBUG
52 # define dprintk(format...) printk(format)
53 # define inline
54 #else
55 # define dprintk(format...)
56 #endif
57
58 /* Return TRUE if PT was created due to kernel-entry via a system-call. */
59
60 static inline int
61 in_syscall (struct pt_regs *pt)
62 {
63 return (long) pt->cr_ifs >= 0;
64 }
65
66 /*
67 * Collect the NaT bits for r1-r31 from scratch_unat and return a NaT
68 * bitset where bit i is set iff the NaT bit of register i is set.
69 */
70 unsigned long
71 ia64_get_scratch_nat_bits (struct pt_regs *pt, unsigned long scratch_unat)
72 {
73 # define GET_BITS(first, last, unat) \
74 ({ \
75 unsigned long bit = ia64_unat_pos(&pt->r##first); \
76 unsigned long nbits = (last - first + 1); \
77 unsigned long mask = MASK(nbits) << first; \
78 unsigned long dist; \
79 if (bit < first) \
80 dist = 64 + bit - first; \
81 else \
82 dist = bit - first; \
83 ia64_rotr(unat, dist) & mask; \
84 })
85 unsigned long val;
86
87 /*
88 * Registers that are stored consecutively in struct pt_regs
89 * can be handled in parallel. If the register order in
90 * struct_pt_regs changes, this code MUST be updated.
91 */
92 val = GET_BITS( 1, 1, scratch_unat);
93 val |= GET_BITS( 2, 3, scratch_unat);
94 val |= GET_BITS(12, 13, scratch_unat);
95 val |= GET_BITS(14, 14, scratch_unat);
96 val |= GET_BITS(15, 15, scratch_unat);
97 val |= GET_BITS( 8, 11, scratch_unat);
98 val |= GET_BITS(16, 31, scratch_unat);
99 return val;
100
101 # undef GET_BITS
102 }
103
104 /*
105 * Set the NaT bits for the scratch registers according to NAT and
106 * return the resulting unat (assuming the scratch registers are
107 * stored in PT).
108 */
109 unsigned long
110 ia64_put_scratch_nat_bits (struct pt_regs *pt, unsigned long nat)
111 {
112 # define PUT_BITS(first, last, nat) \
113 ({ \
114 unsigned long bit = ia64_unat_pos(&pt->r##first); \
115 unsigned long nbits = (last - first + 1); \
116 unsigned long mask = MASK(nbits) << first; \
117 long dist; \
118 if (bit < first) \
119 dist = 64 + bit - first; \
120 else \
121 dist = bit - first; \
122 ia64_rotl(nat & mask, dist); \
123 })
124 unsigned long scratch_unat;
125
126 /*
127 * Registers that are stored consecutively in struct pt_regs
128 * can be handled in parallel. If the register order in
129 * struct_pt_regs changes, this code MUST be updated.
130 */
131 scratch_unat = PUT_BITS( 1, 1, nat);
132 scratch_unat |= PUT_BITS( 2, 3, nat);
133 scratch_unat |= PUT_BITS(12, 13, nat);
134 scratch_unat |= PUT_BITS(14, 14, nat);
135 scratch_unat |= PUT_BITS(15, 15, nat);
136 scratch_unat |= PUT_BITS( 8, 11, nat);
137 scratch_unat |= PUT_BITS(16, 31, nat);
138
139 return scratch_unat;
140
141 # undef PUT_BITS
142 }
143
144 #define IA64_MLX_TEMPLATE 0x2
145 #define IA64_MOVL_OPCODE 6
146
147 void
148 ia64_increment_ip (struct pt_regs *regs)
149 {
150 unsigned long w0, ri = ia64_psr(regs)->ri + 1;
151
152 if (ri > 2) {
153 ri = 0;
154 regs->cr_iip += 16;
155 } else if (ri == 2) {
156 get_user(w0, (char __user *) regs->cr_iip + 0);
157 if (((w0 >> 1) & 0xf) == IA64_MLX_TEMPLATE) {
158 /*
159 * rfi'ing to slot 2 of an MLX bundle causes
160 * an illegal operation fault. We don't want
161 * that to happen...
162 */
163 ri = 0;
164 regs->cr_iip += 16;
165 }
166 }
167 ia64_psr(regs)->ri = ri;
168 }
169
170 void
171 ia64_decrement_ip (struct pt_regs *regs)
172 {
173 unsigned long w0, ri = ia64_psr(regs)->ri - 1;
174
175 if (ia64_psr(regs)->ri == 0) {
176 regs->cr_iip -= 16;
177 ri = 2;
178 get_user(w0, (char __user *) regs->cr_iip + 0);
179 if (((w0 >> 1) & 0xf) == IA64_MLX_TEMPLATE) {
180 /*
181 * rfi'ing to slot 2 of an MLX bundle causes
182 * an illegal operation fault. We don't want
183 * that to happen...
184 */
185 ri = 1;
186 }
187 }
188 ia64_psr(regs)->ri = ri;
189 }
190
191 /*
192 * This routine is used to read an rnat bits that are stored on the
193 * kernel backing store. Since, in general, the alignment of the user
194 * and kernel are different, this is not completely trivial. In
195 * essence, we need to construct the user RNAT based on up to two
196 * kernel RNAT values and/or the RNAT value saved in the child's
197 * pt_regs.
198 *
199 * user rbs
200 *
201 * +--------+ <-- lowest address
202 * | slot62 |
203 * +--------+
204 * | rnat | 0x....1f8
205 * +--------+
206 * | slot00 | \
207 * +--------+ |
208 * | slot01 | > child_regs->ar_rnat
209 * +--------+ |
210 * | slot02 | / kernel rbs
211 * +--------+ +--------+
212 * <- child_regs->ar_bspstore | slot61 | <-- krbs
213 * +- - - - + +--------+
214 * | slot62 |
215 * +- - - - + +--------+
216 * | rnat |
217 * +- - - - + +--------+
218 * vrnat | slot00 |
219 * +- - - - + +--------+
220 * = =
221 * +--------+
222 * | slot00 | \
223 * +--------+ |
224 * | slot01 | > child_stack->ar_rnat
225 * +--------+ |
226 * | slot02 | /
227 * +--------+
228 * <--- child_stack->ar_bspstore
229 *
230 * The way to think of this code is as follows: bit 0 in the user rnat
231 * corresponds to some bit N (0 <= N <= 62) in one of the kernel rnat
232 * value. The kernel rnat value holding this bit is stored in
233 * variable rnat0. rnat1 is loaded with the kernel rnat value that
234 * form the upper bits of the user rnat value.
235 *
236 * Boundary cases:
237 *
238 * o when reading the rnat "below" the first rnat slot on the kernel
239 * backing store, rnat0/rnat1 are set to 0 and the low order bits are
240 * merged in from pt->ar_rnat.
241 *
242 * o when reading the rnat "above" the last rnat slot on the kernel
243 * backing store, rnat0/rnat1 gets its value from sw->ar_rnat.
244 */
245 static unsigned long
246 get_rnat (struct task_struct *task, struct switch_stack *sw,
247 unsigned long *krbs, unsigned long *urnat_addr,
248 unsigned long *urbs_end)
249 {
250 unsigned long rnat0 = 0, rnat1 = 0, urnat = 0, *slot0_kaddr;
251 unsigned long umask = 0, mask, m;
252 unsigned long *kbsp, *ubspstore, *rnat0_kaddr, *rnat1_kaddr, shift;
253 long num_regs, nbits;
254 struct pt_regs *pt;
255
256 pt = task_pt_regs(task);
257 kbsp = (unsigned long *) sw->ar_bspstore;
258 ubspstore = (unsigned long *) pt->ar_bspstore;
259
260 if (urbs_end < urnat_addr)
261 nbits = ia64_rse_num_regs(urnat_addr - 63, urbs_end);
262 else
263 nbits = 63;
264 mask = MASK(nbits);
265 /*
266 * First, figure out which bit number slot 0 in user-land maps
267 * to in the kernel rnat. Do this by figuring out how many
268 * register slots we're beyond the user's backingstore and
269 * then computing the equivalent address in kernel space.
270 */
271 num_regs = ia64_rse_num_regs(ubspstore, urnat_addr + 1);
272 slot0_kaddr = ia64_rse_skip_regs(krbs, num_regs);
273 shift = ia64_rse_slot_num(slot0_kaddr);
274 rnat1_kaddr = ia64_rse_rnat_addr(slot0_kaddr);
275 rnat0_kaddr = rnat1_kaddr - 64;
276
277 if (ubspstore + 63 > urnat_addr) {
278 /* some bits need to be merged in from pt->ar_rnat */
279 umask = MASK(ia64_rse_slot_num(ubspstore)) & mask;
280 urnat = (pt->ar_rnat & umask);
281 mask &= ~umask;
282 if (!mask)
283 return urnat;
284 }
285
286 m = mask << shift;
287 if (rnat0_kaddr >= kbsp)
288 rnat0 = sw->ar_rnat;
289 else if (rnat0_kaddr > krbs)
290 rnat0 = *rnat0_kaddr;
291 urnat |= (rnat0 & m) >> shift;
292
293 m = mask >> (63 - shift);
294 if (rnat1_kaddr >= kbsp)
295 rnat1 = sw->ar_rnat;
296 else if (rnat1_kaddr > krbs)
297 rnat1 = *rnat1_kaddr;
298 urnat |= (rnat1 & m) << (63 - shift);
299 return urnat;
300 }
301
302 /*
303 * The reverse of get_rnat.
304 */
305 static void
306 put_rnat (struct task_struct *task, struct switch_stack *sw,
307 unsigned long *krbs, unsigned long *urnat_addr, unsigned long urnat,
308 unsigned long *urbs_end)
309 {
310 unsigned long rnat0 = 0, rnat1 = 0, *slot0_kaddr, umask = 0, mask, m;
311 unsigned long *kbsp, *ubspstore, *rnat0_kaddr, *rnat1_kaddr, shift;
312 long num_regs, nbits;
313 struct pt_regs *pt;
314 unsigned long cfm, *urbs_kargs;
315
316 pt = task_pt_regs(task);
317 kbsp = (unsigned long *) sw->ar_bspstore;
318 ubspstore = (unsigned long *) pt->ar_bspstore;
319
320 urbs_kargs = urbs_end;
321 if (in_syscall(pt)) {
322 /*
323 * If entered via syscall, don't allow user to set rnat bits
324 * for syscall args.
325 */
326 cfm = pt->cr_ifs;
327 urbs_kargs = ia64_rse_skip_regs(urbs_end, -(cfm & 0x7f));
328 }
329
330 if (urbs_kargs >= urnat_addr)
331 nbits = 63;
332 else {
333 if ((urnat_addr - 63) >= urbs_kargs)
334 return;
335 nbits = ia64_rse_num_regs(urnat_addr - 63, urbs_kargs);
336 }
337 mask = MASK(nbits);
338
339 /*
340 * First, figure out which bit number slot 0 in user-land maps
341 * to in the kernel rnat. Do this by figuring out how many
342 * register slots we're beyond the user's backingstore and
343 * then computing the equivalent address in kernel space.
344 */
345 num_regs = ia64_rse_num_regs(ubspstore, urnat_addr + 1);
346 slot0_kaddr = ia64_rse_skip_regs(krbs, num_regs);
347 shift = ia64_rse_slot_num(slot0_kaddr);
348 rnat1_kaddr = ia64_rse_rnat_addr(slot0_kaddr);
349 rnat0_kaddr = rnat1_kaddr - 64;
350
351 if (ubspstore + 63 > urnat_addr) {
352 /* some bits need to be place in pt->ar_rnat: */
353 umask = MASK(ia64_rse_slot_num(ubspstore)) & mask;
354 pt->ar_rnat = (pt->ar_rnat & ~umask) | (urnat & umask);
355 mask &= ~umask;
356 if (!mask)
357 return;
358 }
359 /*
360 * Note: Section 11.1 of the EAS guarantees that bit 63 of an
361 * rnat slot is ignored. so we don't have to clear it here.
362 */
363 rnat0 = (urnat << shift);
364 m = mask << shift;
365 if (rnat0_kaddr >= kbsp)
366 sw->ar_rnat = (sw->ar_rnat & ~m) | (rnat0 & m);
367 else if (rnat0_kaddr > krbs)
368 *rnat0_kaddr = ((*rnat0_kaddr & ~m) | (rnat0 & m));
369
370 rnat1 = (urnat >> (63 - shift));
371 m = mask >> (63 - shift);
372 if (rnat1_kaddr >= kbsp)
373 sw->ar_rnat = (sw->ar_rnat & ~m) | (rnat1 & m);
374 else if (rnat1_kaddr > krbs)
375 *rnat1_kaddr = ((*rnat1_kaddr & ~m) | (rnat1 & m));
376 }
377
378 static inline int
379 on_kernel_rbs (unsigned long addr, unsigned long bspstore,
380 unsigned long urbs_end)
381 {
382 unsigned long *rnat_addr = ia64_rse_rnat_addr((unsigned long *)
383 urbs_end);
384 return (addr >= bspstore && addr <= (unsigned long) rnat_addr);
385 }
386
387 /*
388 * Read a word from the user-level backing store of task CHILD. ADDR
389 * is the user-level address to read the word from, VAL a pointer to
390 * the return value, and USER_BSP gives the end of the user-level
391 * backing store (i.e., it's the address that would be in ar.bsp after
392 * the user executed a "cover" instruction).
393 *
394 * This routine takes care of accessing the kernel register backing
395 * store for those registers that got spilled there. It also takes
396 * care of calculating the appropriate RNaT collection words.
397 */
398 long
399 ia64_peek (struct task_struct *child, struct switch_stack *child_stack,
400 unsigned long user_rbs_end, unsigned long addr, long *val)
401 {
402 unsigned long *bspstore, *krbs, regnum, *laddr, *urbs_end, *rnat_addr;
403 struct pt_regs *child_regs;
404 size_t copied;
405 long ret;
406
407 urbs_end = (long *) user_rbs_end;
408 laddr = (unsigned long *) addr;
409 child_regs = task_pt_regs(child);
410 bspstore = (unsigned long *) child_regs->ar_bspstore;
411 krbs = (unsigned long *) child + IA64_RBS_OFFSET/8;
412 if (on_kernel_rbs(addr, (unsigned long) bspstore,
413 (unsigned long) urbs_end))
414 {
415 /*
416 * Attempt to read the RBS in an area that's actually
417 * on the kernel RBS => read the corresponding bits in
418 * the kernel RBS.
419 */
420 rnat_addr = ia64_rse_rnat_addr(laddr);
421 ret = get_rnat(child, child_stack, krbs, rnat_addr, urbs_end);
422
423 if (laddr == rnat_addr) {
424 /* return NaT collection word itself */
425 *val = ret;
426 return 0;
427 }
428
429 if (((1UL << ia64_rse_slot_num(laddr)) & ret) != 0) {
430 /*
431 * It is implementation dependent whether the
432 * data portion of a NaT value gets saved on a
433 * st8.spill or RSE spill (e.g., see EAS 2.6,
434 * 4.4.4.6 Register Spill and Fill). To get
435 * consistent behavior across all possible
436 * IA-64 implementations, we return zero in
437 * this case.
438 */
439 *val = 0;
440 return 0;
441 }
442
443 if (laddr < urbs_end) {
444 /*
445 * The desired word is on the kernel RBS and
446 * is not a NaT.
447 */
448 regnum = ia64_rse_num_regs(bspstore, laddr);
449 *val = *ia64_rse_skip_regs(krbs, regnum);
450 return 0;
451 }
452 }
453 copied = access_process_vm(child, addr, &ret, sizeof(ret), 0);
454 if (copied != sizeof(ret))
455 return -EIO;
456 *val = ret;
457 return 0;
458 }
459
460 long
461 ia64_poke (struct task_struct *child, struct switch_stack *child_stack,
462 unsigned long user_rbs_end, unsigned long addr, long val)
463 {
464 unsigned long *bspstore, *krbs, regnum, *laddr;
465 unsigned long *urbs_end = (long *) user_rbs_end;
466 struct pt_regs *child_regs;
467
468 laddr = (unsigned long *) addr;
469 child_regs = task_pt_regs(child);
470 bspstore = (unsigned long *) child_regs->ar_bspstore;
471 krbs = (unsigned long *) child + IA64_RBS_OFFSET/8;
472 if (on_kernel_rbs(addr, (unsigned long) bspstore,
473 (unsigned long) urbs_end))
474 {
475 /*
476 * Attempt to write the RBS in an area that's actually
477 * on the kernel RBS => write the corresponding bits
478 * in the kernel RBS.
479 */
480 if (ia64_rse_is_rnat_slot(laddr))
481 put_rnat(child, child_stack, krbs, laddr, val,
482 urbs_end);
483 else {
484 if (laddr < urbs_end) {
485 regnum = ia64_rse_num_regs(bspstore, laddr);
486 *ia64_rse_skip_regs(krbs, regnum) = val;
487 }
488 }
489 } else if (access_process_vm(child, addr, &val, sizeof(val), 1)
490 != sizeof(val))
491 return -EIO;
492 return 0;
493 }
494
495 /*
496 * Calculate the address of the end of the user-level register backing
497 * store. This is the address that would have been stored in ar.bsp
498 * if the user had executed a "cover" instruction right before
499 * entering the kernel. If CFMP is not NULL, it is used to return the
500 * "current frame mask" that was active at the time the kernel was
501 * entered.
502 */
503 unsigned long
504 ia64_get_user_rbs_end (struct task_struct *child, struct pt_regs *pt,
505 unsigned long *cfmp)
506 {
507 unsigned long *krbs, *bspstore, cfm = pt->cr_ifs;
508 long ndirty;
509
510 krbs = (unsigned long *) child + IA64_RBS_OFFSET/8;
511 bspstore = (unsigned long *) pt->ar_bspstore;
512 ndirty = ia64_rse_num_regs(krbs, krbs + (pt->loadrs >> 19));
513
514 if (in_syscall(pt))
515 ndirty += (cfm & 0x7f);
516 else
517 cfm &= ~(1UL << 63); /* clear valid bit */
518
519 if (cfmp)
520 *cfmp = cfm;
521 return (unsigned long) ia64_rse_skip_regs(bspstore, ndirty);
522 }
523
524 /*
525 * Synchronize (i.e, write) the RSE backing store living in kernel
526 * space to the VM of the CHILD task. SW and PT are the pointers to
527 * the switch_stack and pt_regs structures, respectively.
528 * USER_RBS_END is the user-level address at which the backing store
529 * ends.
530 */
531 long
532 ia64_sync_user_rbs (struct task_struct *child, struct switch_stack *sw,
533 unsigned long user_rbs_start, unsigned long user_rbs_end)
534 {
535 unsigned long addr, val;
536 long ret;
537
538 /* now copy word for word from kernel rbs to user rbs: */
539 for (addr = user_rbs_start; addr < user_rbs_end; addr += 8) {
540 ret = ia64_peek(child, sw, user_rbs_end, addr, &val);
541 if (ret < 0)
542 return ret;
543 if (access_process_vm(child, addr, &val, sizeof(val), 1)
544 != sizeof(val))
545 return -EIO;
546 }
547 return 0;
548 }
549
550 static long
551 ia64_sync_kernel_rbs (struct task_struct *child, struct switch_stack *sw,
552 unsigned long user_rbs_start, unsigned long user_rbs_end)
553 {
554 unsigned long addr, val;
555 long ret;
556
557 /* now copy word for word from user rbs to kernel rbs: */
558 for (addr = user_rbs_start; addr < user_rbs_end; addr += 8) {
559 if (access_process_vm(child, addr, &val, sizeof(val), 0)
560 != sizeof(val))
561 return -EIO;
562
563 ret = ia64_poke(child, sw, user_rbs_end, addr, val);
564 if (ret < 0)
565 return ret;
566 }
567 return 0;
568 }
569
570 typedef long (*syncfunc_t)(struct task_struct *, struct switch_stack *,
571 unsigned long, unsigned long);
572
573 static void do_sync_rbs(struct unw_frame_info *info, void *arg)
574 {
575 struct pt_regs *pt;
576 unsigned long urbs_end;
577 syncfunc_t fn = arg;
578
579 if (unw_unwind_to_user(info) < 0)
580 return;
581 pt = task_pt_regs(info->task);
582 urbs_end = ia64_get_user_rbs_end(info->task, pt, NULL);
583
584 fn(info->task, info->sw, pt->ar_bspstore, urbs_end);
585 }
586
587 /*
588 * when a thread is stopped (ptraced), debugger might change thread's user
589 * stack (change memory directly), and we must avoid the RSE stored in kernel
590 * to override user stack (user space's RSE is newer than kernel's in the
591 * case). To workaround the issue, we copy kernel RSE to user RSE before the
592 * task is stopped, so user RSE has updated data. we then copy user RSE to
593 * kernel after the task is resummed from traced stop and kernel will use the
594 * newer RSE to return to user. TIF_RESTORE_RSE is the flag to indicate we need
595 * synchronize user RSE to kernel.
596 */
597 void ia64_ptrace_stop(void)
598 {
599 if (test_and_set_tsk_thread_flag(current, TIF_RESTORE_RSE))
600 return;
601 tsk_set_notify_resume(current);
602 unw_init_running(do_sync_rbs, ia64_sync_user_rbs);
603 }
604
605 /*
606 * This is called to read back the register backing store.
607 */
608 void ia64_sync_krbs(void)
609 {
610 clear_tsk_thread_flag(current, TIF_RESTORE_RSE);
611 tsk_clear_notify_resume(current);
612
613 unw_init_running(do_sync_rbs, ia64_sync_kernel_rbs);
614 }
615
616 /*
617 * After PTRACE_ATTACH, a thread's register backing store area in user
618 * space is assumed to contain correct data whenever the thread is
619 * stopped. arch_ptrace_stop takes care of this on tracing stops.
620 * But if the child was already stopped for job control when we attach
621 * to it, then it might not ever get into ptrace_stop by the time we
622 * want to examine the user memory containing the RBS.
623 */
624 void
625 ptrace_attach_sync_user_rbs (struct task_struct *child)
626 {
627 int stopped = 0;
628 struct unw_frame_info info;
629
630 /*
631 * If the child is in TASK_STOPPED, we need to change that to
632 * TASK_TRACED momentarily while we operate on it. This ensures
633 * that the child won't be woken up and return to user mode while
634 * we are doing the sync. (It can only be woken up for SIGKILL.)
635 */
636
637 read_lock(&tasklist_lock);
638 if (child->signal) {
639 spin_lock_irq(&child->sighand->siglock);
640 if (child->state == TASK_STOPPED &&
641 !test_and_set_tsk_thread_flag(child, TIF_RESTORE_RSE)) {
642 tsk_set_notify_resume(child);
643
644 child->state = TASK_TRACED;
645 stopped = 1;
646 }
647 spin_unlock_irq(&child->sighand->siglock);
648 }
649 read_unlock(&tasklist_lock);
650
651 if (!stopped)
652 return;
653
654 unw_init_from_blocked_task(&info, child);
655 do_sync_rbs(&info, ia64_sync_user_rbs);
656
657 /*
658 * Now move the child back into TASK_STOPPED if it should be in a
659 * job control stop, so that SIGCONT can be used to wake it up.
660 */
661 read_lock(&tasklist_lock);
662 if (child->signal) {
663 spin_lock_irq(&child->sighand->siglock);
664 if (child->state == TASK_TRACED &&
665 (child->signal->flags & SIGNAL_STOP_STOPPED)) {
666 child->state = TASK_STOPPED;
667 }
668 spin_unlock_irq(&child->sighand->siglock);
669 }
670 read_unlock(&tasklist_lock);
671 }
672
673 static inline int
674 thread_matches (struct task_struct *thread, unsigned long addr)
675 {
676 unsigned long thread_rbs_end;
677 struct pt_regs *thread_regs;
678
679 if (ptrace_check_attach(thread, 0) < 0)
680 /*
681 * If the thread is not in an attachable state, we'll
682 * ignore it. The net effect is that if ADDR happens
683 * to overlap with the portion of the thread's
684 * register backing store that is currently residing
685 * on the thread's kernel stack, then ptrace() may end
686 * up accessing a stale value. But if the thread
687 * isn't stopped, that's a problem anyhow, so we're
688 * doing as well as we can...
689 */
690 return 0;
691
692 thread_regs = task_pt_regs(thread);
693 thread_rbs_end = ia64_get_user_rbs_end(thread, thread_regs, NULL);
694 if (!on_kernel_rbs(addr, thread_regs->ar_bspstore, thread_rbs_end))
695 return 0;
696
697 return 1; /* looks like we've got a winner */
698 }
699
700 /*
701 * GDB apparently wants to be able to read the register-backing store
702 * of any thread when attached to a given process. If we are peeking
703 * or poking an address that happens to reside in the kernel-backing
704 * store of another thread, we need to attach to that thread, because
705 * otherwise we end up accessing stale data.
706 *
707 * task_list_lock must be read-locked before calling this routine!
708 */
709 static struct task_struct *
710 find_thread_for_addr (struct task_struct *child, unsigned long addr)
711 {
712 struct task_struct *p;
713 struct mm_struct *mm;
714 struct list_head *this, *next;
715 int mm_users;
716
717 if (!(mm = get_task_mm(child)))
718 return child;
719
720 /* -1 because of our get_task_mm(): */
721 mm_users = atomic_read(&mm->mm_users) - 1;
722 if (mm_users <= 1)
723 goto out; /* not multi-threaded */
724
725 /*
726 * Traverse the current process' children list. Every task that
727 * one attaches to becomes a child. And it is only attached children
728 * of the debugger that are of interest (ptrace_check_attach checks
729 * for this).
730 */
731 list_for_each_safe(this, next, &current->children) {
732 p = list_entry(this, struct task_struct, sibling);
733 if (p->tgid != child->tgid)
734 continue;
735 if (thread_matches(p, addr)) {
736 child = p;
737 goto out;
738 }
739 }
740
741 out:
742 mmput(mm);
743 return child;
744 }
745
746 /*
747 * Write f32-f127 back to task->thread.fph if it has been modified.
748 */
749 inline void
750 ia64_flush_fph (struct task_struct *task)
751 {
752 struct ia64_psr *psr = ia64_psr(task_pt_regs(task));
753
754 /*
755 * Prevent migrating this task while
756 * we're fiddling with the FPU state
757 */
758 preempt_disable();
759 if (ia64_is_local_fpu_owner(task) && psr->mfh) {
760 psr->mfh = 0;
761 task->thread.flags |= IA64_THREAD_FPH_VALID;
762 ia64_save_fpu(&task->thread.fph[0]);
763 }
764 preempt_enable();
765 }
766
767 /*
768 * Sync the fph state of the task so that it can be manipulated
769 * through thread.fph. If necessary, f32-f127 are written back to
770 * thread.fph or, if the fph state hasn't been used before, thread.fph
771 * is cleared to zeroes. Also, access to f32-f127 is disabled to
772 * ensure that the task picks up the state from thread.fph when it
773 * executes again.
774 */
775 void
776 ia64_sync_fph (struct task_struct *task)
777 {
778 struct ia64_psr *psr = ia64_psr(task_pt_regs(task));
779
780 ia64_flush_fph(task);
781 if (!(task->thread.flags & IA64_THREAD_FPH_VALID)) {
782 task->thread.flags |= IA64_THREAD_FPH_VALID;
783 memset(&task->thread.fph, 0, sizeof(task->thread.fph));
784 }
785 ia64_drop_fpu(task);
786 psr->dfh = 1;
787 }
788
789 static int
790 access_fr (struct unw_frame_info *info, int regnum, int hi,
791 unsigned long *data, int write_access)
792 {
793 struct ia64_fpreg fpval;
794 int ret;
795
796 ret = unw_get_fr(info, regnum, &fpval);
797 if (ret < 0)
798 return ret;
799
800 if (write_access) {
801 fpval.u.bits[hi] = *data;
802 ret = unw_set_fr(info, regnum, fpval);
803 } else
804 *data = fpval.u.bits[hi];
805 return ret;
806 }
807
808 /*
809 * Change the machine-state of CHILD such that it will return via the normal
810 * kernel exit-path, rather than the syscall-exit path.
811 */
812 static void
813 convert_to_non_syscall (struct task_struct *child, struct pt_regs *pt,
814 unsigned long cfm)
815 {
816 struct unw_frame_info info, prev_info;
817 unsigned long ip, sp, pr;
818
819 unw_init_from_blocked_task(&info, child);
820 while (1) {
821 prev_info = info;
822 if (unw_unwind(&info) < 0)
823 return;
824
825 unw_get_sp(&info, &sp);
826 if ((long)((unsigned long)child + IA64_STK_OFFSET - sp)
827 < IA64_PT_REGS_SIZE) {
828 dprintk("ptrace.%s: ran off the top of the kernel "
829 "stack\n", __FUNCTION__);
830 return;
831 }
832 if (unw_get_pr (&prev_info, &pr) < 0) {
833 unw_get_rp(&prev_info, &ip);
834 dprintk("ptrace.%s: failed to read "
835 "predicate register (ip=0x%lx)\n",
836 __FUNCTION__, ip);
837 return;
838 }
839 if (unw_is_intr_frame(&info)
840 && (pr & (1UL << PRED_USER_STACK)))
841 break;
842 }
843
844 /*
845 * Note: at the time of this call, the target task is blocked
846 * in notify_resume_user() and by clearling PRED_LEAVE_SYSCALL
847 * (aka, "pLvSys") we redirect execution from
848 * .work_pending_syscall_end to .work_processed_kernel.
849 */
850 unw_get_pr(&prev_info, &pr);
851 pr &= ~((1UL << PRED_SYSCALL) | (1UL << PRED_LEAVE_SYSCALL));
852 pr |= (1UL << PRED_NON_SYSCALL);
853 unw_set_pr(&prev_info, pr);
854
855 pt->cr_ifs = (1UL << 63) | cfm;
856 /*
857 * Clear the memory that is NOT written on syscall-entry to
858 * ensure we do not leak kernel-state to user when execution
859 * resumes.
860 */
861 pt->r2 = 0;
862 pt->r3 = 0;
863 pt->r14 = 0;
864 memset(&pt->r16, 0, 16*8); /* clear r16-r31 */
865 memset(&pt->f6, 0, 6*16); /* clear f6-f11 */
866 pt->b7 = 0;
867 pt->ar_ccv = 0;
868 pt->ar_csd = 0;
869 pt->ar_ssd = 0;
870 }
871
872 static int
873 access_nat_bits (struct task_struct *child, struct pt_regs *pt,
874 struct unw_frame_info *info,
875 unsigned long *data, int write_access)
876 {
877 unsigned long regnum, nat_bits, scratch_unat, dummy = 0;
878 char nat = 0;
879
880 if (write_access) {
881 nat_bits = *data;
882 scratch_unat = ia64_put_scratch_nat_bits(pt, nat_bits);
883 if (unw_set_ar(info, UNW_AR_UNAT, scratch_unat) < 0) {
884 dprintk("ptrace: failed to set ar.unat\n");
885 return -1;
886 }
887 for (regnum = 4; regnum <= 7; ++regnum) {
888 unw_get_gr(info, regnum, &dummy, &nat);
889 unw_set_gr(info, regnum, dummy,
890 (nat_bits >> regnum) & 1);
891 }
892 } else {
893 if (unw_get_ar(info, UNW_AR_UNAT, &scratch_unat) < 0) {
894 dprintk("ptrace: failed to read ar.unat\n");
895 return -1;
896 }
897 nat_bits = ia64_get_scratch_nat_bits(pt, scratch_unat);
898 for (regnum = 4; regnum <= 7; ++regnum) {
899 unw_get_gr(info, regnum, &dummy, &nat);
900 nat_bits |= (nat != 0) << regnum;
901 }
902 *data = nat_bits;
903 }
904 return 0;
905 }
906
907 static int
908 access_uarea (struct task_struct *child, unsigned long addr,
909 unsigned long *data, int write_access)
910 {
911 unsigned long *ptr, regnum, urbs_end, rnat_addr, cfm;
912 struct switch_stack *sw;
913 struct pt_regs *pt;
914 # define pt_reg_addr(pt, reg) ((void *) \
915 ((unsigned long) (pt) \
916 + offsetof(struct pt_regs, reg)))
917
918
919 pt = task_pt_regs(child);
920 sw = (struct switch_stack *) (child->thread.ksp + 16);
921
922 if ((addr & 0x7) != 0) {
923 dprintk("ptrace: unaligned register address 0x%lx\n", addr);
924 return -1;
925 }
926
927 if (addr < PT_F127 + 16) {
928 /* accessing fph */
929 if (write_access)
930 ia64_sync_fph(child);
931 else
932 ia64_flush_fph(child);
933 ptr = (unsigned long *)
934 ((unsigned long) &child->thread.fph + addr);
935 } else if ((addr >= PT_F10) && (addr < PT_F11 + 16)) {
936 /* scratch registers untouched by kernel (saved in pt_regs) */
937 ptr = pt_reg_addr(pt, f10) + (addr - PT_F10);
938 } else if (addr >= PT_F12 && addr < PT_F15 + 16) {
939 /*
940 * Scratch registers untouched by kernel (saved in
941 * switch_stack).
942 */
943 ptr = (unsigned long *) ((long) sw
944 + (addr - PT_NAT_BITS - 32));
945 } else if (addr < PT_AR_LC + 8) {
946 /* preserved state: */
947 struct unw_frame_info info;
948 char nat = 0;
949 int ret;
950
951 unw_init_from_blocked_task(&info, child);
952 if (unw_unwind_to_user(&info) < 0)
953 return -1;
954
955 switch (addr) {
956 case PT_NAT_BITS:
957 return access_nat_bits(child, pt, &info,
958 data, write_access);
959
960 case PT_R4: case PT_R5: case PT_R6: case PT_R7:
961 if (write_access) {
962 /* read NaT bit first: */
963 unsigned long dummy;
964
965 ret = unw_get_gr(&info, (addr - PT_R4)/8 + 4,
966 &dummy, &nat);
967 if (ret < 0)
968 return ret;
969 }
970 return unw_access_gr(&info, (addr - PT_R4)/8 + 4, data,
971 &nat, write_access);
972
973 case PT_B1: case PT_B2: case PT_B3:
974 case PT_B4: case PT_B5:
975 return unw_access_br(&info, (addr - PT_B1)/8 + 1, data,
976 write_access);
977
978 case PT_AR_EC:
979 return unw_access_ar(&info, UNW_AR_EC, data,
980 write_access);
981
982 case PT_AR_LC:
983 return unw_access_ar(&info, UNW_AR_LC, data,
984 write_access);
985
986 default:
987 if (addr >= PT_F2 && addr < PT_F5 + 16)
988 return access_fr(&info, (addr - PT_F2)/16 + 2,
989 (addr & 8) != 0, data,
990 write_access);
991 else if (addr >= PT_F16 && addr < PT_F31 + 16)
992 return access_fr(&info,
993 (addr - PT_F16)/16 + 16,
994 (addr & 8) != 0,
995 data, write_access);
996 else {
997 dprintk("ptrace: rejecting access to register "
998 "address 0x%lx\n", addr);
999 return -1;
1000 }
1001 }
1002 } else if (addr < PT_F9+16) {
1003 /* scratch state */
1004 switch (addr) {
1005 case PT_AR_BSP:
1006 /*
1007 * By convention, we use PT_AR_BSP to refer to
1008 * the end of the user-level backing store.
1009 * Use ia64_rse_skip_regs(PT_AR_BSP, -CFM.sof)
1010 * to get the real value of ar.bsp at the time
1011 * the kernel was entered.
1012 *
1013 * Furthermore, when changing the contents of
1014 * PT_AR_BSP (or PT_CFM) we MUST copy any
1015 * users-level stacked registers that are
1016 * stored on the kernel stack back to
1017 * user-space because otherwise, we might end
1018 * up clobbering kernel stacked registers.
1019 * Also, if this happens while the task is
1020 * blocked in a system call, which convert the
1021 * state such that the non-system-call exit
1022 * path is used. This ensures that the proper
1023 * state will be picked up when resuming
1024 * execution. However, it *also* means that
1025 * once we write PT_AR_BSP/PT_CFM, it won't be
1026 * possible to modify the syscall arguments of
1027 * the pending system call any longer. This
1028 * shouldn't be an issue because modifying
1029 * PT_AR_BSP/PT_CFM generally implies that
1030 * we're either abandoning the pending system
1031 * call or that we defer it's re-execution
1032 * (e.g., due to GDB doing an inferior
1033 * function call).
1034 */
1035 urbs_end = ia64_get_user_rbs_end(child, pt, &cfm);
1036 if (write_access) {
1037 if (*data != urbs_end) {
1038 if (ia64_sync_user_rbs(child, sw,
1039 pt->ar_bspstore,
1040 urbs_end) < 0)
1041 return -1;
1042 if (in_syscall(pt))
1043 convert_to_non_syscall(child,
1044 pt,
1045 cfm);
1046 /*
1047 * Simulate user-level write
1048 * of ar.bsp:
1049 */
1050 pt->loadrs = 0;
1051 pt->ar_bspstore = *data;
1052 }
1053 } else
1054 *data = urbs_end;
1055 return 0;
1056
1057 case PT_CFM:
1058 urbs_end = ia64_get_user_rbs_end(child, pt, &cfm);
1059 if (write_access) {
1060 if (((cfm ^ *data) & PFM_MASK) != 0) {
1061 if (ia64_sync_user_rbs(child, sw,
1062 pt->ar_bspstore,
1063 urbs_end) < 0)
1064 return -1;
1065 if (in_syscall(pt))
1066 convert_to_non_syscall(child,
1067 pt,
1068 cfm);
1069 pt->cr_ifs = ((pt->cr_ifs & ~PFM_MASK)
1070 | (*data & PFM_MASK));
1071 }
1072 } else
1073 *data = cfm;
1074 return 0;
1075
1076 case PT_CR_IPSR:
1077 if (write_access) {
1078 unsigned long tmp = *data;
1079 /* psr.ri==3 is a reserved value: SDM 2:25 */
1080 if ((tmp & IA64_PSR_RI) == IA64_PSR_RI)
1081 tmp &= ~IA64_PSR_RI;
1082 pt->cr_ipsr = ((tmp & IPSR_MASK)
1083 | (pt->cr_ipsr & ~IPSR_MASK));
1084 } else
1085 *data = (pt->cr_ipsr & IPSR_MASK);
1086 return 0;
1087
1088 case PT_AR_RSC:
1089 if (write_access)
1090 pt->ar_rsc = *data | (3 << 2); /* force PL3 */
1091 else
1092 *data = pt->ar_rsc;
1093 return 0;
1094
1095 case PT_AR_RNAT:
1096 urbs_end = ia64_get_user_rbs_end(child, pt, NULL);
1097 rnat_addr = (long) ia64_rse_rnat_addr((long *)
1098 urbs_end);
1099 if (write_access)
1100 return ia64_poke(child, sw, urbs_end,
1101 rnat_addr, *data);
1102 else
1103 return ia64_peek(child, sw, urbs_end,
1104 rnat_addr, data);
1105
1106 case PT_R1:
1107 ptr = pt_reg_addr(pt, r1);
1108 break;
1109 case PT_R2: case PT_R3:
1110 ptr = pt_reg_addr(pt, r2) + (addr - PT_R2);
1111 break;
1112 case PT_R8: case PT_R9: case PT_R10: case PT_R11:
1113 ptr = pt_reg_addr(pt, r8) + (addr - PT_R8);
1114 break;
1115 case PT_R12: case PT_R13:
1116 ptr = pt_reg_addr(pt, r12) + (addr - PT_R12);
1117 break;
1118 case PT_R14:
1119 ptr = pt_reg_addr(pt, r14);
1120 break;
1121 case PT_R15:
1122 ptr = pt_reg_addr(pt, r15);
1123 break;
1124 case PT_R16: case PT_R17: case PT_R18: case PT_R19:
1125 case PT_R20: case PT_R21: case PT_R22: case PT_R23:
1126 case PT_R24: case PT_R25: case PT_R26: case PT_R27:
1127 case PT_R28: case PT_R29: case PT_R30: case PT_R31:
1128 ptr = pt_reg_addr(pt, r16) + (addr - PT_R16);
1129 break;
1130 case PT_B0:
1131 ptr = pt_reg_addr(pt, b0);
1132 break;
1133 case PT_B6:
1134 ptr = pt_reg_addr(pt, b6);
1135 break;
1136 case PT_B7:
1137 ptr = pt_reg_addr(pt, b7);
1138 break;
1139 case PT_F6: case PT_F6+8: case PT_F7: case PT_F7+8:
1140 case PT_F8: case PT_F8+8: case PT_F9: case PT_F9+8:
1141 ptr = pt_reg_addr(pt, f6) + (addr - PT_F6);
1142 break;
1143 case PT_AR_BSPSTORE:
1144 ptr = pt_reg_addr(pt, ar_bspstore);
1145 break;
1146 case PT_AR_UNAT:
1147 ptr = pt_reg_addr(pt, ar_unat);
1148 break;
1149 case PT_AR_PFS:
1150 ptr = pt_reg_addr(pt, ar_pfs);
1151 break;
1152 case PT_AR_CCV:
1153 ptr = pt_reg_addr(pt, ar_ccv);
1154 break;
1155 case PT_AR_FPSR:
1156 ptr = pt_reg_addr(pt, ar_fpsr);
1157 break;
1158 case PT_CR_IIP:
1159 ptr = pt_reg_addr(pt, cr_iip);
1160 break;
1161 case PT_PR:
1162 ptr = pt_reg_addr(pt, pr);
1163 break;
1164 /* scratch register */
1165
1166 default:
1167 /* disallow accessing anything else... */
1168 dprintk("ptrace: rejecting access to register "
1169 "address 0x%lx\n", addr);
1170 return -1;
1171 }
1172 } else if (addr <= PT_AR_SSD) {
1173 ptr = pt_reg_addr(pt, ar_csd) + (addr - PT_AR_CSD);
1174 } else {
1175 /* access debug registers */
1176
1177 if (addr >= PT_IBR) {
1178 regnum = (addr - PT_IBR) >> 3;
1179 ptr = &child->thread.ibr[0];
1180 } else {
1181 regnum = (addr - PT_DBR) >> 3;
1182 ptr = &child->thread.dbr[0];
1183 }
1184
1185 if (regnum >= 8) {
1186 dprintk("ptrace: rejecting access to register "
1187 "address 0x%lx\n", addr);
1188 return -1;
1189 }
1190 #ifdef CONFIG_PERFMON
1191 /*
1192 * Check if debug registers are used by perfmon. This
1193 * test must be done once we know that we can do the
1194 * operation, i.e. the arguments are all valid, but
1195 * before we start modifying the state.
1196 *
1197 * Perfmon needs to keep a count of how many processes
1198 * are trying to modify the debug registers for system
1199 * wide monitoring sessions.
1200 *
1201 * We also include read access here, because they may
1202 * cause the PMU-installed debug register state
1203 * (dbr[], ibr[]) to be reset. The two arrays are also
1204 * used by perfmon, but we do not use
1205 * IA64_THREAD_DBG_VALID. The registers are restored
1206 * by the PMU context switch code.
1207 */
1208 if (pfm_use_debug_registers(child)) return -1;
1209 #endif
1210
1211 if (!(child->thread.flags & IA64_THREAD_DBG_VALID)) {
1212 child->thread.flags |= IA64_THREAD_DBG_VALID;
1213 memset(child->thread.dbr, 0,
1214 sizeof(child->thread.dbr));
1215 memset(child->thread.ibr, 0,
1216 sizeof(child->thread.ibr));
1217 }
1218
1219 ptr += regnum;
1220
1221 if ((regnum & 1) && write_access) {
1222 /* don't let the user set kernel-level breakpoints: */
1223 *ptr = *data & ~(7UL << 56);
1224 return 0;
1225 }
1226 }
1227 if (write_access)
1228 *ptr = *data;
1229 else
1230 *data = *ptr;
1231 return 0;
1232 }
1233
1234 static long
1235 ptrace_getregs (struct task_struct *child, struct pt_all_user_regs __user *ppr)
1236 {
1237 unsigned long psr, ec, lc, rnat, bsp, cfm, nat_bits, val;
1238 struct unw_frame_info info;
1239 struct ia64_fpreg fpval;
1240 struct switch_stack *sw;
1241 struct pt_regs *pt;
1242 long ret, retval = 0;
1243 char nat = 0;
1244 int i;
1245
1246 if (!access_ok(VERIFY_WRITE, ppr, sizeof(struct pt_all_user_regs)))
1247 return -EIO;
1248
1249 pt = task_pt_regs(child);
1250 sw = (struct switch_stack *) (child->thread.ksp + 16);
1251 unw_init_from_blocked_task(&info, child);
1252 if (unw_unwind_to_user(&info) < 0) {
1253 return -EIO;
1254 }
1255
1256 if (((unsigned long) ppr & 0x7) != 0) {
1257 dprintk("ptrace:unaligned register address %p\n", ppr);
1258 return -EIO;
1259 }
1260
1261 if (access_uarea(child, PT_CR_IPSR, &psr, 0) < 0
1262 || access_uarea(child, PT_AR_EC, &ec, 0) < 0
1263 || access_uarea(child, PT_AR_LC, &lc, 0) < 0
1264 || access_uarea(child, PT_AR_RNAT, &rnat, 0) < 0
1265 || access_uarea(child, PT_AR_BSP, &bsp, 0) < 0
1266 || access_uarea(child, PT_CFM, &cfm, 0)
1267 || access_uarea(child, PT_NAT_BITS, &nat_bits, 0))
1268 return -EIO;
1269
1270 /* control regs */
1271
1272 retval |= __put_user(pt->cr_iip, &ppr->cr_iip);
1273 retval |= __put_user(psr, &ppr->cr_ipsr);
1274
1275 /* app regs */
1276
1277 retval |= __put_user(pt->ar_pfs, &ppr->ar[PT_AUR_PFS]);
1278 retval |= __put_user(pt->ar_rsc, &ppr->ar[PT_AUR_RSC]);
1279 retval |= __put_user(pt->ar_bspstore, &ppr->ar[PT_AUR_BSPSTORE]);
1280 retval |= __put_user(pt->ar_unat, &ppr->ar[PT_AUR_UNAT]);
1281 retval |= __put_user(pt->ar_ccv, &ppr->ar[PT_AUR_CCV]);
1282 retval |= __put_user(pt->ar_fpsr, &ppr->ar[PT_AUR_FPSR]);
1283
1284 retval |= __put_user(ec, &ppr->ar[PT_AUR_EC]);
1285 retval |= __put_user(lc, &ppr->ar[PT_AUR_LC]);
1286 retval |= __put_user(rnat, &ppr->ar[PT_AUR_RNAT]);
1287 retval |= __put_user(bsp, &ppr->ar[PT_AUR_BSP]);
1288 retval |= __put_user(cfm, &ppr->cfm);
1289
1290 /* gr1-gr3 */
1291
1292 retval |= __copy_to_user(&ppr->gr[1], &pt->r1, sizeof(long));
1293 retval |= __copy_to_user(&ppr->gr[2], &pt->r2, sizeof(long) *2);
1294
1295 /* gr4-gr7 */
1296
1297 for (i = 4; i < 8; i++) {
1298 if (unw_access_gr(&info, i, &val, &nat, 0) < 0)
1299 return -EIO;
1300 retval |= __put_user(val, &ppr->gr[i]);
1301 }
1302
1303 /* gr8-gr11 */
1304
1305 retval |= __copy_to_user(&ppr->gr[8], &pt->r8, sizeof(long) * 4);
1306
1307 /* gr12-gr15 */
1308
1309 retval |= __copy_to_user(&ppr->gr[12], &pt->r12, sizeof(long) * 2);
1310 retval |= __copy_to_user(&ppr->gr[14], &pt->r14, sizeof(long));
1311 retval |= __copy_to_user(&ppr->gr[15], &pt->r15, sizeof(long));
1312
1313 /* gr16-gr31 */
1314
1315 retval |= __copy_to_user(&ppr->gr[16], &pt->r16, sizeof(long) * 16);
1316
1317 /* b0 */
1318
1319 retval |= __put_user(pt->b0, &ppr->br[0]);
1320
1321 /* b1-b5 */
1322
1323 for (i = 1; i < 6; i++) {
1324 if (unw_access_br(&info, i, &val, 0) < 0)
1325 return -EIO;
1326 __put_user(val, &ppr->br[i]);
1327 }
1328
1329 /* b6-b7 */
1330
1331 retval |= __put_user(pt->b6, &ppr->br[6]);
1332 retval |= __put_user(pt->b7, &ppr->br[7]);
1333
1334 /* fr2-fr5 */
1335
1336 for (i = 2; i < 6; i++) {
1337 if (unw_get_fr(&info, i, &fpval) < 0)
1338 return -EIO;
1339 retval |= __copy_to_user(&ppr->fr[i], &fpval, sizeof (fpval));
1340 }
1341
1342 /* fr6-fr11 */
1343
1344 retval |= __copy_to_user(&ppr->fr[6], &pt->f6,
1345 sizeof(struct ia64_fpreg) * 6);
1346
1347 /* fp scratch regs(12-15) */
1348
1349 retval |= __copy_to_user(&ppr->fr[12], &sw->f12,
1350 sizeof(struct ia64_fpreg) * 4);
1351
1352 /* fr16-fr31 */
1353
1354 for (i = 16; i < 32; i++) {
1355 if (unw_get_fr(&info, i, &fpval) < 0)
1356 return -EIO;
1357 retval |= __copy_to_user(&ppr->fr[i], &fpval, sizeof (fpval));
1358 }
1359
1360 /* fph */
1361
1362 ia64_flush_fph(child);
1363 retval |= __copy_to_user(&ppr->fr[32], &child->thread.fph,
1364 sizeof(ppr->fr[32]) * 96);
1365
1366 /* preds */
1367
1368 retval |= __put_user(pt->pr, &ppr->pr);
1369
1370 /* nat bits */
1371
1372 retval |= __put_user(nat_bits, &ppr->nat);
1373
1374 ret = retval ? -EIO : 0;
1375 return ret;
1376 }
1377
1378 static long
1379 ptrace_setregs (struct task_struct *child, struct pt_all_user_regs __user *ppr)
1380 {
1381 unsigned long psr, rsc, ec, lc, rnat, bsp, cfm, nat_bits, val = 0;
1382 struct unw_frame_info info;
1383 struct switch_stack *sw;
1384 struct ia64_fpreg fpval;
1385 struct pt_regs *pt;
1386 long ret, retval = 0;
1387 int i;
1388
1389 memset(&fpval, 0, sizeof(fpval));
1390
1391 if (!access_ok(VERIFY_READ, ppr, sizeof(struct pt_all_user_regs)))
1392 return -EIO;
1393
1394 pt = task_pt_regs(child);
1395 sw = (struct switch_stack *) (child->thread.ksp + 16);
1396 unw_init_from_blocked_task(&info, child);
1397 if (unw_unwind_to_user(&info) < 0) {
1398 return -EIO;
1399 }
1400
1401 if (((unsigned long) ppr & 0x7) != 0) {
1402 dprintk("ptrace:unaligned register address %p\n", ppr);
1403 return -EIO;
1404 }
1405
1406 /* control regs */
1407
1408 retval |= __get_user(pt->cr_iip, &ppr->cr_iip);
1409 retval |= __get_user(psr, &ppr->cr_ipsr);
1410
1411 /* app regs */
1412
1413 retval |= __get_user(pt->ar_pfs, &ppr->ar[PT_AUR_PFS]);
1414 retval |= __get_user(rsc, &ppr->ar[PT_AUR_RSC]);
1415 retval |= __get_user(pt->ar_bspstore, &ppr->ar[PT_AUR_BSPSTORE]);
1416 retval |= __get_user(pt->ar_unat, &ppr->ar[PT_AUR_UNAT]);
1417 retval |= __get_user(pt->ar_ccv, &ppr->ar[PT_AUR_CCV]);
1418 retval |= __get_user(pt->ar_fpsr, &ppr->ar[PT_AUR_FPSR]);
1419
1420 retval |= __get_user(ec, &ppr->ar[PT_AUR_EC]);
1421 retval |= __get_user(lc, &ppr->ar[PT_AUR_LC]);
1422 retval |= __get_user(rnat, &ppr->ar[PT_AUR_RNAT]);
1423 retval |= __get_user(bsp, &ppr->ar[PT_AUR_BSP]);
1424 retval |= __get_user(cfm, &ppr->cfm);
1425
1426 /* gr1-gr3 */
1427
1428 retval |= __copy_from_user(&pt->r1, &ppr->gr[1], sizeof(long));
1429 retval |= __copy_from_user(&pt->r2, &ppr->gr[2], sizeof(long) * 2);
1430
1431 /* gr4-gr7 */
1432
1433 for (i = 4; i < 8; i++) {
1434 retval |= __get_user(val, &ppr->gr[i]);
1435 /* NaT bit will be set via PT_NAT_BITS: */
1436 if (unw_set_gr(&info, i, val, 0) < 0)
1437 return -EIO;
1438 }
1439
1440 /* gr8-gr11 */
1441
1442 retval |= __copy_from_user(&pt->r8, &ppr->gr[8], sizeof(long) * 4);
1443
1444 /* gr12-gr15 */
1445
1446 retval |= __copy_from_user(&pt->r12, &ppr->gr[12], sizeof(long) * 2);
1447 retval |= __copy_from_user(&pt->r14, &ppr->gr[14], sizeof(long));
1448 retval |= __copy_from_user(&pt->r15, &ppr->gr[15], sizeof(long));
1449
1450 /* gr16-gr31 */
1451
1452 retval |= __copy_from_user(&pt->r16, &ppr->gr[16], sizeof(long) * 16);
1453
1454 /* b0 */
1455
1456 retval |= __get_user(pt->b0, &ppr->br[0]);
1457
1458 /* b1-b5 */
1459
1460 for (i = 1; i < 6; i++) {
1461 retval |= __get_user(val, &ppr->br[i]);
1462 unw_set_br(&info, i, val);
1463 }
1464
1465 /* b6-b7 */
1466
1467 retval |= __get_user(pt->b6, &ppr->br[6]);
1468 retval |= __get_user(pt->b7, &ppr->br[7]);
1469
1470 /* fr2-fr5 */
1471
1472 for (i = 2; i < 6; i++) {
1473 retval |= __copy_from_user(&fpval, &ppr->fr[i], sizeof(fpval));
1474 if (unw_set_fr(&info, i, fpval) < 0)
1475 return -EIO;
1476 }
1477
1478 /* fr6-fr11 */
1479
1480 retval |= __copy_from_user(&pt->f6, &ppr->fr[6],
1481 sizeof(ppr->fr[6]) * 6);
1482
1483 /* fp scratch regs(12-15) */
1484
1485 retval |= __copy_from_user(&sw->f12, &ppr->fr[12],
1486 sizeof(ppr->fr[12]) * 4);
1487
1488 /* fr16-fr31 */
1489
1490 for (i = 16; i < 32; i++) {
1491 retval |= __copy_from_user(&fpval, &ppr->fr[i],
1492 sizeof(fpval));
1493 if (unw_set_fr(&info, i, fpval) < 0)
1494 return -EIO;
1495 }
1496
1497 /* fph */
1498
1499 ia64_sync_fph(child);
1500 retval |= __copy_from_user(&child->thread.fph, &ppr->fr[32],
1501 sizeof(ppr->fr[32]) * 96);
1502
1503 /* preds */
1504
1505 retval |= __get_user(pt->pr, &ppr->pr);
1506
1507 /* nat bits */
1508
1509 retval |= __get_user(nat_bits, &ppr->nat);
1510
1511 retval |= access_uarea(child, PT_CR_IPSR, &psr, 1);
1512 retval |= access_uarea(child, PT_AR_RSC, &rsc, 1);
1513 retval |= access_uarea(child, PT_AR_EC, &ec, 1);
1514 retval |= access_uarea(child, PT_AR_LC, &lc, 1);
1515 retval |= access_uarea(child, PT_AR_RNAT, &rnat, 1);
1516 retval |= access_uarea(child, PT_AR_BSP, &bsp, 1);
1517 retval |= access_uarea(child, PT_CFM, &cfm, 1);
1518 retval |= access_uarea(child, PT_NAT_BITS, &nat_bits, 1);
1519
1520 ret = retval ? -EIO : 0;
1521 return ret;
1522 }
1523
1524 /*
1525 * Called by kernel/ptrace.c when detaching..
1526 *
1527 * Make sure the single step bit is not set.
1528 */
1529 void
1530 ptrace_disable (struct task_struct *child)
1531 {
1532 struct ia64_psr *child_psr = ia64_psr(task_pt_regs(child));
1533
1534 /* make sure the single step/taken-branch trap bits are not set: */
1535 clear_tsk_thread_flag(child, TIF_SINGLESTEP);
1536 child_psr->ss = 0;
1537 child_psr->tb = 0;
1538 }
1539
1540 asmlinkage long
1541 sys_ptrace (long request, pid_t pid, unsigned long addr, unsigned long data)
1542 {
1543 struct pt_regs *pt;
1544 unsigned long urbs_end, peek_or_poke;
1545 struct task_struct *child;
1546 struct switch_stack *sw;
1547 long ret;
1548 struct unw_frame_info info;
1549
1550 lock_kernel();
1551 ret = -EPERM;
1552 if (request == PTRACE_TRACEME) {
1553 ret = ptrace_traceme();
1554 goto out;
1555 }
1556
1557 peek_or_poke = (request == PTRACE_PEEKTEXT
1558 || request == PTRACE_PEEKDATA
1559 || request == PTRACE_POKETEXT
1560 || request == PTRACE_POKEDATA);
1561 ret = -ESRCH;
1562 read_lock(&tasklist_lock);
1563 {
1564 child = find_task_by_pid(pid);
1565 if (child) {
1566 if (peek_or_poke)
1567 child = find_thread_for_addr(child, addr);
1568 get_task_struct(child);
1569 }
1570 }
1571 read_unlock(&tasklist_lock);
1572 if (!child)
1573 goto out;
1574 ret = -EPERM;
1575 if (pid == 1) /* no messing around with init! */
1576 goto out_tsk;
1577
1578 if (request == PTRACE_ATTACH) {
1579 ret = ptrace_attach(child);
1580 if (!ret)
1581 arch_ptrace_attach(child);
1582 goto out_tsk;
1583 }
1584
1585 ret = ptrace_check_attach(child, request == PTRACE_KILL);
1586 if (ret < 0)
1587 goto out_tsk;
1588
1589 pt = task_pt_regs(child);
1590 sw = (struct switch_stack *) (child->thread.ksp + 16);
1591
1592 switch (request) {
1593 case PTRACE_PEEKTEXT:
1594 case PTRACE_PEEKDATA:
1595 /* read word at location addr */
1596 urbs_end = ia64_get_user_rbs_end(child, pt, NULL);
1597 ret = ia64_peek(child, sw, urbs_end, addr, &data);
1598 if (ret == 0) {
1599 ret = data;
1600 /* ensure "ret" is not mistaken as an error code: */
1601 force_successful_syscall_return();
1602 }
1603 goto out_tsk;
1604
1605 case PTRACE_POKETEXT:
1606 case PTRACE_POKEDATA:
1607 /* write the word at location addr */
1608 urbs_end = ia64_get_user_rbs_end(child, pt, NULL);
1609 ret = ia64_poke(child, sw, urbs_end, addr, data);
1610
1611 /* Make sure user RBS has the latest data */
1612 unw_init_from_blocked_task(&info, child);
1613 do_sync_rbs(&info, ia64_sync_user_rbs);
1614
1615 goto out_tsk;
1616
1617 case PTRACE_PEEKUSR:
1618 /* read the word at addr in the USER area */
1619 if (access_uarea(child, addr, &data, 0) < 0) {
1620 ret = -EIO;
1621 goto out_tsk;
1622 }
1623 ret = data;
1624 /* ensure "ret" is not mistaken as an error code */
1625 force_successful_syscall_return();
1626 goto out_tsk;
1627
1628 case PTRACE_POKEUSR:
1629 /* write the word at addr in the USER area */
1630 if (access_uarea(child, addr, &data, 1) < 0) {
1631 ret = -EIO;
1632 goto out_tsk;
1633 }
1634 ret = 0;
1635 goto out_tsk;
1636
1637 case PTRACE_OLD_GETSIGINFO:
1638 /* for backwards-compatibility */
1639 ret = ptrace_request(child, PTRACE_GETSIGINFO, addr, data);
1640 goto out_tsk;
1641
1642 case PTRACE_OLD_SETSIGINFO:
1643 /* for backwards-compatibility */
1644 ret = ptrace_request(child, PTRACE_SETSIGINFO, addr, data);
1645 goto out_tsk;
1646
1647 case PTRACE_SYSCALL:
1648 /* continue and stop at next (return from) syscall */
1649 case PTRACE_CONT:
1650 /* restart after signal. */
1651 ret = -EIO;
1652 if (!valid_signal(data))
1653 goto out_tsk;
1654 if (request == PTRACE_SYSCALL)
1655 set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
1656 else
1657 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
1658 child->exit_code = data;
1659
1660 /*
1661 * Make sure the single step/taken-branch trap bits
1662 * are not set:
1663 */
1664 clear_tsk_thread_flag(child, TIF_SINGLESTEP);
1665 ia64_psr(pt)->ss = 0;
1666 ia64_psr(pt)->tb = 0;
1667
1668 wake_up_process(child);
1669 ret = 0;
1670 goto out_tsk;
1671
1672 case PTRACE_KILL:
1673 /*
1674 * Make the child exit. Best I can do is send it a
1675 * sigkill. Perhaps it should be put in the status
1676 * that it wants to exit.
1677 */
1678 if (child->exit_state == EXIT_ZOMBIE)
1679 /* already dead */
1680 goto out_tsk;
1681 child->exit_code = SIGKILL;
1682
1683 ptrace_disable(child);
1684 wake_up_process(child);
1685 ret = 0;
1686 goto out_tsk;
1687
1688 case PTRACE_SINGLESTEP:
1689 /* let child execute for one instruction */
1690 case PTRACE_SINGLEBLOCK:
1691 ret = -EIO;
1692 if (!valid_signal(data))
1693 goto out_tsk;
1694
1695 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
1696 set_tsk_thread_flag(child, TIF_SINGLESTEP);
1697 if (request == PTRACE_SINGLESTEP) {
1698 ia64_psr(pt)->ss = 1;
1699 } else {
1700 ia64_psr(pt)->tb = 1;
1701 }
1702 child->exit_code = data;
1703
1704 /* give it a chance to run. */
1705 wake_up_process(child);
1706 ret = 0;
1707 goto out_tsk;
1708
1709 case PTRACE_DETACH:
1710 /* detach a process that was attached. */
1711 ret = ptrace_detach(child, data);
1712 goto out_tsk;
1713
1714 case PTRACE_GETREGS:
1715 ret = ptrace_getregs(child,
1716 (struct pt_all_user_regs __user *) data);
1717 goto out_tsk;
1718
1719 case PTRACE_SETREGS:
1720 ret = ptrace_setregs(child,
1721 (struct pt_all_user_regs __user *) data);
1722 goto out_tsk;
1723
1724 default:
1725 ret = ptrace_request(child, request, addr, data);
1726 goto out_tsk;
1727 }
1728 out_tsk:
1729 put_task_struct(child);
1730 out:
1731 unlock_kernel();
1732 return ret;
1733 }
1734
1735
1736 static void
1737 syscall_trace (void)
1738 {
1739 /*
1740 * The 0x80 provides a way for the tracing parent to
1741 * distinguish between a syscall stop and SIGTRAP delivery.
1742 */
1743 ptrace_notify(SIGTRAP
1744 | ((current->ptrace & PT_TRACESYSGOOD) ? 0x80 : 0));
1745
1746 /*
1747 * This isn't the same as continuing with a signal, but it
1748 * will do for normal use. strace only continues with a
1749 * signal if the stopping signal is not SIGTRAP. -brl
1750 */
1751 if (current->exit_code) {
1752 send_sig(current->exit_code, current, 1);
1753 current->exit_code = 0;
1754 }
1755 }
1756
1757 /* "asmlinkage" so the input arguments are preserved... */
1758
1759 asmlinkage void
1760 syscall_trace_enter (long arg0, long arg1, long arg2, long arg3,
1761 long arg4, long arg5, long arg6, long arg7,
1762 struct pt_regs regs)
1763 {
1764 if (test_thread_flag(TIF_SYSCALL_TRACE)
1765 && (current->ptrace & PT_PTRACED))
1766 syscall_trace();
1767
1768 /* copy user rbs to kernel rbs */
1769 if (test_thread_flag(TIF_RESTORE_RSE))
1770 ia64_sync_krbs();
1771
1772 if (unlikely(current->audit_context)) {
1773 long syscall;
1774 int arch;
1775
1776 if (IS_IA32_PROCESS(&regs)) {
1777 syscall = regs.r1;
1778 arch = AUDIT_ARCH_I386;
1779 } else {
1780 syscall = regs.r15;
1781 arch = AUDIT_ARCH_IA64;
1782 }
1783
1784 audit_syscall_entry(arch, syscall, arg0, arg1, arg2, arg3);
1785 }
1786
1787 }
1788
1789 /* "asmlinkage" so the input arguments are preserved... */
1790
1791 asmlinkage void
1792 syscall_trace_leave (long arg0, long arg1, long arg2, long arg3,
1793 long arg4, long arg5, long arg6, long arg7,
1794 struct pt_regs regs)
1795 {
1796 if (unlikely(current->audit_context)) {
1797 int success = AUDITSC_RESULT(regs.r10);
1798 long result = regs.r8;
1799
1800 if (success != AUDITSC_SUCCESS)
1801 result = -result;
1802 audit_syscall_exit(success, result);
1803 }
1804
1805 if ((test_thread_flag(TIF_SYSCALL_TRACE)
1806 || test_thread_flag(TIF_SINGLESTEP))
1807 && (current->ptrace & PT_PTRACED))
1808 syscall_trace();
1809
1810 /* copy user rbs to kernel rbs */
1811 if (test_thread_flag(TIF_RESTORE_RSE))
1812 ia64_sync_krbs();
1813 }
linux-next