2 * Copyright (C) 1999, 2000, 2004 MIPS Technologies, Inc.
4 * Authors: Carsten Langgaard <carstenl@mips.com>
5 * Maciej W. Rozycki <macro@mips.com>
7 * This program is free software; you can distribute it and/or modify it
8 * under the terms of the GNU General Public License (Version 2) as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
20 * MIPS boards specific PCI support.
22 #include <linux/types.h>
23 #include <linux/pci.h>
24 #include <linux/kernel.h>
25 #include <linux/init.h>
27 #include <asm/mips-boards/bonito64.h>
29 #define PCI_ACCESS_READ 0
30 #define PCI_ACCESS_WRITE 1
32 #ifdef CONFIG_LEMOTE_FULONG
33 #define CFG_SPACE_REG(offset) (void *)CKSEG1ADDR(BONITO_PCICFG_BASE | (offset))
34 #define ID_SEL_BEGIN 11
36 #define CFG_SPACE_REG(offset) (void *)CKSEG1ADDR(_pcictrl_bonito_pcicfg + (offset))
37 #define ID_SEL_BEGIN 10
39 #define MAX_DEV_NUM (31 - ID_SEL_BEGIN)
42 static int bonito64_pcibios_config_access(unsigned char access_type
,
44 unsigned int devfn
, int where
,
47 u32 busnum
= bus
->number
;
51 int device
= PCI_SLOT(devfn
);
52 int function
= PCI_FUNC(devfn
);
56 /* Type 0 configuration for onboard PCI bus */
57 if (device
> MAX_DEV_NUM
)
60 addr
= (1 << (device
+ ID_SEL_BEGIN
)) | (function
<< 8) | reg
;
63 /* Type 1 configuration for offboard PCI bus */
64 addr
= (busnum
<< 16) | (device
<< 11) | (function
<< 8) | reg
;
69 BONITO_PCICMD
|= BONITO_PCICMD_MABORT_CLR
| BONITO_PCICMD_MTABORT_CLR
;
71 BONITO_PCIMAP_CFG
= (addr
>> 16) | type
;
73 /* Flush Bonito register block */
74 dummy
= BONITO_PCIMAP_CFG
;
77 addrp
= CFG_SPACE_REG(addr
& 0xffff);
78 if (access_type
== PCI_ACCESS_WRITE
) {
79 writel(cpu_to_le32(*data
), addrp
);
80 #ifndef CONFIG_LEMOTE_FULONG
82 while (BONITO_PCIMSTAT
& 0xF);
85 *data
= le32_to_cpu(readl(addrp
));
88 /* Detect Master/Target abort */
89 if (BONITO_PCICMD
& (BONITO_PCICMD_MABORT_CLR
|
90 BONITO_PCICMD_MTABORT_CLR
)) {
94 BONITO_PCICMD
|= (BONITO_PCICMD_MABORT_CLR
|
95 BONITO_PCICMD_MTABORT_CLR
);
106 * We can't address 8 and 16 bit words directly. Instead we have to
107 * read/write a 32bit word and mask/modify the data we actually want.
109 static int bonito64_pcibios_read(struct pci_bus
*bus
, unsigned int devfn
,
110 int where
, int size
, u32
* val
)
114 if ((size
== 2) && (where
& 1))
115 return PCIBIOS_BAD_REGISTER_NUMBER
;
116 else if ((size
== 4) && (where
& 3))
117 return PCIBIOS_BAD_REGISTER_NUMBER
;
119 if (bonito64_pcibios_config_access(PCI_ACCESS_READ
, bus
, devfn
, where
,
124 *val
= (data
>> ((where
& 3) << 3)) & 0xff;
126 *val
= (data
>> ((where
& 3) << 3)) & 0xffff;
130 return PCIBIOS_SUCCESSFUL
;
133 static int bonito64_pcibios_write(struct pci_bus
*bus
, unsigned int devfn
,
134 int where
, int size
, u32 val
)
138 if ((size
== 2) && (where
& 1))
139 return PCIBIOS_BAD_REGISTER_NUMBER
;
140 else if ((size
== 4) && (where
& 3))
141 return PCIBIOS_BAD_REGISTER_NUMBER
;
146 if (bonito64_pcibios_config_access(PCI_ACCESS_READ
, bus
, devfn
,
151 data
= (data
& ~(0xff << ((where
& 3) << 3))) |
152 (val
<< ((where
& 3) << 3));
154 data
= (data
& ~(0xffff << ((where
& 3) << 3))) |
155 (val
<< ((where
& 3) << 3));
158 if (bonito64_pcibios_config_access(PCI_ACCESS_WRITE
, bus
, devfn
, where
,
162 return PCIBIOS_SUCCESSFUL
;
165 struct pci_ops bonito64_pci_ops
= {
166 .read
= bonito64_pcibios_read
,
167 .write
= bonito64_pcibios_write