arch/powerpc/boot/dts/pcm032.dts

   1 /*
   2  * phyCORE-MPC5200B-IO (pcm032) board Device Tree Source
   3  *
   4  * Copyright (C) 2006-2009 Pengutronix
   5  * Sascha Hauer <s.hauer@pengutronix.de>
   6  * Juergen Beisert <j.beisert@pengutronix.de>
   7  * Wolfram Sang <w.sang@pengutronix.de>
   8  *
   9  * This program is free software; you can redistribute  it and/or modify it
  10  * under  the terms of  the GNU General  Public License as published by the
  11  * Free Software Foundation;  either version 2 of the  License, or (at your
  12  * option) any later version.
  13  */
  14
  15 /include/ "mpc5200b.dtsi"
  16
  17 / {
  18         model = "phytec,pcm032";
  19         compatible = "phytec,pcm032";
  20
  21         memory {
  22                 reg = <0x00000000 0x08000000>;  // 128MB
  23         };
  24
  25         soc5200@f0000000 {
  26                 timer@600 {             // General Purpose Timer
  27                         fsl,has-wdt;
  28                 };
  29
  30                 gpt2: timer@620 {       // General Purpose Timer in GPIO mode
  31                         gpio-controller;
  32                         #gpio-cells = <2>;
  33                 };
  34
  35                 gpt3: timer@630 {       // General Purpose Timer in GPIO mode
  36                         gpio-controller;
  37                         #gpio-cells = <2>;
  38                 };
  39
  40                 gpt4: timer@640 {       // General Purpose Timer in GPIO mode
  41                         gpio-controller;
  42                         #gpio-cells = <2>;
  43                 };
  44
  45                 gpt5: timer@650 {       // General Purpose Timer in GPIO mode
  46                         gpio-controller;
  47                         #gpio-cells = <2>;
  48                 };
  49
  50                 gpt6: timer@660 {       // General Purpose Timer in GPIO mode
  51                         compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
  52                         reg = <0x660 0x10>;
  53                         interrupts = <1 15 0>;
  54                         gpio-controller;
  55                         #gpio-cells = <2>;
  56                 };
  57
  58                 gpt7: timer@670 {       // General Purpose Timer in GPIO mode
  59                         gpio-controller;
  60                         #gpio-cells = <2>;
  61                 };
  62
  63                 psc@2000 {      /* PSC1 is ac97 */
  64                         compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97";
  65                         cell-index = <0>;
  66                 };
  67
  68                 /* PSC2 port is used by CAN1/2 */
  69                 psc@2200 {
  70                         status = "disabled";
  71                 };
  72
  73                 psc@2400 { /* PSC3 in UART mode */
  74                         compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
  75                 };
  76
  77                 /* PSC4 is ??? */
  78                 psc@2600 {
  79                         status = "disabled";
  80                 };
  81
  82                 /* PSC5 is ??? */
  83                 psc@2800 {
  84                         status = "disabled";
  85                 };
  86
  87                 psc@2c00 { /* PSC6 in UART mode */
  88                         compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
  89                 };
  90
  91                 ethernet@3000 {
  92                         phy-handle = <&phy0>;
  93                 };
  94
  95                 mdio@3000 {
  96                         phy0: ethernet-phy@0 {
  97                                 reg = <0>;
  98                         };
  99                 };
 100
 101                 i2c@3d40 {
 102                         rtc@51 {
 103                                 compatible = "nxp,pcf8563";
 104                                 reg = <0x51>;
 105                         };
 106                         eeprom@52 {
 107                                 compatible = "catalyst,24c32";
 108                                 reg = <0x52>;
 109                                 pagesize = <32>;
 110                         };
 111                 };
 112         };
 113
 114         pci@f0000d00 {
 115                 interrupt-map-mask = <0xf800 0 0 7>;
 116                 interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
 117                                  0xc000 0 0 2 &mpc5200_pic 1 1 3
 118                                  0xc000 0 0 3 &mpc5200_pic 1 2 3
 119                                  0xc000 0 0 4 &mpc5200_pic 1 3 3
 120
 121                                  0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
 122                                  0xc800 0 0 2 &mpc5200_pic 1 2 3
 123                                  0xc800 0 0 3 &mpc5200_pic 1 3 3
 124                                  0xc800 0 0 4 &mpc5200_pic 0 0 3>;
 125                 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
 126                           0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
 127                           0x01000000 0 0x00000000 0xb0000000 0 0x01000000>;
 128         };
 129
 130         localbus {
 131                 ranges = <0 0 0xfe000000 0x02000000
 132                           1 0 0xfc000000 0x02000000
 133                           2 0 0xfbe00000 0x00200000
 134                           3 0 0xf9e00000 0x02000000
 135                           4 0 0xf7e00000 0x02000000
 136                           5 0 0xe6000000 0x02000000
 137                           6 0 0xe8000000 0x02000000
 138                           7 0 0xea000000 0x02000000>;
 139
 140                 flash@0,0 {
 141                         compatible = "cfi-flash";
 142                         reg = <0 0 0x02000000>;
 143                         bank-width = <4>;
 144                         #size-cells = <1>;
 145                         #address-cells = <1>;
 146
 147                         partition@0 {
 148                                 label = "ubootl";
 149                                 reg = <0x00000000 0x00040000>;
 150                         };
 151                         partition@40000 {
 152                                 label = "kernel";
 153                                 reg = <0x00040000 0x001c0000>;
 154                         };
 155                         partition@200000 {
 156                                 label = "jffs2";
 157                                 reg = <0x00200000 0x01d00000>;
 158                         };
 159                         partition@1f00000 {
 160                                 label = "uboot";
 161                                 reg = <0x01f00000 0x00040000>;
 162                         };
 163                         partition@1f40000 {
 164                                 label = "env";
 165                                 reg = <0x01f40000 0x00040000>;
 166                         };
 167                         partition@1f80000 {
 168                                 label = "oftree";
 169                                 reg = <0x01f80000 0x00040000>;
 170                         };
 171                         partition@1fc0000 {
 172                                 label = "space";
 173                                 reg = <0x01fc0000 0x00040000>;
 174                         };
 175                 };
 176
 177                 sram@2,0 {
 178                         compatible = "mtd-ram";
 179                         reg = <2 0 0x00200000>;
 180                         bank-width = <2>;
 181                 };
 182
 183                 /*
 184                  * example snippets for FPGA
 185                  *
 186                  * fpga@3,0 {
 187                  *       compatible = "fpga_driver";
 188                  *       reg = <3 0 0x02000000>;
 189                  *       bank-width = <4>;
 190                  * };
 191                  *
 192                  * fpga@4,0 {
 193                  *       compatible = "fpga_driver";
 194                  *       reg = <4 0 0x02000000>;
 195                  *       bank-width = <4>;
 196                  * };
 197                  */
 198
 199                 /*
 200                  * example snippets for free chipselects
 201                  *
 202                  * device@5,0 {
 203                  *       compatible = "custom_driver";
 204                  *       reg = <5 0 0x02000000>;
 205                  * };
 206                  *
 207                  * device@6,0 {
 208                  *       compatible = "custom_driver";
 209                  *       reg = <6 0 0x02000000>;
 210                  * };
 211                  *
 212                  * device@7,0 {
 213                  *       compatible = "custom_driver";
 214                  *       reg = <7 0 0x02000000>;
 215                  * };
 216                  */
 217         };
 218 };