2 * Thermal throttle event support code (such as syslog messaging and rate
3 * limiting) that was factored out from x86_64 (mce_intel.c) and i386 (p4.c).
5 * This allows consistent reporting of CPU thermal throttle events.
7 * Maintains a counter in /sys that keeps track of the number of thermal
8 * events, such that the user knows how bad the thermal problem might be
9 * (since the logging to syslog and mcelog is rate limited).
11 * Author: Dmitriy Zavin (dmitriyz@google.com)
13 * Credits: Adapted from Zwane Mwaikambo's original code in mce_intel.c.
14 * Inspired by Ross Biro's and Al Borchers' counter code.
16 #include <linux/interrupt.h>
17 #include <linux/notifier.h>
18 #include <linux/jiffies.h>
19 #include <linux/kernel.h>
20 #include <linux/percpu.h>
21 #include <linux/export.h>
22 #include <linux/sysdev.h>
23 #include <linux/types.h>
24 #include <linux/init.h>
25 #include <linux/smp.h>
26 #include <linux/cpu.h>
27 #include <trace/events/irq_vectors.h>
29 #include <asm/processor.h>
30 #include <asm/system.h>
36 /* How long to wait between reporting thermal events */
37 #define CHECK_INTERVAL (300 * HZ)
39 #define THERMAL_THROTTLING_EVENT 0
40 #define POWER_LIMIT_EVENT 1
43 * Current thermal event state:
45 struct _thermal_state
{
50 unsigned long last_count
;
53 struct thermal_state
{
54 struct _thermal_state core_throttle
;
55 struct _thermal_state core_power_limit
;
56 struct _thermal_state package_throttle
;
57 struct _thermal_state package_power_limit
;
58 struct _thermal_state core_thresh0
;
59 struct _thermal_state core_thresh1
;
62 /* Callback to handle core threshold interrupts */
63 int (*platform_thermal_notify
)(__u64 msr_val
);
64 EXPORT_SYMBOL(platform_thermal_notify
);
66 static DEFINE_PER_CPU(struct thermal_state
, thermal_state
);
68 static atomic_t therm_throt_en
= ATOMIC_INIT(0);
70 static u32 lvtthmr_init __read_mostly
;
73 #define define_therm_throt_sysdev_one_ro(_name) \
74 static SYSDEV_ATTR(_name, 0444, \
75 therm_throt_sysdev_show_##_name, \
78 #define define_therm_throt_sysdev_show_func(event, name) \
80 static ssize_t therm_throt_sysdev_show_##event##_##name( \
81 struct sys_device *dev, \
82 struct sysdev_attribute *attr, \
85 unsigned int cpu = dev->id; \
88 preempt_disable(); /* CPU hotplug */ \
89 if (cpu_online(cpu)) { \
90 ret = sprintf(buf, "%lu\n", \
91 per_cpu(thermal_state, cpu).event.name); \
99 define_therm_throt_sysdev_show_func(core_throttle
, count
);
100 define_therm_throt_sysdev_one_ro(core_throttle_count
);
102 define_therm_throt_sysdev_show_func(core_power_limit
, count
);
103 define_therm_throt_sysdev_one_ro(core_power_limit_count
);
105 define_therm_throt_sysdev_show_func(package_throttle
, count
);
106 define_therm_throt_sysdev_one_ro(package_throttle_count
);
108 define_therm_throt_sysdev_show_func(package_power_limit
, count
);
109 define_therm_throt_sysdev_one_ro(package_power_limit_count
);
111 static struct attribute
*thermal_throttle_attrs
[] = {
112 &attr_core_throttle_count
.attr
,
116 static struct attribute_group thermal_attr_group
= {
117 .attrs
= thermal_throttle_attrs
,
118 .name
= "thermal_throttle"
120 #endif /* CONFIG_SYSFS */
123 #define PACKAGE_LEVEL 1
126 * therm_throt_process - Process thermal throttling event from interrupt
127 * @curr: Whether the condition is current or not (boolean), since the
128 * thermal interrupt normally gets called both when the thermal
129 * event begins and once the event has ended.
131 * This function is called by the thermal interrupt after the
132 * IRQ has been acknowledged.
134 * It will take care of rate limiting and printing messages to the syslog.
136 * Returns: 0 : Event should NOT be further logged, i.e. still in
137 * "timeout" from previous log message.
138 * 1 : Event should be logged further, and a message has been
139 * printed to the syslog.
141 static int therm_throt_process(bool new_event
, int event
, int level
)
143 struct _thermal_state
*state
;
144 unsigned int this_cpu
= smp_processor_id();
147 struct thermal_state
*pstate
= &per_cpu(thermal_state
, this_cpu
);
149 now
= get_jiffies_64();
150 if (level
== CORE_LEVEL
) {
151 if (event
== THERMAL_THROTTLING_EVENT
)
152 state
= &pstate
->core_throttle
;
153 else if (event
== POWER_LIMIT_EVENT
)
154 state
= &pstate
->core_power_limit
;
157 } else if (level
== PACKAGE_LEVEL
) {
158 if (event
== THERMAL_THROTTLING_EVENT
)
159 state
= &pstate
->package_throttle
;
160 else if (event
== POWER_LIMIT_EVENT
)
161 state
= &pstate
->package_power_limit
;
167 old_event
= state
->new_event
;
168 state
->new_event
= new_event
;
173 if (time_before64(now
, state
->next_check
) &&
174 state
->count
!= state
->last_count
)
177 state
->next_check
= now
+ CHECK_INTERVAL
;
178 state
->last_count
= state
->count
;
180 /* if we just entered the thermal event */
182 if (event
== THERMAL_THROTTLING_EVENT
)
183 printk(KERN_CRIT
"CPU%d: %s temperature above threshold, cpu clock throttled (total events = %lu)\n",
185 level
== CORE_LEVEL
? "Core" : "Package",
188 printk(KERN_CRIT
"CPU%d: %s power limit notification (total events = %lu)\n",
190 level
== CORE_LEVEL
? "Core" : "Package",
195 if (event
== THERMAL_THROTTLING_EVENT
)
196 printk(KERN_INFO
"CPU%d: %s temperature/speed normal\n",
198 level
== CORE_LEVEL
? "Core" : "Package");
200 printk(KERN_INFO
"CPU%d: %s power limit normal\n",
202 level
== CORE_LEVEL
? "Core" : "Package");
209 static int thresh_event_valid(int event
)
211 struct _thermal_state
*state
;
212 unsigned int this_cpu
= smp_processor_id();
213 struct thermal_state
*pstate
= &per_cpu(thermal_state
, this_cpu
);
214 u64 now
= get_jiffies_64();
216 state
= (event
== 0) ? &pstate
->core_thresh0
: &pstate
->core_thresh1
;
218 if (time_before64(now
, state
->next_check
))
221 state
->next_check
= now
+ CHECK_INTERVAL
;
226 /* Add/Remove thermal_throttle interface for CPU device: */
227 static __cpuinit
int thermal_throttle_add_dev(struct sys_device
*sys_dev
,
231 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
233 err
= sysfs_create_group(&sys_dev
->kobj
, &thermal_attr_group
);
237 if (cpu_has(c
, X86_FEATURE_PLN
))
238 err
= sysfs_add_file_to_group(&sys_dev
->kobj
,
239 &attr_core_power_limit_count
.attr
,
240 thermal_attr_group
.name
);
241 if (cpu_has(c
, X86_FEATURE_PTS
)) {
242 err
= sysfs_add_file_to_group(&sys_dev
->kobj
,
243 &attr_package_throttle_count
.attr
,
244 thermal_attr_group
.name
);
245 if (cpu_has(c
, X86_FEATURE_PLN
))
246 err
= sysfs_add_file_to_group(&sys_dev
->kobj
,
247 &attr_package_power_limit_count
.attr
,
248 thermal_attr_group
.name
);
254 static __cpuinit
void thermal_throttle_remove_dev(struct sys_device
*sys_dev
)
256 sysfs_remove_group(&sys_dev
->kobj
, &thermal_attr_group
);
259 /* Mutex protecting device creation against CPU hotplug: */
260 static DEFINE_MUTEX(therm_cpu_lock
);
262 /* Get notified when a cpu comes on/off. Be hotplug friendly. */
264 thermal_throttle_cpu_callback(struct notifier_block
*nfb
,
265 unsigned long action
,
268 unsigned int cpu
= (unsigned long)hcpu
;
269 struct sys_device
*sys_dev
;
272 sys_dev
= get_cpu_sysdev(cpu
);
276 case CPU_UP_PREPARE_FROZEN
:
277 mutex_lock(&therm_cpu_lock
);
278 err
= thermal_throttle_add_dev(sys_dev
, cpu
);
279 mutex_unlock(&therm_cpu_lock
);
282 case CPU_UP_CANCELED
:
283 case CPU_UP_CANCELED_FROZEN
:
285 case CPU_DEAD_FROZEN
:
286 mutex_lock(&therm_cpu_lock
);
287 thermal_throttle_remove_dev(sys_dev
);
288 mutex_unlock(&therm_cpu_lock
);
291 return notifier_from_errno(err
);
294 static struct notifier_block thermal_throttle_cpu_notifier __cpuinitdata
=
296 .notifier_call
= thermal_throttle_cpu_callback
,
299 static __init
int thermal_throttle_init_device(void)
301 unsigned int cpu
= 0;
304 if (!atomic_read(&therm_throt_en
))
307 register_hotcpu_notifier(&thermal_throttle_cpu_notifier
);
309 #ifdef CONFIG_HOTPLUG_CPU
310 mutex_lock(&therm_cpu_lock
);
312 /* connect live CPUs to sysfs */
313 for_each_online_cpu(cpu
) {
314 err
= thermal_throttle_add_dev(get_cpu_sysdev(cpu
), cpu
);
317 #ifdef CONFIG_HOTPLUG_CPU
318 mutex_unlock(&therm_cpu_lock
);
323 device_initcall(thermal_throttle_init_device
);
325 #endif /* CONFIG_SYSFS */
328 * Set up the most two significant bit to notify mce log that this thermal
330 * This is a temp solution. May be changed in the future with mce log
333 #define CORE_THROTTLED (0)
334 #define CORE_POWER_LIMIT ((__u64)1 << 62)
335 #define PACKAGE_THROTTLED ((__u64)2 << 62)
336 #define PACKAGE_POWER_LIMIT ((__u64)3 << 62)
338 static void notify_thresholds(__u64 msr_val
)
340 /* check whether the interrupt handler is defined;
341 * otherwise simply return
343 if (!platform_thermal_notify
)
346 /* lower threshold reached */
347 if ((msr_val
& THERM_LOG_THRESHOLD0
) && thresh_event_valid(0))
348 platform_thermal_notify(msr_val
);
349 /* higher threshold reached */
350 if ((msr_val
& THERM_LOG_THRESHOLD1
) && thresh_event_valid(1))
351 platform_thermal_notify(msr_val
);
354 /* Thermal transition interrupt handler */
355 static void intel_thermal_interrupt(void)
359 rdmsrl(MSR_IA32_THERM_STATUS
, msr_val
);
361 /* Check for violation of core thermal thresholds*/
362 notify_thresholds(msr_val
);
364 if (therm_throt_process(msr_val
& THERM_STATUS_PROCHOT
,
365 THERMAL_THROTTLING_EVENT
,
367 mce_log_therm_throt_event(CORE_THROTTLED
| msr_val
);
369 if (this_cpu_has(X86_FEATURE_PLN
))
370 if (therm_throt_process(msr_val
& THERM_STATUS_POWER_LIMIT
,
373 mce_log_therm_throt_event(CORE_POWER_LIMIT
| msr_val
);
375 if (this_cpu_has(X86_FEATURE_PTS
)) {
376 rdmsrl(MSR_IA32_PACKAGE_THERM_STATUS
, msr_val
);
377 if (therm_throt_process(msr_val
& PACKAGE_THERM_STATUS_PROCHOT
,
378 THERMAL_THROTTLING_EVENT
,
380 mce_log_therm_throt_event(PACKAGE_THROTTLED
| msr_val
);
381 if (this_cpu_has(X86_FEATURE_PLN
))
382 if (therm_throt_process(msr_val
&
383 PACKAGE_THERM_STATUS_POWER_LIMIT
,
386 mce_log_therm_throt_event(PACKAGE_POWER_LIMIT
391 static void unexpected_thermal_interrupt(void)
393 printk(KERN_ERR
"CPU%d: Unexpected LVT thermal interrupt!\n",
397 static void (*smp_thermal_vector
)(void) = unexpected_thermal_interrupt
;
399 asmlinkage
void smp_thermal_interrupt(struct pt_regs
*regs
)
403 trace_irq_vector_entry(THERMAL_APIC_VECTOR
);
404 inc_irq_stat(irq_thermal_count
);
405 smp_thermal_vector();
406 trace_irq_vector_exit(THERMAL_APIC_VECTOR
);
408 /* Ack only at the end to avoid potential reentry */
412 /* Thermal monitoring depends on APIC, ACPI and clock modulation */
413 static int intel_thermal_supported(struct cpuinfo_x86
*c
)
417 if (!cpu_has(c
, X86_FEATURE_ACPI
) || !cpu_has(c
, X86_FEATURE_ACC
))
422 void __init
mcheck_intel_therm_init(void)
425 * This function is only called on boot CPU. Save the init thermal
426 * LVT value on BSP and use that value to restore APs' thermal LVT
427 * entry BIOS programmed later
429 if (intel_thermal_supported(&boot_cpu_data
))
430 lvtthmr_init
= apic_read(APIC_LVTTHMR
);
433 void intel_init_thermal(struct cpuinfo_x86
*c
)
435 unsigned int cpu
= smp_processor_id();
439 if (!intel_thermal_supported(c
))
443 * First check if its enabled already, in which case there might
444 * be some SMM goo which handles it, so we can't even put a handler
445 * since it might be delivered via SMI already:
447 rdmsr(MSR_IA32_MISC_ENABLE
, l
, h
);
451 * The initial value of thermal LVT entries on all APs always reads
452 * 0x10000 because APs are woken up by BSP issuing INIT-SIPI-SIPI
453 * sequence to them and LVT registers are reset to 0s except for
454 * the mask bits which are set to 1s when APs receive INIT IPI.
455 * If BIOS takes over the thermal interrupt and sets its interrupt
456 * delivery mode to SMI (not fixed), it restores the value that the
457 * BIOS has programmed on AP based on BSP's info we saved since BIOS
458 * is always setting the same value for all threads/cores.
460 if ((h
& APIC_DM_FIXED_MASK
) != APIC_DM_FIXED
)
461 apic_write(APIC_LVTTHMR
, lvtthmr_init
);
464 if ((l
& MSR_IA32_MISC_ENABLE_TM1
) && (h
& APIC_DM_SMI
)) {
466 "CPU%d: Thermal monitoring handled by SMI\n", cpu
);
470 /* Check whether a vector already exists */
471 if (h
& APIC_VECTOR_MASK
) {
473 "CPU%d: Thermal LVT vector (%#x) already installed\n",
474 cpu
, (h
& APIC_VECTOR_MASK
));
478 /* early Pentium M models use different method for enabling TM2 */
479 if (cpu_has(c
, X86_FEATURE_TM2
)) {
480 if (c
->x86
== 6 && (c
->x86_model
== 9 || c
->x86_model
== 13)) {
481 rdmsr(MSR_THERM2_CTL
, l
, h
);
482 if (l
& MSR_THERM2_CTL_TM_SELECT
)
484 } else if (l
& MSR_IA32_MISC_ENABLE_TM2
)
488 /* We'll mask the thermal vector in the lapic till we're ready: */
489 h
= THERMAL_APIC_VECTOR
| APIC_DM_FIXED
| APIC_LVT_MASKED
;
490 apic_write(APIC_LVTTHMR
, h
);
492 rdmsr(MSR_IA32_THERM_INTERRUPT
, l
, h
);
493 if (cpu_has(c
, X86_FEATURE_PLN
))
494 wrmsr(MSR_IA32_THERM_INTERRUPT
,
495 l
| (THERM_INT_LOW_ENABLE
496 | THERM_INT_HIGH_ENABLE
| THERM_INT_PLN_ENABLE
), h
);
498 wrmsr(MSR_IA32_THERM_INTERRUPT
,
499 l
| (THERM_INT_LOW_ENABLE
| THERM_INT_HIGH_ENABLE
), h
);
501 if (cpu_has(c
, X86_FEATURE_PTS
)) {
502 rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT
, l
, h
);
503 if (cpu_has(c
, X86_FEATURE_PLN
))
504 wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT
,
505 l
| (PACKAGE_THERM_INT_LOW_ENABLE
506 | PACKAGE_THERM_INT_HIGH_ENABLE
507 | PACKAGE_THERM_INT_PLN_ENABLE
), h
);
509 wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT
,
510 l
| (PACKAGE_THERM_INT_LOW_ENABLE
511 | PACKAGE_THERM_INT_HIGH_ENABLE
), h
);
514 smp_thermal_vector
= intel_thermal_interrupt
;
516 rdmsr(MSR_IA32_MISC_ENABLE
, l
, h
);
517 wrmsr(MSR_IA32_MISC_ENABLE
, l
| MSR_IA32_MISC_ENABLE_TM1
, h
);
519 /* Unmask the thermal vector: */
520 l
= apic_read(APIC_LVTTHMR
);
521 apic_write(APIC_LVTTHMR
, l
& ~APIC_LVT_MASKED
);
523 printk_once(KERN_INFO
"CPU0: Thermal monitoring enabled (%s)\n",
524 tm2
? "TM2" : "TM1");
526 /* enable thermal throttle processing */
527 atomic_set(&therm_throt_en
, 1);