1 #include <linux/dma-mapping.h>
2 #include <linux/dma-debug.h>
3 #include <linux/dmar.h>
4 #include <linux/export.h>
5 #include <linux/bootmem.h>
8 #include <linux/kmemleak.h>
10 #include <asm/proto.h>
12 #include <asm/iommu.h>
14 #include <asm/calgary.h>
15 #include <asm/x86_init.h>
16 #include <asm/iommu_table.h>
18 static int forbid_dac __read_mostly
;
20 struct dma_map_ops
*dma_ops
= &nommu_dma_ops
;
21 EXPORT_SYMBOL(dma_ops
);
23 static int iommu_sac_force __read_mostly
;
25 #ifdef CONFIG_IOMMU_DEBUG
26 int panic_on_overflow __read_mostly
= 1;
27 int force_iommu __read_mostly
= 1;
29 int panic_on_overflow __read_mostly
= 0;
30 int force_iommu __read_mostly
= 0;
33 int iommu_merge __read_mostly
= 0;
35 int no_iommu __read_mostly
;
36 /* Set this to 1 if there is a HW IOMMU in the system */
37 int iommu_detected __read_mostly
= 0;
40 * This variable becomes 1 if iommu=pt is passed on the kernel command line.
41 * If this variable is 1, IOMMU implementations do no DMA translation for
42 * devices and allow every device to access to whole physical memory. This is
43 * useful if a user wants to use an IOMMU only for KVM device assignment to
44 * guests and not for driver dma translation.
46 int iommu_pass_through __read_mostly
;
48 extern struct iommu_table_entry __iommu_table
[], __iommu_table_end
[];
50 /* Dummy device used for NULL arguments (normally ISA). */
51 struct device x86_dma_fallback_dev
= {
52 .init_name
= "fallback device",
53 .coherent_dma_mask
= ISA_DMA_BIT_MASK
,
54 .dma_mask
= &x86_dma_fallback_dev
.coherent_dma_mask
,
56 EXPORT_SYMBOL(x86_dma_fallback_dev
);
58 /* Number of entries preallocated for DMA-API debugging */
59 #define PREALLOC_DMA_DEBUG_ENTRIES 32768
61 int dma_set_mask(struct device
*dev
, u64 mask
)
63 if (!dev
->dma_mask
|| !dma_supported(dev
, mask
))
66 *dev
->dma_mask
= mask
;
70 EXPORT_SYMBOL(dma_set_mask
);
72 void __init
pci_iommu_alloc(void)
74 struct iommu_table_entry
*p
;
76 sort_iommu_table(__iommu_table
, __iommu_table_end
);
77 check_iommu_entries(__iommu_table
, __iommu_table_end
);
79 for (p
= __iommu_table
; p
< __iommu_table_end
; p
++) {
80 if (p
&& p
->detect
&& p
->detect() > 0) {
81 p
->flags
|= IOMMU_DETECTED
;
84 if (p
->flags
& IOMMU_FINISH_IF_DETECTED
)
89 void *dma_generic_alloc_coherent(struct device
*dev
, size_t size
,
90 dma_addr_t
*dma_addr
, gfp_t flag
)
92 unsigned long dma_mask
;
96 dma_mask
= dma_alloc_coherent_mask(dev
, flag
);
100 page
= alloc_pages_node(dev_to_node(dev
), flag
, get_order(size
));
104 addr
= page_to_phys(page
);
105 if (addr
+ size
> dma_mask
) {
106 __free_pages(page
, get_order(size
));
108 if (dma_mask
< DMA_BIT_MASK(32) && !(flag
& GFP_DMA
)) {
109 flag
= (flag
& ~GFP_DMA32
) | GFP_DMA
;
117 return page_address(page
);
121 * See <Documentation/x86_64/boot-options.txt> for the iommu kernel parameter
124 static __init
int iommu_setup(char *p
)
132 if (!strncmp(p
, "off", 3))
134 /* gart_parse_options has more force support */
135 if (!strncmp(p
, "force", 5))
137 if (!strncmp(p
, "noforce", 7)) {
142 if (!strncmp(p
, "biomerge", 8)) {
146 if (!strncmp(p
, "panic", 5))
147 panic_on_overflow
= 1;
148 if (!strncmp(p
, "nopanic", 7))
149 panic_on_overflow
= 0;
150 if (!strncmp(p
, "merge", 5)) {
154 if (!strncmp(p
, "nomerge", 7))
156 if (!strncmp(p
, "forcesac", 8))
158 if (!strncmp(p
, "allowdac", 8))
160 if (!strncmp(p
, "nodac", 5))
162 if (!strncmp(p
, "usedac", 6)) {
166 #ifdef CONFIG_SWIOTLB
167 if (!strncmp(p
, "soft", 4))
170 if (!strncmp(p
, "pt", 2))
171 iommu_pass_through
= 1;
173 gart_parse_options(p
);
175 #ifdef CONFIG_CALGARY_IOMMU
176 if (!strncmp(p
, "calgary", 7))
178 #endif /* CONFIG_CALGARY_IOMMU */
180 p
+= strcspn(p
, ",");
186 early_param("iommu", iommu_setup
);
188 int dma_supported(struct device
*dev
, u64 mask
)
190 struct dma_map_ops
*ops
= get_dma_ops(dev
);
193 if (mask
> 0xffffffff && forbid_dac
> 0) {
194 dev_info(dev
, "PCI: Disallowing DAC for device\n");
199 if (ops
->dma_supported
)
200 return ops
->dma_supported(dev
, mask
);
202 /* Copied from i386. Doesn't make much sense, because it will
203 only work for pci_alloc_coherent.
204 The caller just has to use GFP_DMA in this case. */
205 if (mask
< DMA_BIT_MASK(24))
208 /* Tell the device to use SAC when IOMMU force is on. This
209 allows the driver to use cheaper accesses in some cases.
211 Problem with this is that if we overflow the IOMMU area and
212 return DAC as fallback address the device may not handle it
215 As a special case some controllers have a 39bit address
216 mode that is as efficient as 32bit (aic79xx). Don't force
217 SAC for these. Assume all masks <= 40 bits are of this
218 type. Normally this doesn't make any difference, but gives
219 more gentle handling of IOMMU overflow. */
220 if (iommu_sac_force
&& (mask
>= DMA_BIT_MASK(40))) {
221 dev_info(dev
, "Force SAC with mask %Lx\n", mask
);
227 EXPORT_SYMBOL(dma_supported
);
229 static int __init
pci_iommu_init(void)
231 struct iommu_table_entry
*p
;
232 dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES
);
235 dma_debug_add_bus(&pci_bus_type
);
237 x86_init
.iommu
.iommu_init();
239 for (p
= __iommu_table
; p
< __iommu_table_end
; p
++) {
240 if (p
&& (p
->flags
& IOMMU_DETECTED
) && p
->late_init
)
246 /* Must execute after PCI subsystem */
247 rootfs_initcall(pci_iommu_init
);
250 /* Many VIA bridges seem to corrupt data for DAC. Disable it here */
252 static __devinit
void via_no_dac(struct pci_dev
*dev
)
254 if ((dev
->class >> 8) == PCI_CLASS_BRIDGE_PCI
&& forbid_dac
== 0) {
255 dev_info(&dev
->dev
, "disabling DAC on VIA PCI bridge\n");
259 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA
, PCI_ANY_ID
, via_no_dac
);