arch/xtensa/kernel/time.c

   1 /*
   2  * arch/xtensa/kernel/time.c
   3  *
   4  * Timer and clock support.
   5  *
   6  * This file is subject to the terms and conditions of the GNU General Public
   7  * License.  See the file "COPYING" in the main directory of this archive
   8  * for more details.
   9  *
  10  * Copyright (C) 2005 Tensilica Inc.
  11  *
  12  * Chris Zankel <chris@zankel.net>
  13  */
  14
  15 #include <linux/errno.h>
  16 #include <linux/sched.h>
  17 #include <linux/time.h>
  18 #include <linux/clocksource.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/module.h>
  21 #include <linux/init.h>
  22 #include <linux/irq.h>
  23 #include <linux/profile.h>
  24 #include <linux/delay.h>
  25
  26 #include <asm/timex.h>
  27 #include <asm/platform.h>
  28
  29 #ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
  30 unsigned long ccount_per_jiffy;         /* per 1/HZ */
  31 unsigned long nsec_per_ccount;          /* nsec per ccount increment */
  32 #endif
  33
  34 static cycle_t ccount_read(void)
  35 {
  36         return (cycle_t)get_ccount();
  37 }
  38
  39 static struct clocksource ccount_clocksource = {
  40         .name = "ccount",
  41         .rating = 200,
  42         .read = ccount_read,
  43         .mask = CLOCKSOURCE_MASK(32),
  44         /*
  45          * With a shift of 22 the lower limit of the cpu clock is
  46          * 1MHz, where NSEC_PER_CCOUNT is 1000 or a bit less than
  47          * 2^10: Since we have 32 bits and the multiplicator can
  48          * already take up as much as 10 bits, this leaves us with
  49          * remaining upper 22 bits.
  50          */
  51         .shift = 22,
  52 };
  53
  54 static irqreturn_t timer_interrupt(int irq, void *dev_id);
  55 static struct irqaction timer_irqaction = {
  56         .handler =      timer_interrupt,
  57         .flags =        IRQF_DISABLED,
  58         .name =         "timer",
  59 };
  60
  61 void __init time_init(void)
  62 {
  63 #ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
  64         printk("Calibrating CPU frequency ");
  65         platform_calibrate_ccount();
  66         printk("%d.%02d MHz\n", (int)ccount_per_jiffy/(1000000/HZ),
  67                         (int)(ccount_per_jiffy/(10000/HZ))%100);
  68 #endif
  69         ccount_clocksource.mult =
  70                 clocksource_hz2mult(CCOUNT_PER_JIFFY * HZ,
  71                                 ccount_clocksource.shift);
  72         clocksource_register(&ccount_clocksource);
  73
  74         /* Initialize the linux timer interrupt. */
  75
  76         setup_irq(LINUX_TIMER_INT, &timer_irqaction);
  77         set_linux_timer(get_ccount() + CCOUNT_PER_JIFFY);
  78 }
  79
  80 /*
  81  * The timer interrupt is called HZ times per second.
  82  */
  83
  84 irqreturn_t timer_interrupt (int irq, void *dev_id)
  85 {
  86
  87         unsigned long next;
  88
  89         next = get_linux_timer();
  90
  91 again:
  92         while ((signed long)(get_ccount() - next) > 0) {
  93
  94                 profile_tick(CPU_PROFILING);
  95 #ifndef CONFIG_SMP
  96                 update_process_times(user_mode(get_irq_regs()));
  97 #endif
  98
  99                 xtime_update(1); /* Linux handler in kernel/time/timekeeping */
 100
 101                 /* Note that writing CCOMPARE clears the interrupt. */
 102
 103                 next += CCOUNT_PER_JIFFY;
 104                 set_linux_timer(next);
 105         }
 106
 107         /* Allow platform to do something useful (Wdog). */
 108
 109         platform_heartbeat();
 110
 111         /* Make sure we didn't miss any tick... */
 112
 113         if ((signed long)(get_ccount() - next) > 0)
 114                 goto again;
 115
 116         return IRQ_HANDLED;
 117 }
 118
 119 #ifndef CONFIG_GENERIC_CALIBRATE_DELAY
 120 void __cpuinit calibrate_delay(void)
 121 {
 122         loops_per_jiffy = CCOUNT_PER_JIFFY;
 123         printk("Calibrating delay loop (skipped)... "
 124                "%lu.%02lu BogoMIPS preset\n",
 125                loops_per_jiffy/(1000000/HZ),
 126                (loops_per_jiffy/(10000/HZ)) % 100);
 127 }
 128 #endif