2 * processor_idle - idle state submodule to the ACPI processor driver
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/cpufreq.h>
35 #include <linux/slab.h>
36 #include <linux/acpi.h>
37 #include <linux/dmi.h>
38 #include <linux/moduleparam.h>
39 #include <linux/sched.h> /* need_resched() */
40 #include <linux/pm_qos.h>
41 #include <linux/clockchips.h>
42 #include <linux/cpuidle.h>
43 #include <linux/irqflags.h>
46 * Include the apic definitions for x86 to have the APIC timer related defines
47 * available also for UP (on SMP it gets magically included via linux/smp.h).
48 * asm/acpi.h is not an option, as it would require more include magic. Also
49 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
56 #include <asm/uaccess.h>
58 #include <acpi/acpi_bus.h>
59 #include <acpi/processor.h>
60 #include <asm/processor.h>
62 #define PREFIX "ACPI: "
64 #define ACPI_PROCESSOR_CLASS "processor"
65 #define _COMPONENT ACPI_PROCESSOR_COMPONENT
66 ACPI_MODULE_NAME("processor_idle");
67 #define PM_TIMER_TICK_NS (1000000000ULL/PM_TIMER_FREQUENCY)
68 #define C2_OVERHEAD 1 /* 1us */
69 #define C3_OVERHEAD 1 /* 1us */
70 #define PM_TIMER_TICKS_TO_US(p) (((p) * 1000)/(PM_TIMER_FREQUENCY/1000))
72 static unsigned int max_cstate __read_mostly
= ACPI_PROCESSOR_MAX_POWER
;
73 module_param(max_cstate
, uint
, 0000);
74 static unsigned int nocst __read_mostly
;
75 module_param(nocst
, uint
, 0000);
76 static int bm_check_disable __read_mostly
;
77 module_param(bm_check_disable
, uint
, 0000);
79 static unsigned int latency_factor __read_mostly
= 2;
80 module_param(latency_factor
, uint
, 0644);
82 static int disabled_by_idle_boot_param(void)
84 return boot_option_idle_override
== IDLE_POLL
||
85 boot_option_idle_override
== IDLE_FORCE_MWAIT
||
86 boot_option_idle_override
== IDLE_HALT
;
90 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
91 * For now disable this. Probably a bug somewhere else.
93 * To skip this limit, boot/load with a large max_cstate limit.
95 static int set_max_cstate(const struct dmi_system_id
*id
)
97 if (max_cstate
> ACPI_PROCESSOR_MAX_POWER
)
100 printk(KERN_NOTICE PREFIX
"%s detected - limiting to C%ld max_cstate."
101 " Override with \"processor.max_cstate=%d\"\n", id
->ident
,
102 (long)id
->driver_data
, ACPI_PROCESSOR_MAX_POWER
+ 1);
104 max_cstate
= (long)id
->driver_data
;
109 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
110 callers to only run once -AK */
111 static struct dmi_system_id __cpuinitdata processor_power_dmi_table
[] = {
112 { set_max_cstate
, "Clevo 5600D", {
113 DMI_MATCH(DMI_BIOS_VENDOR
,"Phoenix Technologies LTD"),
114 DMI_MATCH(DMI_BIOS_VERSION
,"SHE845M0.86C.0013.D.0302131307")},
116 { set_max_cstate
, "Pavilion zv5000", {
117 DMI_MATCH(DMI_SYS_VENDOR
, "Hewlett-Packard"),
118 DMI_MATCH(DMI_PRODUCT_NAME
,"Pavilion zv5000 (DS502A#ABA)")},
120 { set_max_cstate
, "Asus L8400B", {
121 DMI_MATCH(DMI_SYS_VENDOR
, "ASUSTeK Computer Inc."),
122 DMI_MATCH(DMI_PRODUCT_NAME
,"L8400B series Notebook PC")},
129 * Callers should disable interrupts before the call and enable
130 * interrupts after return.
132 static void acpi_safe_halt(void)
134 current_thread_info()->status
&= ~TS_POLLING
;
136 * TS_POLLING-cleared state must be visible before we
140 if (!need_resched()) {
144 current_thread_info()->status
|= TS_POLLING
;
147 #ifdef ARCH_APICTIMER_STOPS_ON_C3
150 * Some BIOS implementations switch to C3 in the published C2 state.
151 * This seems to be a common problem on AMD boxen, but other vendors
152 * are affected too. We pick the most conservative approach: we assume
153 * that the local APIC stops in both C2 and C3.
155 static void lapic_timer_check_state(int state
, struct acpi_processor
*pr
,
156 struct acpi_processor_cx
*cx
)
158 struct acpi_processor_power
*pwr
= &pr
->power
;
159 u8 type
= local_apic_timer_c2_ok
? ACPI_STATE_C3
: ACPI_STATE_C2
;
161 if (cpu_has(&cpu_data(pr
->id
), X86_FEATURE_ARAT
))
164 if (amd_e400_c1e_detected
)
165 type
= ACPI_STATE_C1
;
168 * Check, if one of the previous states already marked the lapic
171 if (pwr
->timer_broadcast_on_state
< state
)
174 if (cx
->type
>= type
)
175 pr
->power
.timer_broadcast_on_state
= state
;
178 static void __lapic_timer_propagate_broadcast(void *arg
)
180 struct acpi_processor
*pr
= (struct acpi_processor
*) arg
;
181 unsigned long reason
;
183 reason
= pr
->power
.timer_broadcast_on_state
< INT_MAX
?
184 CLOCK_EVT_NOTIFY_BROADCAST_ON
: CLOCK_EVT_NOTIFY_BROADCAST_OFF
;
186 clockevents_notify(reason
, &pr
->id
);
189 static void lapic_timer_propagate_broadcast(struct acpi_processor
*pr
)
191 smp_call_function_single(pr
->id
, __lapic_timer_propagate_broadcast
,
195 /* Power(C) State timer broadcast control */
196 static void lapic_timer_state_broadcast(struct acpi_processor
*pr
,
197 struct acpi_processor_cx
*cx
,
200 int state
= cx
- pr
->power
.states
;
202 if (state
>= pr
->power
.timer_broadcast_on_state
) {
203 unsigned long reason
;
205 reason
= broadcast
? CLOCK_EVT_NOTIFY_BROADCAST_ENTER
:
206 CLOCK_EVT_NOTIFY_BROADCAST_EXIT
;
207 clockevents_notify(reason
, &pr
->id
);
213 static void lapic_timer_check_state(int state
, struct acpi_processor
*pr
,
214 struct acpi_processor_cx
*cstate
) { }
215 static void lapic_timer_propagate_broadcast(struct acpi_processor
*pr
) { }
216 static void lapic_timer_state_broadcast(struct acpi_processor
*pr
,
217 struct acpi_processor_cx
*cx
,
225 * Suspend / resume control
227 static int acpi_idle_suspend
;
228 static u32 saved_bm_rld
;
230 static void acpi_idle_bm_rld_save(void)
232 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD
, &saved_bm_rld
);
234 static void acpi_idle_bm_rld_restore(void)
238 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD
, &resumed_bm_rld
);
240 if (resumed_bm_rld
!= saved_bm_rld
)
241 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD
, saved_bm_rld
);
244 int acpi_processor_suspend(struct acpi_device
* device
, pm_message_t state
)
246 if (acpi_idle_suspend
== 1)
249 acpi_idle_bm_rld_save();
250 acpi_idle_suspend
= 1;
254 int acpi_processor_resume(struct acpi_device
* device
)
256 if (acpi_idle_suspend
== 0)
259 acpi_idle_bm_rld_restore();
260 acpi_idle_suspend
= 0;
264 #if defined(CONFIG_X86)
265 static void tsc_check_state(int state
)
267 switch (boot_cpu_data
.x86_vendor
) {
269 case X86_VENDOR_INTEL
:
271 * AMD Fam10h TSC will tick in all
272 * C/P/S0/S1 states when this bit is set.
274 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC
))
279 /* TSC could halt in idle, so notify users */
280 if (state
> ACPI_STATE_C1
)
281 mark_tsc_unstable("TSC halts in idle");
285 static void tsc_check_state(int state
) { return; }
288 static int acpi_processor_get_power_info_fadt(struct acpi_processor
*pr
)
297 /* if info is obtained from pblk/fadt, type equals state */
298 pr
->power
.states
[ACPI_STATE_C2
].type
= ACPI_STATE_C2
;
299 pr
->power
.states
[ACPI_STATE_C3
].type
= ACPI_STATE_C3
;
301 #ifndef CONFIG_HOTPLUG_CPU
303 * Check for P_LVL2_UP flag before entering C2 and above on
306 if ((num_online_cpus() > 1) &&
307 !(acpi_gbl_FADT
.flags
& ACPI_FADT_C2_MP_SUPPORTED
))
311 /* determine C2 and C3 address from pblk */
312 pr
->power
.states
[ACPI_STATE_C2
].address
= pr
->pblk
+ 4;
313 pr
->power
.states
[ACPI_STATE_C3
].address
= pr
->pblk
+ 5;
315 /* determine latencies from FADT */
316 pr
->power
.states
[ACPI_STATE_C2
].latency
= acpi_gbl_FADT
.C2latency
;
317 pr
->power
.states
[ACPI_STATE_C3
].latency
= acpi_gbl_FADT
.C3latency
;
320 * FADT specified C2 latency must be less than or equal to
323 if (acpi_gbl_FADT
.C2latency
> ACPI_PROCESSOR_MAX_C2_LATENCY
) {
324 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
325 "C2 latency too large [%d]\n", acpi_gbl_FADT
.C2latency
));
327 pr
->power
.states
[ACPI_STATE_C2
].address
= 0;
331 * FADT supplied C3 latency must be less than or equal to
334 if (acpi_gbl_FADT
.C3latency
> ACPI_PROCESSOR_MAX_C3_LATENCY
) {
335 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
336 "C3 latency too large [%d]\n", acpi_gbl_FADT
.C3latency
));
338 pr
->power
.states
[ACPI_STATE_C3
].address
= 0;
341 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
342 "lvl2[0x%08x] lvl3[0x%08x]\n",
343 pr
->power
.states
[ACPI_STATE_C2
].address
,
344 pr
->power
.states
[ACPI_STATE_C3
].address
));
349 static int acpi_processor_get_power_info_default(struct acpi_processor
*pr
)
351 if (!pr
->power
.states
[ACPI_STATE_C1
].valid
) {
352 /* set the first C-State to C1 */
353 /* all processors need to support C1 */
354 pr
->power
.states
[ACPI_STATE_C1
].type
= ACPI_STATE_C1
;
355 pr
->power
.states
[ACPI_STATE_C1
].valid
= 1;
356 pr
->power
.states
[ACPI_STATE_C1
].entry_method
= ACPI_CSTATE_HALT
;
358 /* the C0 state only exists as a filler in our array */
359 pr
->power
.states
[ACPI_STATE_C0
].valid
= 1;
363 static int acpi_processor_get_power_info_cst(struct acpi_processor
*pr
)
365 acpi_status status
= 0;
369 struct acpi_buffer buffer
= { ACPI_ALLOCATE_BUFFER
, NULL
};
370 union acpi_object
*cst
;
378 status
= acpi_evaluate_object(pr
->handle
, "_CST", NULL
, &buffer
);
379 if (ACPI_FAILURE(status
)) {
380 ACPI_DEBUG_PRINT((ACPI_DB_INFO
, "No _CST, giving up\n"));
384 cst
= buffer
.pointer
;
386 /* There must be at least 2 elements */
387 if (!cst
|| (cst
->type
!= ACPI_TYPE_PACKAGE
) || cst
->package
.count
< 2) {
388 printk(KERN_ERR PREFIX
"not enough elements in _CST\n");
393 count
= cst
->package
.elements
[0].integer
.value
;
395 /* Validate number of power states. */
396 if (count
< 1 || count
!= cst
->package
.count
- 1) {
397 printk(KERN_ERR PREFIX
"count given by _CST is not valid\n");
402 /* Tell driver that at least _CST is supported. */
403 pr
->flags
.has_cst
= 1;
405 for (i
= 1; i
<= count
; i
++) {
406 union acpi_object
*element
;
407 union acpi_object
*obj
;
408 struct acpi_power_register
*reg
;
409 struct acpi_processor_cx cx
;
411 memset(&cx
, 0, sizeof(cx
));
413 element
= &(cst
->package
.elements
[i
]);
414 if (element
->type
!= ACPI_TYPE_PACKAGE
)
417 if (element
->package
.count
!= 4)
420 obj
= &(element
->package
.elements
[0]);
422 if (obj
->type
!= ACPI_TYPE_BUFFER
)
425 reg
= (struct acpi_power_register
*)obj
->buffer
.pointer
;
427 if (reg
->space_id
!= ACPI_ADR_SPACE_SYSTEM_IO
&&
428 (reg
->space_id
!= ACPI_ADR_SPACE_FIXED_HARDWARE
))
431 /* There should be an easy way to extract an integer... */
432 obj
= &(element
->package
.elements
[1]);
433 if (obj
->type
!= ACPI_TYPE_INTEGER
)
436 cx
.type
= obj
->integer
.value
;
438 * Some buggy BIOSes won't list C1 in _CST -
439 * Let acpi_processor_get_power_info_default() handle them later
441 if (i
== 1 && cx
.type
!= ACPI_STATE_C1
)
444 cx
.address
= reg
->address
;
445 cx
.index
= current_count
+ 1;
447 cx
.entry_method
= ACPI_CSTATE_SYSTEMIO
;
448 if (reg
->space_id
== ACPI_ADR_SPACE_FIXED_HARDWARE
) {
449 if (acpi_processor_ffh_cstate_probe
450 (pr
->id
, &cx
, reg
) == 0) {
451 cx
.entry_method
= ACPI_CSTATE_FFH
;
452 } else if (cx
.type
== ACPI_STATE_C1
) {
454 * C1 is a special case where FIXED_HARDWARE
455 * can be handled in non-MWAIT way as well.
456 * In that case, save this _CST entry info.
457 * Otherwise, ignore this info and continue.
459 cx
.entry_method
= ACPI_CSTATE_HALT
;
460 snprintf(cx
.desc
, ACPI_CX_DESC_LEN
, "ACPI HLT");
464 if (cx
.type
== ACPI_STATE_C1
&&
465 (boot_option_idle_override
== IDLE_NOMWAIT
)) {
467 * In most cases the C1 space_id obtained from
468 * _CST object is FIXED_HARDWARE access mode.
469 * But when the option of idle=halt is added,
470 * the entry_method type should be changed from
471 * CSTATE_FFH to CSTATE_HALT.
472 * When the option of idle=nomwait is added,
473 * the C1 entry_method type should be
476 cx
.entry_method
= ACPI_CSTATE_HALT
;
477 snprintf(cx
.desc
, ACPI_CX_DESC_LEN
, "ACPI HLT");
480 snprintf(cx
.desc
, ACPI_CX_DESC_LEN
, "ACPI IOPORT 0x%x",
484 if (cx
.type
== ACPI_STATE_C1
) {
488 obj
= &(element
->package
.elements
[2]);
489 if (obj
->type
!= ACPI_TYPE_INTEGER
)
492 cx
.latency
= obj
->integer
.value
;
494 obj
= &(element
->package
.elements
[3]);
495 if (obj
->type
!= ACPI_TYPE_INTEGER
)
498 cx
.power
= obj
->integer
.value
;
501 memcpy(&(pr
->power
.states
[current_count
]), &cx
, sizeof(cx
));
504 * We support total ACPI_PROCESSOR_MAX_POWER - 1
505 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
507 if (current_count
>= (ACPI_PROCESSOR_MAX_POWER
- 1)) {
509 "Limiting number of power states to max (%d)\n",
510 ACPI_PROCESSOR_MAX_POWER
);
512 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
517 ACPI_DEBUG_PRINT((ACPI_DB_INFO
, "Found %d power states\n",
520 /* Validate number of power states discovered */
521 if (current_count
< 2)
525 kfree(buffer
.pointer
);
530 static void acpi_processor_power_verify_c3(struct acpi_processor
*pr
,
531 struct acpi_processor_cx
*cx
)
533 static int bm_check_flag
= -1;
534 static int bm_control_flag
= -1;
541 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
542 * DMA transfers are used by any ISA device to avoid livelock.
543 * Note that we could disable Type-F DMA (as recommended by
544 * the erratum), but this is known to disrupt certain ISA
545 * devices thus we take the conservative approach.
547 else if (errata
.piix4
.fdma
) {
548 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
549 "C3 not supported on PIIX4 with Type-F DMA\n"));
553 /* All the logic here assumes flags.bm_check is same across all CPUs */
554 if (bm_check_flag
== -1) {
555 /* Determine whether bm_check is needed based on CPU */
556 acpi_processor_power_init_bm_check(&(pr
->flags
), pr
->id
);
557 bm_check_flag
= pr
->flags
.bm_check
;
558 bm_control_flag
= pr
->flags
.bm_control
;
560 pr
->flags
.bm_check
= bm_check_flag
;
561 pr
->flags
.bm_control
= bm_control_flag
;
564 if (pr
->flags
.bm_check
) {
565 if (!pr
->flags
.bm_control
) {
566 if (pr
->flags
.has_cst
!= 1) {
567 /* bus mastering control is necessary */
568 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
569 "C3 support requires BM control\n"));
572 /* Here we enter C3 without bus mastering */
573 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
574 "C3 support without BM control\n"));
579 * WBINVD should be set in fadt, for C3 state to be
580 * supported on when bm_check is not required.
582 if (!(acpi_gbl_FADT
.flags
& ACPI_FADT_WBINVD
)) {
583 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
584 "Cache invalidation should work properly"
585 " for C3 to be enabled on SMP systems\n"));
591 * Otherwise we've met all of our C3 requirements.
592 * Normalize the C3 latency to expidite policy. Enable
593 * checking of bus mastering status (bm_check) so we can
594 * use this in our C3 policy
598 cx
->latency_ticks
= cx
->latency
;
600 * On older chipsets, BM_RLD needs to be set
601 * in order for Bus Master activity to wake the
602 * system from C3. Newer chipsets handle DMA
603 * during C3 automatically and BM_RLD is a NOP.
604 * In either case, the proper way to
605 * handle BM_RLD is to set it and leave it set.
607 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD
, 1);
612 static int acpi_processor_power_verify(struct acpi_processor
*pr
)
615 unsigned int working
= 0;
617 pr
->power
.timer_broadcast_on_state
= INT_MAX
;
619 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
&& i
<= max_cstate
; i
++) {
620 struct acpi_processor_cx
*cx
= &pr
->power
.states
[i
];
631 cx
->latency_ticks
= cx
->latency
; /* Normalize latency */
635 acpi_processor_power_verify_c3(pr
, cx
);
641 lapic_timer_check_state(i
, pr
, cx
);
642 tsc_check_state(cx
->type
);
646 lapic_timer_propagate_broadcast(pr
);
651 static int acpi_processor_get_power_info(struct acpi_processor
*pr
)
657 /* NOTE: the idle thread may not be running while calling
660 /* Zero initialize all the C-states info. */
661 memset(pr
->power
.states
, 0, sizeof(pr
->power
.states
));
663 result
= acpi_processor_get_power_info_cst(pr
);
664 if (result
== -ENODEV
)
665 result
= acpi_processor_get_power_info_fadt(pr
);
670 acpi_processor_get_power_info_default(pr
);
672 pr
->power
.count
= acpi_processor_power_verify(pr
);
675 * if one state of type C2 or C3 is available, mark this
676 * CPU as being "idle manageable"
678 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
; i
++) {
679 if (pr
->power
.states
[i
].valid
) {
681 if (pr
->power
.states
[i
].type
>= ACPI_STATE_C2
)
690 * acpi_idle_bm_check - checks if bus master activity was detected
692 static int acpi_idle_bm_check(void)
696 if (bm_check_disable
)
699 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS
, &bm_status
);
701 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS
, 1);
703 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
704 * the true state of bus mastering activity; forcing us to
705 * manually check the BMIDEA bit of each IDE channel.
707 else if (errata
.piix4
.bmisx
) {
708 if ((inb_p(errata
.piix4
.bmisx
+ 0x02) & 0x01)
709 || (inb_p(errata
.piix4
.bmisx
+ 0x0A) & 0x01))
716 * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
719 * Caller disables interrupt before call and enables interrupt after return.
721 static inline void acpi_idle_do_entry(struct acpi_processor_cx
*cx
)
723 /* Don't trace irqs off for idle */
724 stop_critical_timings();
725 if (cx
->entry_method
== ACPI_CSTATE_FFH
) {
726 /* Call into architectural FFH based C-state */
727 acpi_processor_ffh_cstate_enter(cx
);
728 } else if (cx
->entry_method
== ACPI_CSTATE_HALT
) {
731 /* IO port based C-state */
733 /* Dummy wait op - must do something useless after P_LVL2 read
734 because chipsets cannot guarantee that STPCLK# signal
735 gets asserted in time to freeze execution properly. */
736 inl(acpi_gbl_FADT
.xpm_timer_block
.address
);
738 start_critical_timings();
742 * acpi_idle_enter_c1 - enters an ACPI C1 state-type
743 * @dev: the target CPU
744 * @state: the state data
746 * This is equivalent to the HALT instruction.
748 static int acpi_idle_enter_c1(struct cpuidle_device
*dev
,
749 struct cpuidle_state
*state
)
753 struct acpi_processor
*pr
;
754 struct acpi_processor_cx
*cx
= cpuidle_get_statedata(state
);
756 pr
= __this_cpu_read(processors
);
763 /* Do not access any ACPI IO ports in suspend path */
764 if (acpi_idle_suspend
) {
770 lapic_timer_state_broadcast(pr
, cx
, 1);
771 kt1
= ktime_get_real();
772 acpi_idle_do_entry(cx
);
773 kt2
= ktime_get_real();
774 idle_time
= ktime_to_us(ktime_sub(kt2
, kt1
));
778 lapic_timer_state_broadcast(pr
, cx
, 0);
784 * acpi_idle_enter_simple - enters an ACPI state without BM handling
785 * @dev: the target CPU
786 * @state: the state data
788 static int acpi_idle_enter_simple(struct cpuidle_device
*dev
,
789 struct cpuidle_state
*state
)
791 struct acpi_processor
*pr
;
792 struct acpi_processor_cx
*cx
= cpuidle_get_statedata(state
);
797 pr
= __this_cpu_read(processors
);
802 if (acpi_idle_suspend
)
803 return(acpi_idle_enter_c1(dev
, state
));
807 if (cx
->entry_method
!= ACPI_CSTATE_FFH
) {
808 current_thread_info()->status
&= ~TS_POLLING
;
810 * TS_POLLING-cleared state must be visible before we test
815 if (unlikely(need_resched())) {
816 current_thread_info()->status
|= TS_POLLING
;
823 * Must be done before busmaster disable as we might need to
826 lapic_timer_state_broadcast(pr
, cx
, 1);
828 if (cx
->type
== ACPI_STATE_C3
)
829 ACPI_FLUSH_CPU_CACHE();
831 kt1
= ktime_get_real();
832 /* Tell the scheduler that we are going deep-idle: */
833 sched_clock_idle_sleep_event();
834 acpi_idle_do_entry(cx
);
835 kt2
= ktime_get_real();
836 idle_time_ns
= ktime_to_ns(ktime_sub(kt2
, kt1
));
837 idle_time
= idle_time_ns
;
838 do_div(idle_time
, NSEC_PER_USEC
);
840 /* Tell the scheduler how much we idled: */
841 sched_clock_idle_wakeup_event(idle_time_ns
);
844 if (cx
->entry_method
!= ACPI_CSTATE_FFH
)
845 current_thread_info()->status
|= TS_POLLING
;
849 lapic_timer_state_broadcast(pr
, cx
, 0);
850 cx
->time
+= idle_time
;
854 static int c3_cpu_count
;
855 static DEFINE_SPINLOCK(c3_lock
);
858 * acpi_idle_enter_bm - enters C3 with proper BM handling
859 * @dev: the target CPU
860 * @state: the state data
862 * If BM is detected, the deepest non-C3 idle state is entered instead.
864 static int acpi_idle_enter_bm(struct cpuidle_device
*dev
,
865 struct cpuidle_state
*state
)
867 struct acpi_processor
*pr
;
868 struct acpi_processor_cx
*cx
= cpuidle_get_statedata(state
);
874 pr
= __this_cpu_read(processors
);
879 if (acpi_idle_suspend
)
880 return(acpi_idle_enter_c1(dev
, state
));
882 if (!cx
->bm_sts_skip
&& acpi_idle_bm_check()) {
883 if (dev
->safe_state
) {
884 dev
->last_state
= dev
->safe_state
;
885 return dev
->safe_state
->enter(dev
, dev
->safe_state
);
896 if (cx
->entry_method
!= ACPI_CSTATE_FFH
) {
897 current_thread_info()->status
&= ~TS_POLLING
;
899 * TS_POLLING-cleared state must be visible before we test
904 if (unlikely(need_resched())) {
905 current_thread_info()->status
|= TS_POLLING
;
911 acpi_unlazy_tlb(smp_processor_id());
913 /* Tell the scheduler that we are going deep-idle: */
914 sched_clock_idle_sleep_event();
916 * Must be done before busmaster disable as we might need to
919 lapic_timer_state_broadcast(pr
, cx
, 1);
921 kt1
= ktime_get_real();
924 * bm_check implies we need ARB_DIS
925 * !bm_check implies we need cache flush
926 * bm_control implies whether we can do ARB_DIS
928 * That leaves a case where bm_check is set and bm_control is
929 * not set. In that case we cannot do much, we enter C3
930 * without doing anything.
932 if (pr
->flags
.bm_check
&& pr
->flags
.bm_control
) {
935 /* Disable bus master arbitration when all CPUs are in C3 */
936 if (c3_cpu_count
== num_online_cpus())
937 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE
, 1);
938 spin_unlock(&c3_lock
);
939 } else if (!pr
->flags
.bm_check
) {
940 ACPI_FLUSH_CPU_CACHE();
943 acpi_idle_do_entry(cx
);
945 /* Re-enable bus master arbitration */
946 if (pr
->flags
.bm_check
&& pr
->flags
.bm_control
) {
948 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE
, 0);
950 spin_unlock(&c3_lock
);
952 kt2
= ktime_get_real();
953 idle_time_ns
= ktime_to_ns(ktime_sub(kt2
, kt1
));
954 idle_time
= idle_time_ns
;
955 do_div(idle_time
, NSEC_PER_USEC
);
957 /* Tell the scheduler how much we idled: */
958 sched_clock_idle_wakeup_event(idle_time_ns
);
961 if (cx
->entry_method
!= ACPI_CSTATE_FFH
)
962 current_thread_info()->status
|= TS_POLLING
;
966 lapic_timer_state_broadcast(pr
, cx
, 0);
967 cx
->time
+= idle_time
;
971 struct cpuidle_driver acpi_idle_driver
= {
973 .owner
= THIS_MODULE
,
977 * acpi_processor_setup_cpuidle - prepares and configures CPUIDLE
978 * @pr: the ACPI processor
980 static int acpi_processor_setup_cpuidle(struct acpi_processor
*pr
)
982 int i
, count
= CPUIDLE_DRIVER_STATE_START
;
983 struct acpi_processor_cx
*cx
;
984 struct cpuidle_state
*state
;
985 struct cpuidle_device
*dev
= &pr
->power
.dev
;
987 if (!pr
->flags
.power_setup_done
)
990 if (pr
->flags
.power
== 0) {
995 for (i
= 0; i
< CPUIDLE_STATE_MAX
; i
++) {
996 dev
->states
[i
].name
[0] = '\0';
997 dev
->states
[i
].desc
[0] = '\0';
1000 if (max_cstate
== 0)
1003 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
&& i
<= max_cstate
; i
++) {
1004 cx
= &pr
->power
.states
[i
];
1005 state
= &dev
->states
[count
];
1010 #ifdef CONFIG_HOTPLUG_CPU
1011 if ((cx
->type
!= ACPI_STATE_C1
) && (num_online_cpus() > 1) &&
1012 !pr
->flags
.has_cst
&&
1013 !(acpi_gbl_FADT
.flags
& ACPI_FADT_C2_MP_SUPPORTED
))
1016 cpuidle_set_statedata(state
, cx
);
1018 snprintf(state
->name
, CPUIDLE_NAME_LEN
, "C%d", i
);
1019 strncpy(state
->desc
, cx
->desc
, CPUIDLE_DESC_LEN
);
1020 state
->exit_latency
= cx
->latency
;
1021 state
->target_residency
= cx
->latency
* latency_factor
;
1026 if (cx
->entry_method
== ACPI_CSTATE_FFH
)
1027 state
->flags
|= CPUIDLE_FLAG_TIME_VALID
;
1029 state
->enter
= acpi_idle_enter_c1
;
1030 dev
->safe_state
= state
;
1034 state
->flags
|= CPUIDLE_FLAG_TIME_VALID
;
1035 state
->enter
= acpi_idle_enter_simple
;
1036 dev
->safe_state
= state
;
1040 state
->flags
|= CPUIDLE_FLAG_TIME_VALID
;
1041 state
->enter
= pr
->flags
.bm_check
?
1042 acpi_idle_enter_bm
:
1043 acpi_idle_enter_simple
;
1048 if (count
== CPUIDLE_STATE_MAX
)
1052 dev
->state_count
= count
;
1060 int acpi_processor_cst_has_changed(struct acpi_processor
*pr
)
1064 if (disabled_by_idle_boot_param())
1074 if (!pr
->flags
.power_setup_done
)
1077 cpuidle_pause_and_lock();
1078 cpuidle_disable_device(&pr
->power
.dev
);
1079 acpi_processor_get_power_info(pr
);
1080 if (pr
->flags
.power
) {
1081 acpi_processor_setup_cpuidle(pr
);
1082 ret
= cpuidle_enable_device(&pr
->power
.dev
);
1084 cpuidle_resume_and_unlock();
1089 int __cpuinit
acpi_processor_power_init(struct acpi_processor
*pr
,
1090 struct acpi_device
*device
)
1092 acpi_status status
= 0;
1093 static int first_run
;
1095 if (disabled_by_idle_boot_param())
1099 dmi_check_system(processor_power_dmi_table
);
1100 max_cstate
= acpi_processor_cstate_check(max_cstate
);
1101 if (max_cstate
< ACPI_C_STATES_MAX
)
1103 "ACPI: processor limited to max C-state %d\n",
1111 if (acpi_gbl_FADT
.cst_control
&& !nocst
) {
1113 acpi_os_write_port(acpi_gbl_FADT
.smi_command
, acpi_gbl_FADT
.cst_control
, 8);
1114 if (ACPI_FAILURE(status
)) {
1115 ACPI_EXCEPTION((AE_INFO
, status
,
1116 "Notifying BIOS of _CST ability failed"));
1120 acpi_processor_get_power_info(pr
);
1121 pr
->flags
.power_setup_done
= 1;
1124 * Install the idle handler if processor power management is supported.
1125 * Note that we use previously set idle handler will be used on
1126 * platforms that only support C1.
1128 if (pr
->flags
.power
) {
1129 acpi_processor_setup_cpuidle(pr
);
1130 if (cpuidle_register_device(&pr
->power
.dev
))
1136 int acpi_processor_power_exit(struct acpi_processor
*pr
,
1137 struct acpi_device
*device
)
1139 if (disabled_by_idle_boot_param())
1142 cpuidle_unregister_device(&pr
->power
.dev
);
1143 pr
->flags
.power_setup_done
= 0;