drivers/pci/iov.c

   1 /*
   2  * drivers/pci/iov.c
   3  *
   4  * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
   5  *
   6  * PCI Express I/O Virtualization (IOV) support.
   7  *   Single Root IOV 1.0
   8  *   Address Translation Service 1.0
   9  */
  10
  11 #include <linux/pci.h>
  12 #include <linux/slab.h>
  13 #include <linux/mutex.h>
  14 #include <linux/export.h>
  15 #include <linux/string.h>
  16 #include <linux/delay.h>
  17 #include <linux/pci-ats.h>
  18 #include "pci.h"
  19
  20 #define VIRTFN_ID_LEN   16
  21
  22 static inline u8 virtfn_bus(struct pci_dev *dev, int id)
  23 {
  24         return dev->bus->number + ((dev->devfn + dev->sriov->offset +
  25                                     dev->sriov->stride * id) >> 8);
  26 }
  27
  28 static inline u8 virtfn_devfn(struct pci_dev *dev, int id)
  29 {
  30         return (dev->devfn + dev->sriov->offset +
  31                 dev->sriov->stride * id) & 0xff;
  32 }
  33
  34 static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr)
  35 {
  36         int rc;
  37         struct pci_bus *child;
  38
  39         if (bus->number == busnr)
  40                 return bus;
  41
  42         child = pci_find_bus(pci_domain_nr(bus), busnr);
  43         if (child)
  44                 return child;
  45
  46         child = pci_add_new_bus(bus, NULL, busnr);
  47         if (!child)
  48                 return NULL;
  49
  50         child->subordinate = busnr;
  51         child->dev.parent = bus->bridge;
  52         rc = pci_bus_add_child(child);
  53         if (rc) {
  54                 pci_remove_bus(child);
  55                 return NULL;
  56         }
  57
  58         return child;
  59 }
  60
  61 static void virtfn_remove_bus(struct pci_bus *bus, int busnr)
  62 {
  63         struct pci_bus *child;
  64
  65         if (bus->number == busnr)
  66                 return;
  67
  68         child = pci_find_bus(pci_domain_nr(bus), busnr);
  69         BUG_ON(!child);
  70
  71         if (list_empty(&child->devices))
  72                 pci_remove_bus(child);
  73 }
  74
  75 static int virtfn_add(struct pci_dev *dev, int id, int reset)
  76 {
  77         int i;
  78         int rc;
  79         u64 size;
  80         char buf[VIRTFN_ID_LEN];
  81         struct pci_dev *virtfn;
  82         struct resource *res;
  83         struct pci_sriov *iov = dev->sriov;
  84
  85         virtfn = alloc_pci_dev();
  86         if (!virtfn)
  87                 return -ENOMEM;
  88
  89         mutex_lock(&iov->dev->sriov->lock);
  90         virtfn->bus = virtfn_add_bus(dev->bus, virtfn_bus(dev, id));
  91         if (!virtfn->bus) {
  92                 kfree(virtfn);
  93                 mutex_unlock(&iov->dev->sriov->lock);
  94                 return -ENOMEM;
  95         }
  96         virtfn->devfn = virtfn_devfn(dev, id);
  97         virtfn->vendor = dev->vendor;
  98         pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_DID, &virtfn->device);
  99         pci_setup_device(virtfn);
 100         virtfn->dev.parent = dev->dev.parent;
 101
 102         for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
 103                 res = dev->resource + PCI_IOV_RESOURCES + i;
 104                 if (!res->parent)
 105                         continue;
 106                 virtfn->resource[i].name = pci_name(virtfn);
 107                 virtfn->resource[i].flags = res->flags;
 108                 size = resource_size(res);
 109                 do_div(size, iov->total);
 110                 virtfn->resource[i].start = res->start + size * id;
 111                 virtfn->resource[i].end = virtfn->resource[i].start + size - 1;
 112                 rc = request_resource(res, &virtfn->resource[i]);
 113                 BUG_ON(rc);
 114         }
 115
 116         if (reset)
 117                 __pci_reset_function(virtfn);
 118
 119         pci_device_add(virtfn, virtfn->bus);
 120         mutex_unlock(&iov->dev->sriov->lock);
 121
 122         virtfn->physfn = pci_dev_get(dev);
 123         virtfn->is_virtfn = 1;
 124
 125         rc = pci_bus_add_device(virtfn);
 126         if (rc)
 127                 goto failed1;
 128         sprintf(buf, "virtfn%u", id);
 129         rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf);
 130         if (rc)
 131                 goto failed1;
 132         rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn");
 133         if (rc)
 134                 goto failed2;
 135
 136         kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE);
 137
 138         return 0;
 139
 140 failed2:
 141         sysfs_remove_link(&dev->dev.kobj, buf);
 142 failed1:
 143         pci_dev_put(dev);
 144         mutex_lock(&iov->dev->sriov->lock);
 145         pci_remove_bus_device(virtfn);
 146         virtfn_remove_bus(dev->bus, virtfn_bus(dev, id));
 147         mutex_unlock(&iov->dev->sriov->lock);
 148
 149         return rc;
 150 }
 151
 152 static void virtfn_remove(struct pci_dev *dev, int id, int reset)
 153 {
 154         char buf[VIRTFN_ID_LEN];
 155         struct pci_bus *bus;
 156         struct pci_dev *virtfn;
 157         struct pci_sriov *iov = dev->sriov;
 158
 159         bus = pci_find_bus(pci_domain_nr(dev->bus), virtfn_bus(dev, id));
 160         if (!bus)
 161                 return;
 162
 163         virtfn = pci_get_slot(bus, virtfn_devfn(dev, id));
 164         if (!virtfn)
 165                 return;
 166
 167         pci_dev_put(virtfn);
 168
 169         if (reset) {
 170                 device_release_driver(&virtfn->dev);
 171                 __pci_reset_function(virtfn);
 172         }
 173
 174         sprintf(buf, "virtfn%u", id);
 175         sysfs_remove_link(&dev->dev.kobj, buf);
 176         sysfs_remove_link(&virtfn->dev.kobj, "physfn");
 177
 178         mutex_lock(&iov->dev->sriov->lock);
 179         pci_remove_bus_device(virtfn);
 180         virtfn_remove_bus(dev->bus, virtfn_bus(dev, id));
 181         mutex_unlock(&iov->dev->sriov->lock);
 182
 183         pci_dev_put(dev);
 184 }
 185
 186 static int sriov_migration(struct pci_dev *dev)
 187 {
 188         u16 status;
 189         struct pci_sriov *iov = dev->sriov;
 190
 191         if (!iov->nr_virtfn)
 192                 return 0;
 193
 194         if (!(iov->cap & PCI_SRIOV_CAP_VFM))
 195                 return 0;
 196
 197         pci_read_config_word(dev, iov->pos + PCI_SRIOV_STATUS, &status);
 198         if (!(status & PCI_SRIOV_STATUS_VFM))
 199                 return 0;
 200
 201         schedule_work(&iov->mtask);
 202
 203         return 1;
 204 }
 205
 206 static void sriov_migration_task(struct work_struct *work)
 207 {
 208         int i;
 209         u8 state;
 210         u16 status;
 211         struct pci_sriov *iov = container_of(work, struct pci_sriov, mtask);
 212
 213         for (i = iov->initial; i < iov->nr_virtfn; i++) {
 214                 state = readb(iov->mstate + i);
 215                 if (state == PCI_SRIOV_VFM_MI) {
 216                         writeb(PCI_SRIOV_VFM_AV, iov->mstate + i);
 217                         state = readb(iov->mstate + i);
 218                         if (state == PCI_SRIOV_VFM_AV)
 219                                 virtfn_add(iov->self, i, 1);
 220                 } else if (state == PCI_SRIOV_VFM_MO) {
 221                         virtfn_remove(iov->self, i, 1);
 222                         writeb(PCI_SRIOV_VFM_UA, iov->mstate + i);
 223                         state = readb(iov->mstate + i);
 224                         if (state == PCI_SRIOV_VFM_AV)
 225                                 virtfn_add(iov->self, i, 0);
 226                 }
 227         }
 228
 229         pci_read_config_word(iov->self, iov->pos + PCI_SRIOV_STATUS, &status);
 230         status &= ~PCI_SRIOV_STATUS_VFM;
 231         pci_write_config_word(iov->self, iov->pos + PCI_SRIOV_STATUS, status);
 232 }
 233
 234 static int sriov_enable_migration(struct pci_dev *dev, int nr_virtfn)
 235 {
 236         int bir;
 237         u32 table;
 238         resource_size_t pa;
 239         struct pci_sriov *iov = dev->sriov;
 240
 241         if (nr_virtfn <= iov->initial)
 242                 return 0;
 243
 244         pci_read_config_dword(dev, iov->pos + PCI_SRIOV_VFM, &table);
 245         bir = PCI_SRIOV_VFM_BIR(table);
 246         if (bir > PCI_STD_RESOURCE_END)
 247                 return -EIO;
 248
 249         table = PCI_SRIOV_VFM_OFFSET(table);
 250         if (table + nr_virtfn > pci_resource_len(dev, bir))
 251                 return -EIO;
 252
 253         pa = pci_resource_start(dev, bir) + table;
 254         iov->mstate = ioremap(pa, nr_virtfn);
 255         if (!iov->mstate)
 256                 return -ENOMEM;
 257
 258         INIT_WORK(&iov->mtask, sriov_migration_task);
 259
 260         iov->ctrl |= PCI_SRIOV_CTRL_VFM | PCI_SRIOV_CTRL_INTR;
 261         pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
 262
 263         return 0;
 264 }
 265
 266 static void sriov_disable_migration(struct pci_dev *dev)
 267 {
 268         struct pci_sriov *iov = dev->sriov;
 269
 270         iov->ctrl &= ~(PCI_SRIOV_CTRL_VFM | PCI_SRIOV_CTRL_INTR);
 271         pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
 272
 273         cancel_work_sync(&iov->mtask);
 274         iounmap(iov->mstate);
 275 }
 276
 277 static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
 278 {
 279         int rc;
 280         int i, j;
 281         int nres;
 282         u16 offset, stride, initial;
 283         struct resource *res;
 284         struct pci_dev *pdev;
 285         struct pci_sriov *iov = dev->sriov;
 286
 287         if (!nr_virtfn)
 288                 return 0;
 289
 290         if (iov->nr_virtfn)
 291                 return -EINVAL;
 292
 293         pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial);
 294         if (initial > iov->total ||
 295             (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total)))
 296                 return -EIO;
 297
 298         if (nr_virtfn < 0 || nr_virtfn > iov->total ||
 299             (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial)))
 300                 return -EINVAL;
 301
 302         pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn);
 303         pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &offset);
 304         pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &stride);
 305         if (!offset || (nr_virtfn > 1 && !stride))
 306                 return -EIO;
 307
 308         nres = 0;
 309         for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
 310                 res = dev->resource + PCI_IOV_RESOURCES + i;
 311                 if (res->parent)
 312                         nres++;
 313         }
 314         if (nres != iov->nres) {
 315                 dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n");
 316                 return -ENOMEM;
 317         }
 318
 319         iov->offset = offset;
 320         iov->stride = stride;
 321
 322         if (virtfn_bus(dev, nr_virtfn - 1) > dev->bus->subordinate) {
 323                 dev_err(&dev->dev, "SR-IOV: bus number out of range\n");
 324                 return -ENOMEM;
 325         }
 326
 327         if (iov->link != dev->devfn) {
 328                 pdev = pci_get_slot(dev->bus, iov->link);
 329                 if (!pdev)
 330                         return -ENODEV;
 331
 332                 pci_dev_put(pdev);
 333
 334                 if (!pdev->is_physfn)
 335                         return -ENODEV;
 336
 337                 rc = sysfs_create_link(&dev->dev.kobj,
 338                                         &pdev->dev.kobj, "dep_link");
 339                 if (rc)
 340                         return rc;
 341         }
 342
 343         iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
 344         pci_block_user_cfg_access(dev);
 345         pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
 346         msleep(100);
 347         pci_unblock_user_cfg_access(dev);
 348
 349         iov->initial = initial;
 350         if (nr_virtfn < initial)
 351                 initial = nr_virtfn;
 352
 353         for (i = 0; i < initial; i++) {
 354                 rc = virtfn_add(dev, i, 0);
 355                 if (rc)
 356                         goto failed;
 357         }
 358
 359         if (iov->cap & PCI_SRIOV_CAP_VFM) {
 360                 rc = sriov_enable_migration(dev, nr_virtfn);
 361                 if (rc)
 362                         goto failed;
 363         }
 364
 365         kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE);
 366         iov->nr_virtfn = nr_virtfn;
 367
 368         return 0;
 369
 370 failed:
 371         for (j = 0; j < i; j++)
 372                 virtfn_remove(dev, j, 0);
 373
 374         iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
 375         pci_block_user_cfg_access(dev);
 376         pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
 377         ssleep(1);
 378         pci_unblock_user_cfg_access(dev);
 379
 380         if (iov->link != dev->devfn)
 381                 sysfs_remove_link(&dev->dev.kobj, "dep_link");
 382
 383         return rc;
 384 }
 385
 386 static void sriov_disable(struct pci_dev *dev)
 387 {
 388         int i;
 389         struct pci_sriov *iov = dev->sriov;
 390
 391         if (!iov->nr_virtfn)
 392                 return;
 393
 394         if (iov->cap & PCI_SRIOV_CAP_VFM)
 395                 sriov_disable_migration(dev);
 396
 397         for (i = 0; i < iov->nr_virtfn; i++)
 398                 virtfn_remove(dev, i, 0);
 399
 400         iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
 401         pci_block_user_cfg_access(dev);
 402         pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
 403         ssleep(1);
 404         pci_unblock_user_cfg_access(dev);
 405
 406         if (iov->link != dev->devfn)
 407                 sysfs_remove_link(&dev->dev.kobj, "dep_link");
 408
 409         iov->nr_virtfn = 0;
 410 }
 411
 412 static int sriov_init(struct pci_dev *dev, int pos)
 413 {
 414         int i;
 415         int rc;
 416         int nres;
 417         u32 pgsz;
 418         u16 ctrl, total, offset, stride;
 419         struct pci_sriov *iov;
 420         struct resource *res;
 421         struct pci_dev *pdev;
 422
 423         if (dev->pcie_type != PCI_EXP_TYPE_RC_END &&
 424             dev->pcie_type != PCI_EXP_TYPE_ENDPOINT)
 425                 return -ENODEV;
 426
 427         pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
 428         if (ctrl & PCI_SRIOV_CTRL_VFE) {
 429                 pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);
 430                 ssleep(1);
 431         }
 432
 433         pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total);
 434         if (!total)
 435                 return 0;
 436
 437         ctrl = 0;
 438         list_for_each_entry(pdev, &dev->bus->devices, bus_list)
 439                 if (pdev->is_physfn)
 440                         goto found;
 441
 442         pdev = NULL;
 443         if (pci_ari_enabled(dev->bus))
 444                 ctrl |= PCI_SRIOV_CTRL_ARI;
 445
 446 found:
 447         pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
 448         pci_write_config_word(dev, pos + PCI_SRIOV_NUM_VF, total);
 449         pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
 450         pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
 451         if (!offset || (total > 1 && !stride))
 452                 return -EIO;
 453
 454         pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz);
 455         i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0;
 456         pgsz &= ~((1 << i) - 1);
 457         if (!pgsz)
 458                 return -EIO;
 459
 460         pgsz &= ~(pgsz - 1);
 461         pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);
 462
 463         nres = 0;
 464         for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
 465                 res = dev->resource + PCI_IOV_RESOURCES + i;
 466                 i += __pci_read_base(dev, pci_bar_unknown, res,
 467                                      pos + PCI_SRIOV_BAR + i * 4);
 468                 if (!res->flags)
 469                         continue;
 470                 if (resource_size(res) & (PAGE_SIZE - 1)) {
 471                         rc = -EIO;
 472                         goto failed;
 473                 }
 474                 res->end = res->start + resource_size(res) * total - 1;
 475                 nres++;
 476         }
 477
 478         iov = kzalloc(sizeof(*iov), GFP_KERNEL);
 479         if (!iov) {
 480                 rc = -ENOMEM;
 481                 goto failed;
 482         }
 483
 484         iov->pos = pos;
 485         iov->nres = nres;
 486         iov->ctrl = ctrl;
 487         iov->total = total;
 488         iov->offset = offset;
 489         iov->stride = stride;
 490         iov->pgsz = pgsz;
 491         iov->self = dev;
 492         pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
 493         pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
 494         if (dev->pcie_type == PCI_EXP_TYPE_RC_END)
 495                 iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link);
 496
 497         if (pdev)
 498                 iov->dev = pci_dev_get(pdev);
 499         else
 500                 iov->dev = dev;
 501
 502         mutex_init(&iov->lock);
 503
 504         dev->sriov = iov;
 505         dev->is_physfn = 1;
 506
 507         return 0;
 508
 509 failed:
 510         for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
 511                 res = dev->resource + PCI_IOV_RESOURCES + i;
 512                 res->flags = 0;
 513         }
 514
 515         return rc;
 516 }
 517
 518 static void sriov_release(struct pci_dev *dev)
 519 {
 520         BUG_ON(dev->sriov->nr_virtfn);
 521
 522         if (dev != dev->sriov->dev)
 523                 pci_dev_put(dev->sriov->dev);
 524
 525         mutex_destroy(&dev->sriov->lock);
 526
 527         kfree(dev->sriov);
 528         dev->sriov = NULL;
 529 }
 530
 531 static void sriov_restore_state(struct pci_dev *dev)
 532 {
 533         int i;
 534         u16 ctrl;
 535         struct pci_sriov *iov = dev->sriov;
 536
 537         pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl);
 538         if (ctrl & PCI_SRIOV_CTRL_VFE)
 539                 return;
 540
 541         for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++)
 542                 pci_update_resource(dev, i);
 543
 544         pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
 545         pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, iov->nr_virtfn);
 546         pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
 547         if (iov->ctrl & PCI_SRIOV_CTRL_VFE)
 548                 msleep(100);
 549 }
 550
 551 /**
 552  * pci_iov_init - initialize the IOV capability
 553  * @dev: the PCI device
 554  *
 555  * Returns 0 on success, or negative on failure.
 556  */
 557 int pci_iov_init(struct pci_dev *dev)
 558 {
 559         int pos;
 560
 561         if (!pci_is_pcie(dev))
 562                 return -ENODEV;
 563
 564         pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
 565         if (pos)
 566                 return sriov_init(dev, pos);
 567
 568         return -ENODEV;
 569 }
 570
 571 /**
 572  * pci_iov_release - release resources used by the IOV capability
 573  * @dev: the PCI device
 574  */
 575 void pci_iov_release(struct pci_dev *dev)
 576 {
 577         if (dev->is_physfn)
 578                 sriov_release(dev);
 579 }
 580
 581 /**
 582  * pci_iov_resource_bar - get position of the SR-IOV BAR
 583  * @dev: the PCI device
 584  * @resno: the resource number
 585  * @type: the BAR type to be filled in
 586  *
 587  * Returns position of the BAR encapsulated in the SR-IOV capability.
 588  */
 589 int pci_iov_resource_bar(struct pci_dev *dev, int resno,
 590                          enum pci_bar_type *type)
 591 {
 592         if (resno < PCI_IOV_RESOURCES || resno > PCI_IOV_RESOURCE_END)
 593                 return 0;
 594
 595         BUG_ON(!dev->is_physfn);
 596
 597         *type = pci_bar_unknown;
 598
 599         return dev->sriov->pos + PCI_SRIOV_BAR +
 600                 4 * (resno - PCI_IOV_RESOURCES);
 601 }
 602
 603 /**
 604  * pci_sriov_resource_alignment - get resource alignment for VF BAR
 605  * @dev: the PCI device
 606  * @resno: the resource number
 607  *
 608  * Returns the alignment of the VF BAR found in the SR-IOV capability.
 609  * This is not the same as the resource size which is defined as
 610  * the VF BAR size multiplied by the number of VFs.  The alignment
 611  * is just the VF BAR size.
 612  */
 613 resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno)
 614 {
 615         struct resource tmp;
 616         enum pci_bar_type type;
 617         int reg = pci_iov_resource_bar(dev, resno, &type);
 618
 619         if (!reg)
 620                 return 0;
 621
 622          __pci_read_base(dev, type, &tmp, reg);
 623         return resource_alignment(&tmp);
 624 }
 625
 626 /**
 627  * pci_restore_iov_state - restore the state of the IOV capability
 628  * @dev: the PCI device
 629  */
 630 void pci_restore_iov_state(struct pci_dev *dev)
 631 {
 632         if (dev->is_physfn)
 633                 sriov_restore_state(dev);
 634 }
 635
 636 /**
 637  * pci_iov_bus_range - find bus range used by Virtual Function
 638  * @bus: the PCI bus
 639  *
 640  * Returns max number of buses (exclude current one) used by Virtual
 641  * Functions.
 642  */
 643 int pci_iov_bus_range(struct pci_bus *bus)
 644 {
 645         int max = 0;
 646         u8 busnr;
 647         struct pci_dev *dev;
 648
 649         list_for_each_entry(dev, &bus->devices, bus_list) {
 650                 if (!dev->is_physfn)
 651                         continue;
 652                 busnr = virtfn_bus(dev, dev->sriov->total - 1);
 653                 if (busnr > max)
 654                         max = busnr;
 655         }
 656
 657         return max ? max - bus->number : 0;
 658 }
 659
 660 /**
 661  * pci_enable_sriov - enable the SR-IOV capability
 662  * @dev: the PCI device
 663  * @nr_virtfn: number of virtual functions to enable
 664  *
 665  * Returns 0 on success, or negative on failure.
 666  */
 667 int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
 668 {
 669         might_sleep();
 670
 671         if (!dev->is_physfn)
 672                 return -ENODEV;
 673
 674         return sriov_enable(dev, nr_virtfn);
 675 }
 676 EXPORT_SYMBOL_GPL(pci_enable_sriov);
 677
 678 /**
 679  * pci_disable_sriov - disable the SR-IOV capability
 680  * @dev: the PCI device
 681  */
 682 void pci_disable_sriov(struct pci_dev *dev)
 683 {
 684         might_sleep();
 685
 686         if (!dev->is_physfn)
 687                 return;
 688
 689         sriov_disable(dev);
 690 }
 691 EXPORT_SYMBOL_GPL(pci_disable_sriov);
 692
 693 /**
 694  * pci_sriov_migration - notify SR-IOV core of Virtual Function Migration
 695  * @dev: the PCI device
 696  *
 697  * Returns IRQ_HANDLED if the IRQ is handled, or IRQ_NONE if not.
 698  *
 699  * Physical Function driver is responsible to register IRQ handler using
 700  * VF Migration Interrupt Message Number, and call this function when the
 701  * interrupt is generated by the hardware.
 702  */
 703 irqreturn_t pci_sriov_migration(struct pci_dev *dev)
 704 {
 705         if (!dev->is_physfn)
 706                 return IRQ_NONE;
 707
 708         return sriov_migration(dev) ? IRQ_HANDLED : IRQ_NONE;
 709 }
 710 EXPORT_SYMBOL_GPL(pci_sriov_migration);
 711
 712 /**
 713  * pci_num_vf - return number of VFs associated with a PF device_release_driver
 714  * @dev: the PCI device
 715  *
 716  * Returns number of VFs, or 0 if SR-IOV is not enabled.
 717  */
 718 int pci_num_vf(struct pci_dev *dev)
 719 {
 720         if (!dev || !dev->is_physfn)
 721                 return 0;
 722         else
 723                 return dev->sriov->nr_virtfn;
 724 }
 725 EXPORT_SYMBOL_GPL(pci_num_vf);
 726
 727 static int ats_alloc_one(struct pci_dev *dev, int ps)
 728 {
 729         int pos;
 730         u16 cap;
 731         struct pci_ats *ats;
 732
 733         pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ATS);
 734         if (!pos)
 735                 return -ENODEV;
 736
 737         ats = kzalloc(sizeof(*ats), GFP_KERNEL);
 738         if (!ats)
 739                 return -ENOMEM;
 740
 741         ats->pos = pos;
 742         ats->stu = ps;
 743         pci_read_config_word(dev, pos + PCI_ATS_CAP, &cap);
 744         ats->qdep = PCI_ATS_CAP_QDEP(cap) ? PCI_ATS_CAP_QDEP(cap) :
 745                                             PCI_ATS_MAX_QDEP;
 746         dev->ats = ats;
 747
 748         return 0;
 749 }
 750
 751 static void ats_free_one(struct pci_dev *dev)
 752 {
 753         kfree(dev->ats);
 754         dev->ats = NULL;
 755 }
 756
 757 /**
 758  * pci_enable_ats - enable the ATS capability
 759  * @dev: the PCI device
 760  * @ps: the IOMMU page shift
 761  *
 762  * Returns 0 on success, or negative on failure.
 763  */
 764 int pci_enable_ats(struct pci_dev *dev, int ps)
 765 {
 766         int rc;
 767         u16 ctrl;
 768
 769         BUG_ON(dev->ats && dev->ats->is_enabled);
 770
 771         if (ps < PCI_ATS_MIN_STU)
 772                 return -EINVAL;
 773
 774         if (dev->is_physfn || dev->is_virtfn) {
 775                 struct pci_dev *pdev = dev->is_physfn ? dev : dev->physfn;
 776
 777                 mutex_lock(&pdev->sriov->lock);
 778                 if (pdev->ats)
 779                         rc = pdev->ats->stu == ps ? 0 : -EINVAL;
 780                 else
 781                         rc = ats_alloc_one(pdev, ps);
 782
 783                 if (!rc)
 784                         pdev->ats->ref_cnt++;
 785                 mutex_unlock(&pdev->sriov->lock);
 786                 if (rc)
 787                         return rc;
 788         }
 789
 790         if (!dev->is_physfn) {
 791                 rc = ats_alloc_one(dev, ps);
 792                 if (rc)
 793                         return rc;
 794         }
 795
 796         ctrl = PCI_ATS_CTRL_ENABLE;
 797         if (!dev->is_virtfn)
 798                 ctrl |= PCI_ATS_CTRL_STU(ps - PCI_ATS_MIN_STU);
 799         pci_write_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, ctrl);
 800
 801         dev->ats->is_enabled = 1;
 802
 803         return 0;
 804 }
 805
 806 /**
 807  * pci_disable_ats - disable the ATS capability
 808  * @dev: the PCI device
 809  */
 810 void pci_disable_ats(struct pci_dev *dev)
 811 {
 812         u16 ctrl;
 813
 814         BUG_ON(!dev->ats || !dev->ats->is_enabled);
 815
 816         pci_read_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, &ctrl);
 817         ctrl &= ~PCI_ATS_CTRL_ENABLE;
 818         pci_write_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, ctrl);
 819
 820         dev->ats->is_enabled = 0;
 821
 822         if (dev->is_physfn || dev->is_virtfn) {
 823                 struct pci_dev *pdev = dev->is_physfn ? dev : dev->physfn;
 824
 825                 mutex_lock(&pdev->sriov->lock);
 826                 pdev->ats->ref_cnt--;
 827                 if (!pdev->ats->ref_cnt)
 828                         ats_free_one(pdev);
 829                 mutex_unlock(&pdev->sriov->lock);
 830         }
 831
 832         if (!dev->is_physfn)
 833                 ats_free_one(dev);
 834 }
 835
 836 /**
 837  * pci_ats_queue_depth - query the ATS Invalidate Queue Depth
 838  * @dev: the PCI device
 839  *
 840  * Returns the queue depth on success, or negative on failure.
 841  *
 842  * The ATS spec uses 0 in the Invalidate Queue Depth field to
 843  * indicate that the function can accept 32 Invalidate Request.
 844  * But here we use the `real' values (i.e. 1~32) for the Queue
 845  * Depth; and 0 indicates the function shares the Queue with
 846  * other functions (doesn't exclusively own a Queue).
 847  */
 848 int pci_ats_queue_depth(struct pci_dev *dev)
 849 {
 850         int pos;
 851         u16 cap;
 852
 853         if (dev->is_virtfn)
 854                 return 0;
 855
 856         if (dev->ats)
 857                 return dev->ats->qdep;
 858
 859         pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ATS);
 860         if (!pos)
 861                 return -ENODEV;
 862
 863         pci_read_config_word(dev, pos + PCI_ATS_CAP, &cap);
 864
 865         return PCI_ATS_CAP_QDEP(cap) ? PCI_ATS_CAP_QDEP(cap) :
 866                                        PCI_ATS_MAX_QDEP;
 867 }