drivers/net/wireless/iwlwifi/iwl-agn-ucode.c

   1 /******************************************************************************
   2  *
   3  * GPL LICENSE SUMMARY
   4  *
   5  * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of version 2 of the GNU General Public License as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful, but
  12  * WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19  * USA
  20  *
  21  * The full GNU General Public License is included in this distribution
  22  * in the file called LICENSE.GPL.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #include <linux/kernel.h>
  31 #include <linux/module.h>
  32 #include <linux/init.h>
  33 #include <linux/sched.h>
  34
  35 #include "iwl-dev.h"
  36 #include "iwl-core.h"
  37 #include "iwl-io.h"
  38 #include "iwl-helpers.h"
  39 #include "iwl-agn-hw.h"
  40 #include "iwl-agn.h"
  41 #include "iwl-agn-calib.h"
  42 #include "iwl-trans.h"
  43
  44 static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = {
  45         {COEX_CU_UNASSOC_IDLE_RP, COEX_CU_UNASSOC_IDLE_WP,
  46          0, COEX_UNASSOC_IDLE_FLAGS},
  47         {COEX_CU_UNASSOC_MANUAL_SCAN_RP, COEX_CU_UNASSOC_MANUAL_SCAN_WP,
  48          0, COEX_UNASSOC_MANUAL_SCAN_FLAGS},
  49         {COEX_CU_UNASSOC_AUTO_SCAN_RP, COEX_CU_UNASSOC_AUTO_SCAN_WP,
  50          0, COEX_UNASSOC_AUTO_SCAN_FLAGS},
  51         {COEX_CU_CALIBRATION_RP, COEX_CU_CALIBRATION_WP,
  52          0, COEX_CALIBRATION_FLAGS},
  53         {COEX_CU_PERIODIC_CALIBRATION_RP, COEX_CU_PERIODIC_CALIBRATION_WP,
  54          0, COEX_PERIODIC_CALIBRATION_FLAGS},
  55         {COEX_CU_CONNECTION_ESTAB_RP, COEX_CU_CONNECTION_ESTAB_WP,
  56          0, COEX_CONNECTION_ESTAB_FLAGS},
  57         {COEX_CU_ASSOCIATED_IDLE_RP, COEX_CU_ASSOCIATED_IDLE_WP,
  58          0, COEX_ASSOCIATED_IDLE_FLAGS},
  59         {COEX_CU_ASSOC_MANUAL_SCAN_RP, COEX_CU_ASSOC_MANUAL_SCAN_WP,
  60          0, COEX_ASSOC_MANUAL_SCAN_FLAGS},
  61         {COEX_CU_ASSOC_AUTO_SCAN_RP, COEX_CU_ASSOC_AUTO_SCAN_WP,
  62          0, COEX_ASSOC_AUTO_SCAN_FLAGS},
  63         {COEX_CU_ASSOC_ACTIVE_LEVEL_RP, COEX_CU_ASSOC_ACTIVE_LEVEL_WP,
  64          0, COEX_ASSOC_ACTIVE_LEVEL_FLAGS},
  65         {COEX_CU_RF_ON_RP, COEX_CU_RF_ON_WP, 0, COEX_CU_RF_ON_FLAGS},
  66         {COEX_CU_RF_OFF_RP, COEX_CU_RF_OFF_WP, 0, COEX_RF_OFF_FLAGS},
  67         {COEX_CU_STAND_ALONE_DEBUG_RP, COEX_CU_STAND_ALONE_DEBUG_WP,
  68          0, COEX_STAND_ALONE_DEBUG_FLAGS},
  69         {COEX_CU_IPAN_ASSOC_LEVEL_RP, COEX_CU_IPAN_ASSOC_LEVEL_WP,
  70          0, COEX_IPAN_ASSOC_LEVEL_FLAGS},
  71         {COEX_CU_RSRVD1_RP, COEX_CU_RSRVD1_WP, 0, COEX_RSRVD1_FLAGS},
  72         {COEX_CU_RSRVD2_RP, COEX_CU_RSRVD2_WP, 0, COEX_RSRVD2_FLAGS}
  73 };
  74
  75 /*
  76  * ucode
  77  */
  78 static int iwlagn_load_section(struct iwl_priv *priv, const char *name,
  79                                 struct fw_desc *image, u32 dst_addr)
  80 {
  81         dma_addr_t phy_addr = image->p_addr;
  82         u32 byte_cnt = image->len;
  83         int ret;
  84
  85         priv->ucode_write_complete = 0;
  86
  87         iwl_write_direct32(priv,
  88                 FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),
  89                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE);
  90
  91         iwl_write_direct32(priv,
  92                 FH_SRVC_CHNL_SRAM_ADDR_REG(FH_SRVC_CHNL), dst_addr);
  93
  94         iwl_write_direct32(priv,
  95                 FH_TFDIB_CTRL0_REG(FH_SRVC_CHNL),
  96                 phy_addr & FH_MEM_TFDIB_DRAM_ADDR_LSB_MSK);
  97
  98         iwl_write_direct32(priv,
  99                 FH_TFDIB_CTRL1_REG(FH_SRVC_CHNL),
 100                 (iwl_get_dma_hi_addr(phy_addr)
 101                         << FH_MEM_TFDIB_REG1_ADDR_BITSHIFT) | byte_cnt);
 102
 103         iwl_write_direct32(priv,
 104                 FH_TCSR_CHNL_TX_BUF_STS_REG(FH_SRVC_CHNL),
 105                 1 << FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_NUM |
 106                 1 << FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_IDX |
 107                 FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID);
 108
 109         iwl_write_direct32(priv,
 110                 FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),
 111                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE       |
 112                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE    |
 113                 FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD);
 114
 115         IWL_DEBUG_FW(priv, "%s uCode section being loaded...\n", name);
 116         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
 117                                         priv->ucode_write_complete, 5 * HZ);
 118         if (ret == -ERESTARTSYS) {
 119                 IWL_ERR(priv, "Could not load the %s uCode section due "
 120                         "to interrupt\n", name);
 121                 return ret;
 122         }
 123         if (!ret) {
 124                 IWL_ERR(priv, "Could not load the %s uCode section\n",
 125                         name);
 126                 return -ETIMEDOUT;
 127         }
 128
 129         return 0;
 130 }
 131
 132 static int iwlagn_load_given_ucode(struct iwl_priv *priv,
 133                                    struct fw_img *image)
 134 {
 135         int ret = 0;
 136
 137         ret = iwlagn_load_section(priv, "INST", &image->code,
 138                                    IWLAGN_RTC_INST_LOWER_BOUND);
 139         if (ret)
 140                 return ret;
 141
 142         return iwlagn_load_section(priv, "DATA", &image->data,
 143                                     IWLAGN_RTC_DATA_LOWER_BOUND);
 144 }
 145
 146 /*
 147  *  Calibration
 148  */
 149 static int iwlagn_set_Xtal_calib(struct iwl_priv *priv)
 150 {
 151         struct iwl_calib_xtal_freq_cmd cmd;
 152         __le16 *xtal_calib =
 153                 (__le16 *)iwl_eeprom_query_addr(priv, EEPROM_XTAL);
 154
 155         iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD);
 156         cmd.cap_pin1 = le16_to_cpu(xtal_calib[0]);
 157         cmd.cap_pin2 = le16_to_cpu(xtal_calib[1]);
 158         return iwl_calib_set(&priv->calib_results[IWL_CALIB_XTAL],
 159                              (u8 *)&cmd, sizeof(cmd));
 160 }
 161
 162 static int iwlagn_set_temperature_offset_calib(struct iwl_priv *priv)
 163 {
 164         struct iwl_calib_temperature_offset_cmd cmd;
 165         __le16 *offset_calib =
 166                 (__le16 *)iwl_eeprom_query_addr(priv, EEPROM_TEMPERATURE);
 167
 168         memset(&cmd, 0, sizeof(cmd));
 169         iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD);
 170         memcpy(&cmd.radio_sensor_offset, offset_calib, sizeof(offset_calib));
 171         if (!(cmd.radio_sensor_offset))
 172                 cmd.radio_sensor_offset = DEFAULT_RADIO_SENSOR_OFFSET;
 173
 174         IWL_DEBUG_CALIB(priv, "Radio sensor offset: %d\n",
 175                         le16_to_cpu(cmd.radio_sensor_offset));
 176         return iwl_calib_set(&priv->calib_results[IWL_CALIB_TEMP_OFFSET],
 177                              (u8 *)&cmd, sizeof(cmd));
 178 }
 179
 180 static int iwlagn_send_calib_cfg(struct iwl_priv *priv)
 181 {
 182         struct iwl_calib_cfg_cmd calib_cfg_cmd;
 183         struct iwl_host_cmd cmd = {
 184                 .id = CALIBRATION_CFG_CMD,
 185                 .len = { sizeof(struct iwl_calib_cfg_cmd), },
 186                 .data = { &calib_cfg_cmd, },
 187         };
 188
 189         memset(&calib_cfg_cmd, 0, sizeof(calib_cfg_cmd));
 190         calib_cfg_cmd.ucd_calib_cfg.once.is_enable = IWL_CALIB_INIT_CFG_ALL;
 191         calib_cfg_cmd.ucd_calib_cfg.once.start = IWL_CALIB_INIT_CFG_ALL;
 192         calib_cfg_cmd.ucd_calib_cfg.once.send_res = IWL_CALIB_INIT_CFG_ALL;
 193         calib_cfg_cmd.ucd_calib_cfg.flags =
 194                 IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK;
 195
 196         return trans_send_cmd(&priv->trans, &cmd);
 197 }
 198
 199 void iwlagn_rx_calib_result(struct iwl_priv *priv,
 200                              struct iwl_rx_mem_buffer *rxb)
 201 {
 202         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 203         struct iwl_calib_hdr *hdr = (struct iwl_calib_hdr *)pkt->u.raw;
 204         int len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
 205         int index;
 206
 207         /* reduce the size of the length field itself */
 208         len -= 4;
 209
 210         /* Define the order in which the results will be sent to the runtime
 211          * uCode. iwl_send_calib_results sends them in a row according to
 212          * their index. We sort them here
 213          */
 214         switch (hdr->op_code) {
 215         case IWL_PHY_CALIBRATE_DC_CMD:
 216                 index = IWL_CALIB_DC;
 217                 break;
 218         case IWL_PHY_CALIBRATE_LO_CMD:
 219                 index = IWL_CALIB_LO;
 220                 break;
 221         case IWL_PHY_CALIBRATE_TX_IQ_CMD:
 222                 index = IWL_CALIB_TX_IQ;
 223                 break;
 224         case IWL_PHY_CALIBRATE_TX_IQ_PERD_CMD:
 225                 index = IWL_CALIB_TX_IQ_PERD;
 226                 break;
 227         case IWL_PHY_CALIBRATE_BASE_BAND_CMD:
 228                 index = IWL_CALIB_BASE_BAND;
 229                 break;
 230         default:
 231                 IWL_ERR(priv, "Unknown calibration notification %d\n",
 232                           hdr->op_code);
 233                 return;
 234         }
 235         iwl_calib_set(&priv->calib_results[index], pkt->u.raw, len);
 236 }
 237
 238 int iwlagn_init_alive_start(struct iwl_priv *priv)
 239 {
 240         int ret;
 241
 242         if (priv->cfg->bt_params &&
 243             priv->cfg->bt_params->advanced_bt_coexist) {
 244                 /*
 245                  * Tell uCode we are ready to perform calibration
 246                  * need to perform this before any calibration
 247                  * no need to close the envlope since we are going
 248                  * to load the runtime uCode later.
 249                  */
 250                 ret = iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_OPEN,
 251                         BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
 252                 if (ret)
 253                         return ret;
 254
 255         }
 256
 257         ret = iwlagn_send_calib_cfg(priv);
 258         if (ret)
 259                 return ret;
 260
 261         /**
 262          * temperature offset calibration is only needed for runtime ucode,
 263          * so prepare the value now.
 264          */
 265         if (priv->cfg->need_temp_offset_calib)
 266                 return iwlagn_set_temperature_offset_calib(priv);
 267
 268         return 0;
 269 }
 270
 271 static int iwlagn_send_wimax_coex(struct iwl_priv *priv)
 272 {
 273         struct iwl_wimax_coex_cmd coex_cmd;
 274
 275         if (priv->cfg->base_params->support_wimax_coexist) {
 276                 /* UnMask wake up src at associated sleep */
 277                 coex_cmd.flags = COEX_FLAGS_ASSOC_WA_UNMASK_MSK;
 278
 279                 /* UnMask wake up src at unassociated sleep */
 280                 coex_cmd.flags |= COEX_FLAGS_UNASSOC_WA_UNMASK_MSK;
 281                 memcpy(coex_cmd.sta_prio, cu_priorities,
 282                         sizeof(struct iwl_wimax_coex_event_entry) *
 283                          COEX_NUM_OF_EVENTS);
 284
 285                 /* enabling the coexistence feature */
 286                 coex_cmd.flags |= COEX_FLAGS_COEX_ENABLE_MSK;
 287
 288                 /* enabling the priorities tables */
 289                 coex_cmd.flags |= COEX_FLAGS_STA_TABLE_VALID_MSK;
 290         } else {
 291                 /* coexistence is disabled */
 292                 memset(&coex_cmd, 0, sizeof(coex_cmd));
 293         }
 294         return trans_send_cmd_pdu(&priv->trans,
 295                                 COEX_PRIORITY_TABLE_CMD, CMD_SYNC,
 296                                 sizeof(coex_cmd), &coex_cmd);
 297 }
 298
 299 static const u8 iwlagn_bt_prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX] = {
 300         ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 301                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 302         ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 303                 (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 304         ((BT_COEX_PRIO_TBL_PRIO_LOW << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 305                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 306         ((BT_COEX_PRIO_TBL_PRIO_LOW << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 307                 (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 308         ((BT_COEX_PRIO_TBL_PRIO_HIGH << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 309                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 310         ((BT_COEX_PRIO_TBL_PRIO_HIGH << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 311                 (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 312         ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 313                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 314         ((BT_COEX_PRIO_TBL_PRIO_COEX_OFF << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 315                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 316         ((BT_COEX_PRIO_TBL_PRIO_COEX_ON << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 317                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 318         0, 0, 0, 0, 0, 0, 0
 319 };
 320
 321 void iwlagn_send_prio_tbl(struct iwl_priv *priv)
 322 {
 323         struct iwl_bt_coex_prio_table_cmd prio_tbl_cmd;
 324
 325         memcpy(prio_tbl_cmd.prio_tbl, iwlagn_bt_prio_tbl,
 326                 sizeof(iwlagn_bt_prio_tbl));
 327         if (trans_send_cmd_pdu(&priv->trans,
 328                                 REPLY_BT_COEX_PRIO_TABLE, CMD_SYNC,
 329                                 sizeof(prio_tbl_cmd), &prio_tbl_cmd))
 330                 IWL_ERR(priv, "failed to send BT prio tbl command\n");
 331 }
 332
 333 int iwlagn_send_bt_env(struct iwl_priv *priv, u8 action, u8 type)
 334 {
 335         struct iwl_bt_coex_prot_env_cmd env_cmd;
 336         int ret;
 337
 338         env_cmd.action = action;
 339         env_cmd.type = type;
 340         ret = trans_send_cmd_pdu(&priv->trans,
 341                                REPLY_BT_COEX_PROT_ENV, CMD_SYNC,
 342                                sizeof(env_cmd), &env_cmd);
 343         if (ret)
 344                 IWL_ERR(priv, "failed to send BT env command\n");
 345         return ret;
 346 }
 347
 348
 349 static int iwlagn_alive_notify(struct iwl_priv *priv)
 350 {
 351         int ret;
 352
 353         trans_tx_start(&priv->trans);
 354
 355         ret = iwlagn_send_wimax_coex(priv);
 356         if (ret)
 357                 return ret;
 358
 359         ret = iwlagn_set_Xtal_calib(priv);
 360         if (ret)
 361                 return ret;
 362
 363         return iwl_send_calib_results(priv);
 364 }
 365
 366
 367 /**
 368  * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
 369  *   using sample data 100 bytes apart.  If these sample points are good,
 370  *   it's a pretty good bet that everything between them is good, too.
 371  */
 372 static int iwlcore_verify_inst_sparse(struct iwl_priv *priv,
 373                                       struct fw_desc *fw_desc)
 374 {
 375         __le32 *image = (__le32 *)fw_desc->v_addr;
 376         u32 len = fw_desc->len;
 377         u32 val;
 378         u32 i;
 379
 380         IWL_DEBUG_FW(priv, "ucode inst image size is %u\n", len);
 381
 382         for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
 383                 /* read data comes through single port, auto-incr addr */
 384                 /* NOTE: Use the debugless read so we don't flood kernel log
 385                  * if IWL_DL_IO is set */
 386                 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
 387                         i + IWLAGN_RTC_INST_LOWER_BOUND);
 388                 val = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
 389                 if (val != le32_to_cpu(*image))
 390                         return -EIO;
 391         }
 392
 393         return 0;
 394 }
 395
 396 static void iwl_print_mismatch_inst(struct iwl_priv *priv,
 397                                     struct fw_desc *fw_desc)
 398 {
 399         __le32 *image = (__le32 *)fw_desc->v_addr;
 400         u32 len = fw_desc->len;
 401         u32 val;
 402         u32 offs;
 403         int errors = 0;
 404
 405         IWL_DEBUG_FW(priv, "ucode inst image size is %u\n", len);
 406
 407         iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
 408                            IWLAGN_RTC_INST_LOWER_BOUND);
 409
 410         for (offs = 0;
 411              offs < len && errors < 20;
 412              offs += sizeof(u32), image++) {
 413                 /* read data comes through single port, auto-incr addr */
 414                 val = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
 415                 if (val != le32_to_cpu(*image)) {
 416                         IWL_ERR(priv, "uCode INST section at "
 417                                 "offset 0x%x, is 0x%x, s/b 0x%x\n",
 418                                 offs, val, le32_to_cpu(*image));
 419                         errors++;
 420                 }
 421         }
 422 }
 423
 424 /**
 425  * iwl_verify_ucode - determine which instruction image is in SRAM,
 426  *    and verify its contents
 427  */
 428 static int iwl_verify_ucode(struct iwl_priv *priv, struct fw_img *img)
 429 {
 430         if (!iwlcore_verify_inst_sparse(priv, &img->code)) {
 431                 IWL_DEBUG_FW(priv, "uCode is good in inst SRAM\n");
 432                 return 0;
 433         }
 434
 435         IWL_ERR(priv, "UCODE IMAGE IN INSTRUCTION SRAM NOT VALID!!\n");
 436
 437         iwl_print_mismatch_inst(priv, &img->code);
 438         return -EIO;
 439 }
 440
 441 struct iwlagn_alive_data {
 442         bool valid;
 443         u8 subtype;
 444 };
 445
 446 static void iwlagn_alive_fn(struct iwl_priv *priv,
 447                             struct iwl_rx_packet *pkt,
 448                             void *data)
 449 {
 450         struct iwlagn_alive_data *alive_data = data;
 451         struct iwl_alive_resp *palive;
 452
 453         palive = &pkt->u.alive_frame;
 454
 455         IWL_DEBUG_FW(priv, "Alive ucode status 0x%08X revision "
 456                        "0x%01X 0x%01X\n",
 457                        palive->is_valid, palive->ver_type,
 458                        palive->ver_subtype);
 459
 460         priv->device_pointers.error_event_table =
 461                 le32_to_cpu(palive->error_event_table_ptr);
 462         priv->device_pointers.log_event_table =
 463                 le32_to_cpu(palive->log_event_table_ptr);
 464
 465         alive_data->subtype = palive->ver_subtype;
 466         alive_data->valid = palive->is_valid == UCODE_VALID_OK;
 467 }
 468
 469 #define UCODE_ALIVE_TIMEOUT     HZ
 470 #define UCODE_CALIB_TIMEOUT     (2*HZ)
 471
 472 int iwlagn_load_ucode_wait_alive(struct iwl_priv *priv,
 473                                  struct fw_img *image,
 474                                  enum iwlagn_ucode_type ucode_type)
 475 {
 476         struct iwl_notification_wait alive_wait;
 477         struct iwlagn_alive_data alive_data;
 478         int ret;
 479         enum iwlagn_ucode_type old_type;
 480
 481         ret = trans_start_device(&priv->trans);
 482         if (ret)
 483                 return ret;
 484
 485         iwlagn_init_notification_wait(priv, &alive_wait, REPLY_ALIVE,
 486                                       iwlagn_alive_fn, &alive_data);
 487
 488         old_type = priv->ucode_type;
 489         priv->ucode_type = ucode_type;
 490
 491         ret = iwlagn_load_given_ucode(priv, image);
 492         if (ret) {
 493                 priv->ucode_type = old_type;
 494                 iwlagn_remove_notification(priv, &alive_wait);
 495                 return ret;
 496         }
 497
 498         trans_kick_nic(&priv->trans);
 499
 500         /*
 501          * Some things may run in the background now, but we
 502          * just wait for the ALIVE notification here.
 503          */
 504         ret = iwlagn_wait_notification(priv, &alive_wait, UCODE_ALIVE_TIMEOUT);
 505         if (ret) {
 506                 priv->ucode_type = old_type;
 507                 return ret;
 508         }
 509
 510         if (!alive_data.valid) {
 511                 IWL_ERR(priv, "Loaded ucode is not valid!\n");
 512                 priv->ucode_type = old_type;
 513                 return -EIO;
 514         }
 515
 516         /*
 517          * This step takes a long time (60-80ms!!) and
 518          * WoWLAN image should be loaded quickly, so
 519          * skip it for WoWLAN.
 520          */
 521         if (ucode_type != IWL_UCODE_WOWLAN) {
 522                 ret = iwl_verify_ucode(priv, image);
 523                 if (ret) {
 524                         priv->ucode_type = old_type;
 525                         return ret;
 526                 }
 527
 528                 /* delay a bit to give rfkill time to run */
 529                 msleep(5);
 530         }
 531
 532         ret = iwlagn_alive_notify(priv);
 533         if (ret) {
 534                 IWL_WARN(priv,
 535                         "Could not complete ALIVE transition: %d\n", ret);
 536                 priv->ucode_type = old_type;
 537                 return ret;
 538         }
 539
 540         return 0;
 541 }
 542
 543 int iwlagn_run_init_ucode(struct iwl_priv *priv)
 544 {
 545         struct iwl_notification_wait calib_wait;
 546         int ret;
 547
 548         lockdep_assert_held(&priv->mutex);
 549
 550         /* No init ucode required? Curious, but maybe ok */
 551         if (!priv->ucode_init.code.len)
 552                 return 0;
 553
 554         if (priv->ucode_type != IWL_UCODE_NONE)
 555                 return 0;
 556
 557         iwlagn_init_notification_wait(priv, &calib_wait,
 558                                       CALIBRATION_COMPLETE_NOTIFICATION,
 559                                       NULL, NULL);
 560
 561         /* Will also start the device */
 562         ret = iwlagn_load_ucode_wait_alive(priv, &priv->ucode_init,
 563                                            IWL_UCODE_INIT);
 564         if (ret)
 565                 goto error;
 566
 567         ret = iwlagn_init_alive_start(priv);
 568         if (ret)
 569                 goto error;
 570
 571         /*
 572          * Some things may run in the background now, but we
 573          * just wait for the calibration complete notification.
 574          */
 575         ret = iwlagn_wait_notification(priv, &calib_wait, UCODE_CALIB_TIMEOUT);
 576
 577         goto out;
 578
 579  error:
 580         iwlagn_remove_notification(priv, &calib_wait);
 581  out:
 582         /* Whatever happened, stop the device */
 583         trans_stop_device(&priv->trans);
 584         return ret;
 585 }