Merge branch 'kvm-updates/2.6.36' of git://git.kernel.org/pub/scm/virt/kvm/kvm
[linux-2.6/next.git] / arch / powerpc / platforms / 86xx / gef_gpio.c
blob4ff7b1e7bbada2917bfd89e2950ac0c178f6a554
1 /*
2 * Driver for GE FPGA based GPIO
4 * Author: Martyn Welch <martyn.welch@ge.com>
6 * 2008 (c) GE Intelligent Platforms Embedded Systems, Inc.
8 * This file is licensed under the terms of the GNU General Public License
9 * version 2. This program is licensed "as is" without any warranty of any
10 * kind, whether express or implied.
13 /* TODO
15 * Configuration of output modes (totem-pole/open-drain)
16 * Interrupt configuration - interrupts are always generated the FPGA relies on
17 * the I/O interrupt controllers mask to stop them propergating
20 #include <linux/kernel.h>
21 #include <linux/compiler.h>
22 #include <linux/init.h>
23 #include <linux/io.h>
24 #include <linux/of.h>
25 #include <linux/of_device.h>
26 #include <linux/of_platform.h>
27 #include <linux/of_gpio.h>
28 #include <linux/gpio.h>
29 #include <linux/slab.h>
31 #define GEF_GPIO_DIRECT 0x00
32 #define GEF_GPIO_IN 0x04
33 #define GEF_GPIO_OUT 0x08
34 #define GEF_GPIO_TRIG 0x0C
35 #define GEF_GPIO_POLAR_A 0x10
36 #define GEF_GPIO_POLAR_B 0x14
37 #define GEF_GPIO_INT_STAT 0x18
38 #define GEF_GPIO_OVERRUN 0x1C
39 #define GEF_GPIO_MODE 0x20
41 static void _gef_gpio_set(void __iomem *reg, unsigned int offset, int value)
43 unsigned int data;
45 data = ioread32be(reg);
46 /* value: 0=low; 1=high */
47 if (value & 0x1)
48 data = data | (0x1 << offset);
49 else
50 data = data & ~(0x1 << offset);
52 iowrite32be(data, reg);
56 static int gef_gpio_dir_in(struct gpio_chip *chip, unsigned offset)
58 unsigned int data;
59 struct of_mm_gpio_chip *mmchip = to_of_mm_gpio_chip(chip);
61 data = ioread32be(mmchip->regs + GEF_GPIO_DIRECT);
62 data = data | (0x1 << offset);
63 iowrite32be(data, mmchip->regs + GEF_GPIO_DIRECT);
65 return 0;
68 static int gef_gpio_dir_out(struct gpio_chip *chip, unsigned offset, int value)
70 unsigned int data;
71 struct of_mm_gpio_chip *mmchip = to_of_mm_gpio_chip(chip);
73 /* Set direction before switching to input */
74 _gef_gpio_set(mmchip->regs + GEF_GPIO_OUT, offset, value);
76 data = ioread32be(mmchip->regs + GEF_GPIO_DIRECT);
77 data = data & ~(0x1 << offset);
78 iowrite32be(data, mmchip->regs + GEF_GPIO_DIRECT);
80 return 0;
83 static int gef_gpio_get(struct gpio_chip *chip, unsigned offset)
85 unsigned int data;
86 int state = 0;
87 struct of_mm_gpio_chip *mmchip = to_of_mm_gpio_chip(chip);
89 data = ioread32be(mmchip->regs + GEF_GPIO_IN);
90 state = (int)((data >> offset) & 0x1);
92 return state;
95 static void gef_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
97 struct of_mm_gpio_chip *mmchip = to_of_mm_gpio_chip(chip);
99 _gef_gpio_set(mmchip->regs + GEF_GPIO_OUT, offset, value);
102 static int __init gef_gpio_init(void)
104 struct device_node *np;
105 int retval;
106 struct of_mm_gpio_chip *gef_gpio_chip;
108 for_each_compatible_node(np, NULL, "gef,sbc610-gpio") {
110 pr_debug("%s: Initialising GEF GPIO\n", np->full_name);
112 /* Allocate chip structure */
113 gef_gpio_chip = kzalloc(sizeof(*gef_gpio_chip), GFP_KERNEL);
114 if (!gef_gpio_chip) {
115 pr_err("%s: Unable to allocate structure\n",
116 np->full_name);
117 continue;
120 /* Setup pointers to chip functions */
121 gef_gpio_chip->gc.of_gpio_n_cells = 2;
122 gef_gpio_chip->gc.ngpio = 19;
123 gef_gpio_chip->gc.direction_input = gef_gpio_dir_in;
124 gef_gpio_chip->gc.direction_output = gef_gpio_dir_out;
125 gef_gpio_chip->gc.get = gef_gpio_get;
126 gef_gpio_chip->gc.set = gef_gpio_set;
128 /* This function adds a memory mapped GPIO chip */
129 retval = of_mm_gpiochip_add(np, gef_gpio_chip);
130 if (retval) {
131 kfree(gef_gpio_chip);
132 pr_err("%s: Unable to add GPIO\n", np->full_name);
136 for_each_compatible_node(np, NULL, "gef,sbc310-gpio") {
138 pr_debug("%s: Initialising GEF GPIO\n", np->full_name);
140 /* Allocate chip structure */
141 gef_gpio_chip = kzalloc(sizeof(*gef_gpio_chip), GFP_KERNEL);
142 if (!gef_gpio_chip) {
143 pr_err("%s: Unable to allocate structure\n",
144 np->full_name);
145 continue;
148 /* Setup pointers to chip functions */
149 gef_gpio_chip->gc.of_gpio_n_cells = 2;
150 gef_gpio_chip->gc.ngpio = 6;
151 gef_gpio_chip->gc.direction_input = gef_gpio_dir_in;
152 gef_gpio_chip->gc.direction_output = gef_gpio_dir_out;
153 gef_gpio_chip->gc.get = gef_gpio_get;
154 gef_gpio_chip->gc.set = gef_gpio_set;
156 /* This function adds a memory mapped GPIO chip */
157 retval = of_mm_gpiochip_add(np, gef_gpio_chip);
158 if (retval) {
159 kfree(gef_gpio_chip);
160 pr_err("%s: Unable to add GPIO\n", np->full_name);
164 return 0;
166 arch_initcall(gef_gpio_init);
168 MODULE_DESCRIPTION("GE I/O FPGA GPIO driver");
169 MODULE_AUTHOR("Martyn Welch <martyn.welch@ge.com");
170 MODULE_LICENSE("GPL");