2 * Copyright (C) 2006-2007 PA Semi, Inc
4 * Author: Olof Johansson, PA Semi
6 * Maintained by: Olof Johansson <olof@lixom.net>
8 * Based on drivers/net/fs_enet/mii-bitbang.c.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 #include <linux/module.h>
26 #include <linux/types.h>
27 #include <linux/slab.h>
28 #include <linux/sched.h>
29 #include <linux/errno.h>
30 #include <linux/ioport.h>
31 #include <linux/interrupt.h>
32 #include <linux/phy.h>
33 #include <linux/of_mdio.h>
34 #include <linux/of_platform.h>
38 static void __iomem
*gpio_regs
;
43 int mdio_irqs
[PHY_MAX_ADDR
];
46 #define MDC_PIN(bus) (((struct gpio_priv *)bus->priv)->mdc_pin)
47 #define MDIO_PIN(bus) (((struct gpio_priv *)bus->priv)->mdio_pin)
49 static inline void mdio_lo(struct mii_bus
*bus
)
51 out_le32(gpio_regs
+0x10, 1 << MDIO_PIN(bus
));
54 static inline void mdio_hi(struct mii_bus
*bus
)
56 out_le32(gpio_regs
, 1 << MDIO_PIN(bus
));
59 static inline void mdc_lo(struct mii_bus
*bus
)
61 out_le32(gpio_regs
+0x10, 1 << MDC_PIN(bus
));
64 static inline void mdc_hi(struct mii_bus
*bus
)
66 out_le32(gpio_regs
, 1 << MDC_PIN(bus
));
69 static inline void mdio_active(struct mii_bus
*bus
)
71 out_le32(gpio_regs
+0x20, (1 << MDC_PIN(bus
)) | (1 << MDIO_PIN(bus
)));
74 static inline void mdio_tristate(struct mii_bus
*bus
)
76 out_le32(gpio_regs
+0x30, (1 << MDIO_PIN(bus
)));
79 static inline int mdio_read(struct mii_bus
*bus
)
81 return !!(in_le32(gpio_regs
+0x40) & (1 << MDIO_PIN(bus
)));
84 static void clock_out(struct mii_bus
*bus
, int bit
)
96 /* Utility to send the preamble, address, and register (common to read and write). */
97 static void bitbang_pre(struct mii_bus
*bus
, int read
, u8 addr
, u8 reg
)
101 /* CFE uses a really long preamble (40 bits). We'll do the same. */
103 for (i
= 0; i
< 40; i
++) {
107 /* send the start bit (01) and the read opcode (10) or write (10) */
111 clock_out(bus
, read
);
112 clock_out(bus
, !read
);
114 /* send the PHY address */
115 for (i
= 0; i
< 5; i
++) {
116 clock_out(bus
, (addr
& 0x10) != 0);
120 /* send the register address */
121 for (i
= 0; i
< 5; i
++) {
122 clock_out(bus
, (reg
& 0x10) != 0);
127 static int gpio_mdio_read(struct mii_bus
*bus
, int phy_id
, int location
)
131 u8 addr
= phy_id
& 0xff;
132 u8 reg
= location
& 0xff;
134 bitbang_pre(bus
, 1, addr
, reg
);
136 /* tri-state our MDIO I/O pin so we can read */
143 /* read 16 bits of register data, MSB first */
145 for (i
= 0; i
< 16; i
++) {
153 rdreg
|= mdio_read(bus
);
166 static int gpio_mdio_write(struct mii_bus
*bus
, int phy_id
, int location
, u16 val
)
170 u8 addr
= phy_id
& 0xff;
171 u8 reg
= location
& 0xff;
172 u16 value
= val
& 0xffff;
174 bitbang_pre(bus
, 0, addr
, reg
);
176 /* send the turnaround (10) */
188 /* write 16 bits of register data, MSB first */
189 for (i
= 0; i
< 16; i
++) {
202 * Tri-state the MDIO line.
212 static int gpio_mdio_reset(struct mii_bus
*bus
)
214 /*nothing here - dunno how to reset it*/
219 static int __devinit
gpio_mdio_probe(struct platform_device
*ofdev
,
220 const struct of_device_id
*match
)
222 struct device
*dev
= &ofdev
->dev
;
223 struct device_node
*np
= ofdev
->dev
.of_node
;
224 struct mii_bus
*new_bus
;
225 struct gpio_priv
*priv
;
226 const unsigned int *prop
;
230 priv
= kzalloc(sizeof(struct gpio_priv
), GFP_KERNEL
);
234 new_bus
= mdiobus_alloc();
239 new_bus
->name
= "pasemi gpio mdio bus";
240 new_bus
->read
= &gpio_mdio_read
;
241 new_bus
->write
= &gpio_mdio_write
;
242 new_bus
->reset
= &gpio_mdio_reset
;
244 prop
= of_get_property(np
, "reg", NULL
);
245 snprintf(new_bus
->id
, MII_BUS_ID_SIZE
, "%x", *prop
);
246 new_bus
->priv
= priv
;
248 new_bus
->irq
= priv
->mdio_irqs
;
250 prop
= of_get_property(np
, "mdc-pin", NULL
);
251 priv
->mdc_pin
= *prop
;
253 prop
= of_get_property(np
, "mdio-pin", NULL
);
254 priv
->mdio_pin
= *prop
;
256 new_bus
->parent
= dev
;
257 dev_set_drvdata(dev
, new_bus
);
259 err
= of_mdiobus_register(new_bus
, np
);
262 printk(KERN_ERR
"%s: Cannot register as MDIO bus, err %d\n",
278 static int gpio_mdio_remove(struct platform_device
*dev
)
280 struct mii_bus
*bus
= dev_get_drvdata(&dev
->dev
);
282 mdiobus_unregister(bus
);
284 dev_set_drvdata(&dev
->dev
, NULL
);
293 static struct of_device_id gpio_mdio_match
[] =
296 .compatible
= "gpio-mdio",
300 MODULE_DEVICE_TABLE(of
, gpio_mdio_match
);
302 static struct of_platform_driver gpio_mdio_driver
=
304 .probe
= gpio_mdio_probe
,
305 .remove
= gpio_mdio_remove
,
307 .name
= "gpio-mdio-bitbang",
308 .owner
= THIS_MODULE
,
309 .of_match_table
= gpio_mdio_match
,
313 int gpio_mdio_init(void)
315 struct device_node
*np
;
317 np
= of_find_compatible_node(NULL
, NULL
, "1682m-gpio");
319 np
= of_find_compatible_node(NULL
, NULL
,
320 "pasemi,pwrficient-gpio");
323 gpio_regs
= of_iomap(np
, 0);
329 return of_register_platform_driver(&gpio_mdio_driver
);
331 module_init(gpio_mdio_init
);
333 void gpio_mdio_exit(void)
335 of_unregister_platform_driver(&gpio_mdio_driver
);
339 module_exit(gpio_mdio_exit
);
341 MODULE_LICENSE("GPL");
342 MODULE_AUTHOR("Olof Johansson <olof@lixom.net>");
343 MODULE_DESCRIPTION("Driver for MDIO over GPIO on PA Semi PWRficient-based boards");