2 * Copyright (C) 2000-2007, Axis Communications AB.
5 #include <linux/kernel.h>
6 #include <linux/sched.h>
9 #include <linux/errno.h>
10 #include <linux/ptrace.h>
11 #include <linux/user.h>
12 #include <linux/signal.h>
13 #include <linux/security.h>
15 #include <asm/uaccess.h>
17 #include <asm/pgtable.h>
18 #include <asm/system.h>
19 #include <asm/processor.h>
20 #include <arch/hwregs/supp_reg.h>
23 * Determines which bits in CCS the user has access to.
24 * 1 = access, 0 = no access.
26 #define CCS_MASK 0x00087c00 /* SXNZVC */
28 #define SBIT_USER (1 << (S_CCS_BITNR + CCS_SHIFT))
30 static int put_debugreg(long pid
, unsigned int regno
, long data
);
31 static long get_debugreg(long pid
, unsigned int regno
);
32 static unsigned long get_pseudo_pc(struct task_struct
*child
);
33 void deconfigure_bp(long pid
);
35 extern unsigned long cris_signal_return_page
;
38 * Get contents of register REGNO in task TASK.
40 long get_reg(struct task_struct
*task
, unsigned int regno
)
42 /* USP is a special case, it's not in the pt_regs struct but
43 * in the tasks thread struct
48 ret
= ((unsigned long *)task_pt_regs(task
))[regno
];
49 else if (regno
== PT_USP
)
50 ret
= task
->thread
.usp
;
51 else if (regno
== PT_PPC
)
52 ret
= get_pseudo_pc(task
);
53 else if (regno
<= PT_MAX
)
54 ret
= get_debugreg(task
->pid
, regno
);
62 * Write contents of register REGNO in task TASK.
64 int put_reg(struct task_struct
*task
, unsigned int regno
, unsigned long data
)
67 ((unsigned long *)task_pt_regs(task
))[regno
] = data
;
68 else if (regno
== PT_USP
)
69 task
->thread
.usp
= data
;
70 else if (regno
== PT_PPC
) {
71 /* Write pseudo-PC to ERP only if changed. */
72 if (data
!= get_pseudo_pc(task
))
73 task_pt_regs(task
)->erp
= data
;
74 } else if (regno
<= PT_MAX
)
75 return put_debugreg(task
->pid
, regno
, data
);
81 void user_enable_single_step(struct task_struct
*child
)
86 * Set up SPC if not set already (in which case we have no other
87 * choice but to trust it).
89 if (!get_reg(child
, PT_SPC
)) {
90 /* In case we're stopped in a delay slot. */
91 tmp
= get_reg(child
, PT_ERP
) & ~1;
92 put_reg(child
, PT_SPC
, tmp
);
94 tmp
= get_reg(child
, PT_CCS
) | SBIT_USER
;
95 put_reg(child
, PT_CCS
, tmp
);
98 void user_disable_single_step(struct task_struct
*child
)
100 put_reg(child
, PT_SPC
, 0);
102 if (!get_debugreg(child
->pid
, PT_BP_CTRL
)) {
104 /* If no h/w bp configured, disable S bit. */
105 tmp
= get_reg(child
, PT_CCS
) & ~SBIT_USER
;
106 put_reg(child
, PT_CCS
, tmp
);
111 * Called by kernel/ptrace.c when detaching.
113 * Make sure the single step bit is not set.
116 ptrace_disable(struct task_struct
*child
)
118 /* Deconfigure SPC and S-bit. */
119 user_disable_single_step(child
);
120 put_reg(child
, PT_SPC
, 0);
122 /* Deconfigure any watchpoints associated with the child. */
123 deconfigure_bp(child
->pid
);
127 long arch_ptrace(struct task_struct
*child
, long request
,
128 unsigned long addr
, unsigned long data
)
131 unsigned int regno
= addr
>> 2;
132 unsigned long __user
*datap
= (unsigned long __user
*)data
;
135 /* Read word at location address. */
136 case PTRACE_PEEKTEXT
:
137 case PTRACE_PEEKDATA
: {
143 /* The signal trampoline page is outside the normal user-addressable
144 * space but still accessible. This is hack to make it possible to
145 * access the signal handler code in GDB.
147 if ((addr
& PAGE_MASK
) == cris_signal_return_page
) {
148 /* The trampoline page is globally mapped, no page table to traverse.*/
149 tmp
= *(unsigned long*)addr
;
151 copied
= access_process_vm(child
, addr
, &tmp
, sizeof(tmp
), 0);
153 if (copied
!= sizeof(tmp
))
157 ret
= put_user(tmp
,datap
);
161 /* Read the word at location address in the USER area. */
162 case PTRACE_PEEKUSR
: {
166 if ((addr
& 3) || regno
> PT_MAX
)
169 tmp
= get_reg(child
, regno
);
170 ret
= put_user(tmp
, datap
);
174 /* Write the word at location address. */
175 case PTRACE_POKETEXT
:
176 case PTRACE_POKEDATA
:
177 ret
= generic_ptrace_pokedata(child
, addr
, data
);
180 /* Write the word at location address in the USER area. */
183 if ((addr
& 3) || regno
> PT_MAX
)
186 if (regno
== PT_CCS
) {
187 /* don't allow the tracing process to change stuff like
188 * interrupt enable, kernel/user bit, dma enables etc.
191 data
|= get_reg(child
, PT_CCS
) & ~CCS_MASK
;
193 if (put_reg(child
, regno
, data
))
198 /* Get all GP registers from the child. */
199 case PTRACE_GETREGS
: {
203 for (i
= 0; i
<= PT_MAX
; i
++) {
204 tmp
= get_reg(child
, i
);
206 if (put_user(tmp
, datap
)) {
218 /* Set all GP registers in the child. */
219 case PTRACE_SETREGS
: {
223 for (i
= 0; i
<= PT_MAX
; i
++) {
224 if (get_user(tmp
, datap
)) {
231 tmp
|= get_reg(child
, PT_CCS
) & ~CCS_MASK
;
234 put_reg(child
, i
, tmp
);
243 ret
= ptrace_request(child
, request
, addr
, data
);
251 void do_syscall_trace(void)
253 if (!test_thread_flag(TIF_SYSCALL_TRACE
))
256 if (!(current
->ptrace
& PT_PTRACED
))
259 /* the 0x80 provides a way for the tracing parent to distinguish
260 between a syscall stop and SIGTRAP delivery */
261 ptrace_notify(SIGTRAP
| ((current
->ptrace
& PT_TRACESYSGOOD
)
265 * This isn't the same as continuing with a signal, but it will do for
268 if (current
->exit_code
) {
269 send_sig(current
->exit_code
, current
, 1);
270 current
->exit_code
= 0;
274 /* Returns the size of an instruction that has a delay slot. */
276 static int insn_size(struct task_struct
*child
, unsigned long pc
)
278 unsigned long opcode
;
282 /* Read the opcode at pc (do what PTRACE_PEEKTEXT would do). */
283 copied
= access_process_vm(child
, pc
, &opcode
, sizeof(opcode
), 0);
284 if (copied
!= sizeof(opcode
))
287 switch ((opcode
& 0x0f00) >> 8) {
298 /* Could be 4 or 6; check more bits. */
299 if ((opcode
& 0xff) == 0xff)
305 panic("ERROR: Couldn't find size of opcode 0x%lx at 0x%lx\n",
312 static unsigned long get_pseudo_pc(struct task_struct
*child
)
314 /* Default value for PC is ERP. */
315 unsigned long pc
= get_reg(child
, PT_ERP
);
318 unsigned long spc
= get_reg(child
, PT_SPC
);
319 /* Delay slot bit set. Report as stopped on proper
322 /* Rely on SPC if set. FIXME: We might want to check
323 that EXS indicates we stopped due to a single-step
327 /* Calculate the PC from the size of the instruction
328 that the delay slot we're in belongs to. */
329 pc
+= insn_size(child
, pc
& ~1) - 1;
335 static long bp_owner
= 0;
337 /* Reachable from exit_thread in signal.c, so not static. */
338 void deconfigure_bp(long pid
)
342 /* Only deconfigure if the pid is the owner. */
346 for (bp
= 0; bp
< 6; bp
++) {
348 /* Deconfigure start and end address (also gets rid of ownership). */
349 put_debugreg(pid
, PT_BP
+ 3 + (bp
* 2), 0);
350 put_debugreg(pid
, PT_BP
+ 4 + (bp
* 2), 0);
352 /* Deconfigure relevant bits in control register. */
353 tmp
= get_debugreg(pid
, PT_BP_CTRL
) & ~(3 << (2 + (bp
* 4)));
354 put_debugreg(pid
, PT_BP_CTRL
, tmp
);
360 static int put_debugreg(long pid
, unsigned int regno
, long data
)
363 register int old_srs
;
365 #ifdef CONFIG_ETRAX_KGDB
366 /* Ignore write, but pretend it was ok if value is 0
367 (we don't want POKEUSR/SETREGS failing unnessecarily). */
368 return (data
== 0) ? ret
: -1;
371 /* Simple owner management. */
374 else if (bp_owner
!= pid
) {
375 /* Ignore write, but pretend it was ok if value is 0
376 (we don't want POKEUSR/SETREGS failing unnessecarily). */
377 return (data
== 0) ? ret
: -1;
380 /* Remember old SRS. */
381 SPEC_REG_RD(SPEC_REG_SRS
, old_srs
);
382 /* Switch to BP bank. */
383 SUPP_BANK_SEL(BANK_BP
);
385 switch (regno
- PT_BP
) {
387 SUPP_REG_WR(0, data
); break;
394 SUPP_REG_WR(3, data
); break;
396 SUPP_REG_WR(4, data
); break;
398 SUPP_REG_WR(5, data
); break;
400 SUPP_REG_WR(6, data
); break;
402 SUPP_REG_WR(7, data
); break;
404 SUPP_REG_WR(8, data
); break;
406 SUPP_REG_WR(9, data
); break;
408 SUPP_REG_WR(10, data
); break;
410 SUPP_REG_WR(11, data
); break;
412 SUPP_REG_WR(12, data
); break;
414 SUPP_REG_WR(13, data
); break;
416 SUPP_REG_WR(14, data
); break;
423 SPEC_REG_WR(SPEC_REG_SRS
, old_srs
);
432 static long get_debugreg(long pid
, unsigned int regno
)
434 register int old_srs
;
437 if (pid
!= bp_owner
) {
441 /* Remember old SRS. */
442 SPEC_REG_RD(SPEC_REG_SRS
, old_srs
);
443 /* Switch to BP bank. */
444 SUPP_BANK_SEL(BANK_BP
);
446 switch (regno
- PT_BP
) {
448 SUPP_REG_RD(0, data
); break;
451 /* error return value? */
455 SUPP_REG_RD(3, data
); break;
457 SUPP_REG_RD(4, data
); break;
459 SUPP_REG_RD(5, data
); break;
461 SUPP_REG_RD(6, data
); break;
463 SUPP_REG_RD(7, data
); break;
465 SUPP_REG_RD(8, data
); break;
467 SUPP_REG_RD(9, data
); break;
469 SUPP_REG_RD(10, data
); break;
471 SUPP_REG_RD(11, data
); break;
473 SUPP_REG_RD(12, data
); break;
475 SUPP_REG_RD(13, data
); break;
477 SUPP_REG_RD(14, data
); break;
479 /* error return value? */
484 SPEC_REG_WR(SPEC_REG_SRS
, old_srs
);