arch/cris/arch-v10/kernel/irq.c

   1 /* $Id: irq.c,v 1.4 2005/01/04 12:22:28 starvik Exp $
   2  *
   3  *      linux/arch/cris/kernel/irq.c
   4  *
   5  *      Copyright (c) 2000-2002 Axis Communications AB
   6  *
   7  *      Authors: Bjorn Wesen (bjornw@axis.com)
   8  *
   9  *      This file contains the interrupt vectors and some
  10  *      helper functions
  11  *
  12  */
  13
  14 #include <asm/irq.h>
  15 #include <linux/irq.h>
  16 #include <linux/kernel.h>
  17 #include <linux/init.h>
  18 #include <linux/config.h>
  19
  20 #define mask_irq(irq_nr) (*R_VECT_MASK_CLR = 1 << (irq_nr));
  21 #define unmask_irq(irq_nr) (*R_VECT_MASK_SET = 1 << (irq_nr));
  22
  23 /* don't use set_int_vector, it bypasses the linux interrupt handlers. it is
  24  * global just so that the kernel gdb can use it.
  25  */
  26
  27 void
  28 set_int_vector(int n, irqvectptr addr)
  29 {
  30         etrax_irv->v[n + 0x20] = (irqvectptr)addr;
  31 }
  32
  33 /* the breakpoint vector is obviously not made just like the normal irq handlers
  34  * but needs to contain _code_ to jump to addr.
  35  *
  36  * the BREAK n instruction jumps to IBR + n * 8
  37  */
  38
  39 void
  40 set_break_vector(int n, irqvectptr addr)
  41 {
  42         unsigned short *jinstr = (unsigned short *)&etrax_irv->v[n*2];
  43         unsigned long *jaddr = (unsigned long *)(jinstr + 1);
  44
  45         /* if you don't know what this does, do not touch it! */
  46
  47         *jinstr = 0x0d3f;
  48         *jaddr = (unsigned long)addr;
  49
  50         /* 00000026 <clrlop+1a> 3f0d82000000     jump  0x82 */
  51 }
  52
  53 /*
  54  * This builds up the IRQ handler stubs using some ugly macros in irq.h
  55  *
  56  * These macros create the low-level assembly IRQ routines that do all
  57  * the operations that are needed. They are also written to be fast - and to
  58  * disable interrupts as little as humanly possible.
  59  *
  60  */
  61
  62 /* IRQ0 and 1 are special traps */
  63 void hwbreakpoint(void);
  64 void IRQ1_interrupt(void);
  65 BUILD_TIMER_IRQ(2, 0x04)       /* the timer interrupt is somewhat special */
  66 BUILD_IRQ(3, 0x08)
  67 BUILD_IRQ(4, 0x10)
  68 BUILD_IRQ(5, 0x20)
  69 BUILD_IRQ(6, 0x40)
  70 BUILD_IRQ(7, 0x80)
  71 BUILD_IRQ(8, 0x100)
  72 BUILD_IRQ(9, 0x200)
  73 BUILD_IRQ(10, 0x400)
  74 BUILD_IRQ(11, 0x800)
  75 BUILD_IRQ(12, 0x1000)
  76 BUILD_IRQ(13, 0x2000)
  77 void mmu_bus_fault(void);      /* IRQ 14 is the bus fault interrupt */
  78 void multiple_interrupt(void); /* IRQ 15 is the multiple IRQ interrupt */
  79 BUILD_IRQ(16, 0x10000)
  80 BUILD_IRQ(17, 0x20000)
  81 BUILD_IRQ(18, 0x40000)
  82 BUILD_IRQ(19, 0x80000)
  83 BUILD_IRQ(20, 0x100000)
  84 BUILD_IRQ(21, 0x200000)
  85 BUILD_IRQ(22, 0x400000)
  86 BUILD_IRQ(23, 0x800000)
  87 BUILD_IRQ(24, 0x1000000)
  88 BUILD_IRQ(25, 0x2000000)
  89 /* IRQ 26-30 are reserved */
  90 BUILD_IRQ(31, 0x80000000)
  91
  92 /*
  93  * Pointers to the low-level handlers
  94  */
  95
  96 static void (*interrupt[NR_IRQS])(void) = {
  97         NULL, NULL, IRQ2_interrupt, IRQ3_interrupt,
  98         IRQ4_interrupt, IRQ5_interrupt, IRQ6_interrupt, IRQ7_interrupt,
  99         IRQ8_interrupt, IRQ9_interrupt, IRQ10_interrupt, IRQ11_interrupt,
 100         IRQ12_interrupt, IRQ13_interrupt, NULL, NULL,
 101         IRQ16_interrupt, IRQ17_interrupt, IRQ18_interrupt, IRQ19_interrupt,
 102         IRQ20_interrupt, IRQ21_interrupt, IRQ22_interrupt, IRQ23_interrupt,
 103         IRQ24_interrupt, IRQ25_interrupt, NULL, NULL, NULL, NULL, NULL,
 104         IRQ31_interrupt
 105 };
 106
 107 static void enable_crisv10_irq(unsigned int irq);
 108
 109 static unsigned int startup_crisv10_irq(unsigned int irq)
 110 {
 111         enable_crisv10_irq(irq);
 112         return 0;
 113 }
 114
 115 #define shutdown_crisv10_irq    disable_crisv10_irq
 116
 117 static void enable_crisv10_irq(unsigned int irq)
 118 {
 119         unmask_irq(irq);
 120 }
 121
 122 static void disable_crisv10_irq(unsigned int irq)
 123 {
 124         mask_irq(irq);
 125 }
 126
 127 static void ack_crisv10_irq(unsigned int irq)
 128 {
 129 }
 130
 131 static void end_crisv10_irq(unsigned int irq)
 132 {
 133 }
 134
 135 static struct hw_interrupt_type crisv10_irq_type = {
 136         .typename =    "CRISv10",
 137         .startup =     startup_crisv10_irq,
 138         .shutdown =    shutdown_crisv10_irq,
 139         .enable =      enable_crisv10_irq,
 140         .disable =     disable_crisv10_irq,
 141         .ack =         ack_crisv10_irq,
 142         .end =         end_crisv10_irq,
 143         .set_affinity = NULL
 144 };
 145
 146 void weird_irq(void);
 147 void system_call(void);  /* from entry.S */
 148 void do_sigtrap(void); /* from entry.S */
 149 void gdb_handle_breakpoint(void); /* from entry.S */
 150
 151 /* init_IRQ() is called by start_kernel and is responsible for fixing IRQ masks and
 152    setting the irq vector table.
 153 */
 154
 155 void __init
 156 init_IRQ(void)
 157 {
 158         int i;
 159
 160         /* clear all interrupt masks */
 161
 162 #ifndef CONFIG_SVINTO_SIM
 163         *R_IRQ_MASK0_CLR = 0xffffffff;
 164         *R_IRQ_MASK1_CLR = 0xffffffff;
 165         *R_IRQ_MASK2_CLR = 0xffffffff;
 166 #endif
 167
 168         *R_VECT_MASK_CLR = 0xffffffff;
 169
 170         for (i = 0; i < 256; i++)
 171                etrax_irv->v[i] = weird_irq;
 172
 173         /* Initialize IRQ handler descriptiors. */
 174         for(i = 2; i < NR_IRQS; i++) {
 175                 irq_desc[i].handler = &crisv10_irq_type;
 176                 set_int_vector(i, interrupt[i]);
 177         }
 178
 179         /* the entries in the break vector contain actual code to be
 180            executed by the associated break handler, rather than just a jump
 181            address. therefore we need to setup a default breakpoint handler
 182            for all breakpoints */
 183
 184         for (i = 0; i < 16; i++)
 185                 set_break_vector(i, do_sigtrap);
 186
 187         /* except IRQ 15 which is the multiple-IRQ handler on Etrax100 */
 188
 189         set_int_vector(15, multiple_interrupt);
 190
 191         /* 0 and 1 which are special breakpoint/NMI traps */
 192
 193         set_int_vector(0, hwbreakpoint);
 194         set_int_vector(1, IRQ1_interrupt);
 195
 196         /* and irq 14 which is the mmu bus fault handler */
 197
 198         set_int_vector(14, mmu_bus_fault);
 199
 200         /* setup the system-call trap, which is reached by BREAK 13 */
 201
 202         set_break_vector(13, system_call);
 203
 204         /* setup a breakpoint handler for debugging used for both user and
 205            kernel mode debugging  (which is why it is not inside an ifdef
 206            CONFIG_ETRAX_KGDB) */
 207         set_break_vector(8, gdb_handle_breakpoint);
 208
 209 #ifdef CONFIG_ETRAX_KGDB
 210         /* setup kgdb if its enabled, and break into the debugger */
 211         kgdb_init();
 212         breakpoint();
 213 #endif
 214 }