Linux 2.6.13-rc4
[linux-2.6/next.git] / arch / sh / boards / cqreek / setup.c
blob29b537cd65464c48c19a371f993c278b7fef09bf
1 /* $Id: setup.c,v 1.5 2003/08/04 01:51:58 lethal Exp $
3 * arch/sh/kernel/setup_cqreek.c
5 * Copyright (C) 2000 Niibe Yutaka
7 * CqREEK IDE/ISA Bridge Support.
9 */
11 #include <linux/config.h>
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/irq.h>
16 #include <asm/mach/cqreek.h>
17 #include <asm/machvec.h>
18 #include <asm/io.h>
19 #include <asm/io_generic.h>
20 #include <asm/irq.h>
21 #include <asm/rtc.h>
23 #define IDE_OFFSET 0xA4000000UL
24 #define ISA_OFFSET 0xA4A00000UL
26 const char *get_system_type(void)
28 return "CqREEK";
31 static unsigned long cqreek_port2addr(unsigned long port)
33 if (0x0000<=port && port<=0x0040)
34 return IDE_OFFSET + port;
35 if ((0x01f0<=port && port<=0x01f7) || port == 0x03f6)
36 return IDE_OFFSET + port;
38 return ISA_OFFSET + port;
42 * The Machine Vector
44 struct sh_machine_vector mv_cqreek __initmv = {
45 #if defined(CONFIG_CPU_SH4)
46 .mv_nr_irqs = 48,
47 #elif defined(CONFIG_CPU_SUBTYPE_SH7708)
48 .mv_nr_irqs = 32,
49 #elif defined(CONFIG_CPU_SUBTYPE_SH7709)
50 .mv_nr_irqs = 61,
51 #endif
53 .mv_init_irq = init_cqreek_IRQ,
55 .mv_isa_port2addr = cqreek_port2addr,
57 ALIAS_MV(cqreek)
60 * Initialize the board
62 void __init platform_setup(void)
64 int i;
65 /* udelay is not available at setup time yet... */
66 #define DELAY() do {for (i=0; i<10000; i++) ctrl_inw(0xa0000000);} while(0)
68 if ((inw (BRIDGE_FEATURE) & 1)) { /* We have IDE interface */
69 outw_p(0, BRIDGE_IDE_INTR_LVL);
70 outw_p(0, BRIDGE_IDE_INTR_MASK);
72 outw_p(0, BRIDGE_IDE_CTRL);
73 DELAY();
75 outw_p(0x8000, BRIDGE_IDE_CTRL);
76 DELAY();
78 outw_p(0xffff, BRIDGE_IDE_INTR_STAT); /* Clear interrupt status */
79 outw_p(0x0f-14, BRIDGE_IDE_INTR_LVL); /* Use 14 IPR */
80 outw_p(1, BRIDGE_IDE_INTR_MASK); /* Enable interrupt */
81 cqreek_has_ide=1;
84 if ((inw (BRIDGE_FEATURE) & 2)) { /* We have ISA interface */
85 outw_p(0, BRIDGE_ISA_INTR_LVL);
86 outw_p(0, BRIDGE_ISA_INTR_MASK);
88 outw_p(0, BRIDGE_ISA_CTRL);
89 DELAY();
90 outw_p(0x8000, BRIDGE_ISA_CTRL);
91 DELAY();
93 outw_p(0xffff, BRIDGE_ISA_INTR_STAT); /* Clear interrupt status */
94 outw_p(0x0f-10, BRIDGE_ISA_INTR_LVL); /* Use 10 IPR */
95 outw_p(0xfff8, BRIDGE_ISA_INTR_MASK); /* Enable interrupt */
96 cqreek_has_isa=1;
99 printk(KERN_INFO "CqREEK Setup (IDE=%d, ISA=%d)...done\n", cqreek_has_ide, cqreek_has_isa);