Linux 2.6.13-rc4
[linux-2.6/next.git] / arch / sh / drivers / pci / ops-snapgear.c
blob6fdb9765c99a5faca41c9694dc2b98026d9a0b60
1 /*
2 * arch/sh/drivers/pci/ops-snapgear.c
4 * Author: David McCullough <davidm@snapgear.com>
5 *
6 * Ported to new API by Paul Mundt <lethal@linux-sh.org>
8 * Highly leveraged from pci-bigsur.c, written by Dustin McIntire.
10 * May be copied or modified under the terms of the GNU General Public
11 * License. See linux/COPYING for more information.
13 * PCI initialization for the SnapGear boards
16 #include <linux/config.h>
17 #include <linux/kernel.h>
18 #include <linux/types.h>
19 #include <linux/init.h>
20 #include <linux/delay.h>
21 #include <linux/pci.h>
23 #include <asm/io.h>
24 #include "pci-sh7751.h"
26 #define SNAPGEAR_PCI_IO 0x4000
27 #define SNAPGEAR_PCI_MEM 0xfd000000
29 /* PCI: default LOCAL memory window sizes (seen from PCI bus) */
30 #define SNAPGEAR_LSR0_SIZE (64*(1<<20)) //64MB
31 #define SNAPGEAR_LSR1_SIZE (64*(1<<20)) //64MB
33 static struct resource sh7751_io_resource = {
34 .name = "SH7751 IO",
35 .start = SNAPGEAR_PCI_IO,
36 .end = SNAPGEAR_PCI_IO + (64*1024) - 1, /* 64KiB I/O */
37 .flags = IORESOURCE_IO,
40 static struct resource sh7751_mem_resource = {
41 .name = "SH7751 mem",
42 .start = SNAPGEAR_PCI_MEM,
43 .end = SNAPGEAR_PCI_MEM + (64*1024*1024) - 1, /* 64MiB mem */
44 .flags = IORESOURCE_MEM,
47 extern struct pci_ops sh7751_pci_ops;
49 struct pci_channel board_pci_channels[] = {
50 { &sh7751_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },
51 { 0, }
54 static struct sh7751_pci_address_map sh7751_pci_map = {
55 .window0 = {
56 .base = SH7751_CS2_BASE_ADDR,
57 .size = SNAPGEAR_LSR0_SIZE,
60 .window1 = {
61 .base = SH7751_CS2_BASE_ADDR,
62 .size = SNAPGEAR_LSR1_SIZE,
65 .flags = SH7751_PCIC_NO_RESET,
69 * Initialize the SnapGear PCI interface
70 * Setup hardware to be Central Funtion
71 * Copy the BSR regs to the PCI interface
72 * Setup PCI windows into local RAM
74 int __init pcibios_init_platform(void)
76 return sh7751_pcic_init(&sh7751_pci_map);
79 int __init pcibios_map_platform_irq(u8 slot, u8 pin)
81 int irq = -1;
83 switch (slot) {
84 case 8: /* the PCI bridge */ break;
85 case 11: irq = 8; break; /* USB */
86 case 12: irq = 11; break; /* PCMCIA */
87 case 13: irq = 5; break; /* eth0 */
88 case 14: irq = 8; break; /* eth1 */
89 case 15: irq = 11; break; /* safenet (unused) */
92 printk("PCI: Mapping SnapGear IRQ for slot %d, pin %c to irq %d\n",
93 slot, pin - 1 + 'A', irq);
95 return irq;
98 void __init pcibios_fixup(void)
100 /* Nothing to fixup .. */