2 * TI DaVinci DM646X EVM board
4 * Derived from: arch/arm/mach-davinci/board-evm.c
5 * Copyright (C) 2006 Texas Instruments.
7 * (C) 2007-2008, MontaVista Software, Inc.
9 * This file is licensed under the terms of the GNU General Public License
10 * version 2. This program is licensed "as is" without any warranty of any
11 * kind, whether express or implied.
15 /**************************************************************************
17 **************************************************************************/
19 #include <linux/kernel.h>
20 #include <linux/init.h>
21 #include <linux/leds.h>
22 #include <linux/gpio.h>
23 #include <linux/platform_device.h>
24 #include <linux/i2c.h>
25 #include <linux/i2c/at24.h>
26 #include <linux/i2c/pcf857x.h>
28 #include <media/tvp514x.h>
30 #include <linux/mtd/mtd.h>
31 #include <linux/mtd/nand.h>
32 #include <linux/mtd/partitions.h>
33 #include <linux/clk.h>
35 #include <asm/mach-types.h>
36 #include <asm/mach/arch.h>
38 #include <mach/dm646x.h>
39 #include <mach/common.h>
40 #include <mach/serial.h>
42 #include <mach/nand.h>
43 #include <mach/clock.h>
44 #include <mach/cdce949.h>
45 #include <mach/aemif.h>
49 #define NAND_BLOCK_SIZE SZ_128K
51 /* Note: We are setting first partition as 'bootloader' constituting UBL, U-Boot
52 * and U-Boot environment this avoids dependency on any particular combination
53 * of UBL, U-Boot or flashing tools etc.
55 static struct mtd_partition davinci_nand_partitions
[] = {
57 /* UBL, U-Boot with environment */
59 .offset
= MTDPART_OFS_APPEND
,
60 .size
= 16 * NAND_BLOCK_SIZE
,
61 .mask_flags
= MTD_WRITEABLE
, /* force read-only */
64 .offset
= MTDPART_OFS_APPEND
,
69 .offset
= MTDPART_OFS_APPEND
,
70 .size
= MTDPART_SIZ_FULL
,
75 static struct davinci_aemif_timing dm6467tevm_nandflash_timing
= {
85 static struct davinci_nand_pdata davinci_nand_data
= {
88 .parts
= davinci_nand_partitions
,
89 .nr_parts
= ARRAY_SIZE(davinci_nand_partitions
),
90 .ecc_mode
= NAND_ECC_HW
,
94 static struct resource davinci_nand_resources
[] = {
96 .start
= DM646X_ASYNC_EMIF_CS2_SPACE_BASE
,
97 .end
= DM646X_ASYNC_EMIF_CS2_SPACE_BASE
+ SZ_32M
- 1,
98 .flags
= IORESOURCE_MEM
,
100 .start
= DM646X_ASYNC_EMIF_CONTROL_BASE
,
101 .end
= DM646X_ASYNC_EMIF_CONTROL_BASE
+ SZ_4K
- 1,
102 .flags
= IORESOURCE_MEM
,
106 static struct platform_device davinci_nand_device
= {
107 .name
= "davinci_nand",
110 .num_resources
= ARRAY_SIZE(davinci_nand_resources
),
111 .resource
= davinci_nand_resources
,
114 .platform_data
= &davinci_nand_data
,
118 #if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
119 defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
125 /* CPLD Register 0 bits to control ATA */
126 #define DM646X_EVM_ATA_RST BIT(0)
127 #define DM646X_EVM_ATA_PWD BIT(1)
129 /* CPLD Register 0 Client: used for I/O Control */
130 static int cpld_reg0_probe(struct i2c_client
*client
,
131 const struct i2c_device_id
*id
)
135 struct i2c_msg msg
[2] = {
137 .addr
= client
->addr
,
143 .addr
= client
->addr
,
150 /* Clear ATA_RSTn and ATA_PWD bits to enable ATA operation. */
151 i2c_transfer(client
->adapter
, msg
, 1);
152 data
&= ~(DM646X_EVM_ATA_RST
| DM646X_EVM_ATA_PWD
);
153 i2c_transfer(client
->adapter
, msg
+ 1, 1);
159 static const struct i2c_device_id cpld_reg_ids
[] = {
164 static struct i2c_driver dm6467evm_cpld_driver
= {
165 .driver
.name
= "cpld_reg0",
166 .id_table
= cpld_reg_ids
,
167 .probe
= cpld_reg0_probe
,
172 static struct gpio_led evm_leds
[] = {
173 { .name
= "DS1", .active_low
= 1, },
174 { .name
= "DS2", .active_low
= 1, },
175 { .name
= "DS3", .active_low
= 1, },
176 { .name
= "DS4", .active_low
= 1, },
179 static const struct gpio_led_platform_data evm_led_data
= {
180 .num_leds
= ARRAY_SIZE(evm_leds
),
184 static struct platform_device
*evm_led_dev
;
186 static int evm_led_setup(struct i2c_client
*client
, int gpio
,
187 unsigned int ngpio
, void *c
)
189 struct gpio_led
*leds
= evm_leds
;
197 evm_led_dev
= platform_device_alloc("leds-gpio", 0);
198 platform_device_add_data(evm_led_dev
, &evm_led_data
,
199 sizeof(evm_led_data
));
201 evm_led_dev
->dev
.parent
= &client
->dev
;
202 status
= platform_device_add(evm_led_dev
);
204 platform_device_put(evm_led_dev
);
210 static int evm_led_teardown(struct i2c_client
*client
, int gpio
,
211 unsigned ngpio
, void *c
)
214 platform_device_unregister(evm_led_dev
);
220 static int evm_sw_gpio
[4] = { -EINVAL
, -EINVAL
, -EINVAL
, -EINVAL
};
222 static int evm_sw_setup(struct i2c_client
*client
, int gpio
,
223 unsigned ngpio
, void *c
)
229 for (i
= 0; i
< 4; ++i
) {
230 snprintf(label
, 10, "user_sw%d", i
);
231 status
= gpio_request(gpio
, label
);
234 evm_sw_gpio
[i
] = gpio
++;
236 status
= gpio_direction_input(evm_sw_gpio
[i
]);
238 gpio_free(evm_sw_gpio
[i
]);
239 evm_sw_gpio
[i
] = -EINVAL
;
243 status
= gpio_export(evm_sw_gpio
[i
], 0);
245 gpio_free(evm_sw_gpio
[i
]);
246 evm_sw_gpio
[i
] = -EINVAL
;
252 for (i
= 0; i
< 4; ++i
) {
253 if (evm_sw_gpio
[i
] != -EINVAL
) {
254 gpio_free(evm_sw_gpio
[i
]);
255 evm_sw_gpio
[i
] = -EINVAL
;
261 static int evm_sw_teardown(struct i2c_client
*client
, int gpio
,
262 unsigned ngpio
, void *c
)
266 for (i
= 0; i
< 4; ++i
) {
267 if (evm_sw_gpio
[i
] != -EINVAL
) {
268 gpio_unexport(evm_sw_gpio
[i
]);
269 gpio_free(evm_sw_gpio
[i
]);
270 evm_sw_gpio
[i
] = -EINVAL
;
276 static int evm_pcf_setup(struct i2c_client
*client
, int gpio
,
277 unsigned int ngpio
, void *c
)
284 status
= evm_sw_setup(client
, gpio
, 4, c
);
288 return evm_led_setup(client
, gpio
+4, 4, c
);
291 static int evm_pcf_teardown(struct i2c_client
*client
, int gpio
,
292 unsigned int ngpio
, void *c
)
296 evm_sw_teardown(client
, gpio
, 4, c
);
297 evm_led_teardown(client
, gpio
+4, 4, c
);
302 static struct pcf857x_platform_data pcf_data
= {
303 .gpio_base
= DAVINCI_N_GPIO
+1,
304 .setup
= evm_pcf_setup
,
305 .teardown
= evm_pcf_teardown
,
308 /* Most of this EEPROM is unused, but U-Boot uses some data:
309 * - 0x7f00, 6 bytes Ethernet Address
310 * - ... newer boards may have more
313 static struct at24_platform_data eeprom_info
= {
314 .byte_len
= (256*1024) / 8,
316 .flags
= AT24_FLAG_ADDR16
,
317 .setup
= davinci_get_mac_addr
,
318 .context
= (void *)0x7f00,
321 static u8 dm646x_iis_serializer_direction
[] = {
322 TX_MODE
, RX_MODE
, INACTIVE_MODE
, INACTIVE_MODE
,
325 static u8 dm646x_dit_serializer_direction
[] = {
329 static struct snd_platform_data dm646x_evm_snd_data
[] = {
331 .tx_dma_offset
= 0x400,
332 .rx_dma_offset
= 0x400,
333 .op_mode
= DAVINCI_MCASP_IIS_MODE
,
334 .num_serializer
= ARRAY_SIZE(dm646x_iis_serializer_direction
),
336 .serial_dir
= dm646x_iis_serializer_direction
,
337 .asp_chan_q
= EVENTQ_0
,
340 .tx_dma_offset
= 0x400,
342 .op_mode
= DAVINCI_MCASP_DIT_MODE
,
343 .num_serializer
= ARRAY_SIZE(dm646x_dit_serializer_direction
),
345 .serial_dir
= dm646x_dit_serializer_direction
,
346 .asp_chan_q
= EVENTQ_0
,
350 static struct i2c_client
*cpld_client
;
352 static int cpld_video_probe(struct i2c_client
*client
,
353 const struct i2c_device_id
*id
)
355 cpld_client
= client
;
359 static int __devexit
cpld_video_remove(struct i2c_client
*client
)
365 static const struct i2c_device_id cpld_video_id
[] = {
370 static struct i2c_driver cpld_video_driver
= {
372 .name
= "cpld_video",
374 .probe
= cpld_video_probe
,
375 .remove
= cpld_video_remove
,
376 .id_table
= cpld_video_id
,
379 static void evm_init_cpld(void)
381 i2c_add_driver(&cpld_video_driver
);
384 static struct i2c_board_info __initdata i2c_info
[] = {
386 I2C_BOARD_INFO("24c256", 0x50),
387 .platform_data
= &eeprom_info
,
390 I2C_BOARD_INFO("pcf8574a", 0x38),
391 .platform_data
= &pcf_data
,
394 I2C_BOARD_INFO("cpld_reg0", 0x3a),
397 I2C_BOARD_INFO("tlv320aic33", 0x18),
400 I2C_BOARD_INFO("cpld_video", 0x3b),
403 I2C_BOARD_INFO("cdce949", 0x6c),
407 static struct davinci_i2c_platform_data i2c_pdata
= {
408 .bus_freq
= 100 /* kHz */,
409 .bus_delay
= 0 /* usec */,
412 #define VIDCLKCTL_OFFSET (DAVINCI_SYSTEM_MODULE_BASE + 0x38)
413 #define VSCLKDIS_OFFSET (DAVINCI_SYSTEM_MODULE_BASE + 0x6c)
414 #define VCH2CLK_MASK (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8))
415 #define VCH2CLK_SYSCLK8 (BIT(9))
416 #define VCH2CLK_AUXCLK (BIT(9) | BIT(8))
417 #define VCH3CLK_MASK (BIT_MASK(14) | BIT_MASK(13) | BIT_MASK(12))
418 #define VCH3CLK_SYSCLK8 (BIT(13))
419 #define VCH3CLK_AUXCLK (BIT(14) | BIT(13))
421 #define VIDCH2CLK (BIT(10))
422 #define VIDCH3CLK (BIT(11))
423 #define VIDCH1CLK (BIT(4))
424 #define TVP7002_INPUT (BIT(4))
425 #define TVP5147_INPUT (~BIT(4))
426 #define VPIF_INPUT_ONE_CHANNEL (BIT(5))
427 #define VPIF_INPUT_TWO_CHANNEL (~BIT(5))
428 #define TVP5147_CH0 "tvp514x-0"
429 #define TVP5147_CH1 "tvp514x-1"
431 static void __iomem
*vpif_vidclkctl_reg
;
432 static void __iomem
*vpif_vsclkdis_reg
;
433 /* spin lock for updating above registers */
434 static spinlock_t vpif_reg_lock
;
436 static int set_vpif_clock(int mux_mode
, int hd
)
443 if (!vpif_vidclkctl_reg
|| !vpif_vsclkdis_reg
|| !cpld_client
)
446 /* disable the clock */
447 spin_lock_irqsave(&vpif_reg_lock
, flags
);
448 value
= __raw_readl(vpif_vsclkdis_reg
);
449 value
|= (VIDCH3CLK
| VIDCH2CLK
);
450 __raw_writel(value
, vpif_vsclkdis_reg
);
451 spin_unlock_irqrestore(&vpif_reg_lock
, flags
);
453 val
= i2c_smbus_read_byte(cpld_client
);
462 err
= i2c_smbus_write_byte(cpld_client
, val
);
466 value
= __raw_readl(vpif_vidclkctl_reg
);
467 value
&= ~(VCH2CLK_MASK
);
468 value
&= ~(VCH3CLK_MASK
);
471 value
|= (VCH2CLK_SYSCLK8
| VCH3CLK_SYSCLK8
);
473 value
|= (VCH2CLK_AUXCLK
| VCH3CLK_AUXCLK
);
475 __raw_writel(value
, vpif_vidclkctl_reg
);
477 spin_lock_irqsave(&vpif_reg_lock
, flags
);
478 value
= __raw_readl(vpif_vsclkdis_reg
);
479 /* enable the clock */
480 value
&= ~(VIDCH3CLK
| VIDCH2CLK
);
481 __raw_writel(value
, vpif_vsclkdis_reg
);
482 spin_unlock_irqrestore(&vpif_reg_lock
, flags
);
487 static struct vpif_subdev_info dm646x_vpif_subdev
[] = {
491 I2C_BOARD_INFO("adv7343", 0x2a),
497 I2C_BOARD_INFO("ths7303", 0x2c),
502 static const char *output
[] = {
508 static struct vpif_display_config dm646x_vpif_display_config
= {
509 .set_clock
= set_vpif_clock
,
510 .subdevinfo
= dm646x_vpif_subdev
,
511 .subdev_count
= ARRAY_SIZE(dm646x_vpif_subdev
),
513 .output_count
= ARRAY_SIZE(output
),
514 .card_name
= "DM646x EVM",
518 * setup_vpif_input_path()
519 * @channel: channel id (0 - CH0, 1 - CH1)
520 * @sub_dev_name: ptr sub device name
522 * This will set vpif input to capture data from tvp514x or
525 static int setup_vpif_input_path(int channel
, const char *sub_dev_name
)
530 /* for channel 1, we don't do anything */
537 val
= i2c_smbus_read_byte(cpld_client
);
541 if (!strcmp(sub_dev_name
, TVP5147_CH0
) ||
542 !strcmp(sub_dev_name
, TVP5147_CH1
))
543 val
&= TVP5147_INPUT
;
545 val
|= TVP7002_INPUT
;
547 err
= i2c_smbus_write_byte(cpld_client
, val
);
554 * setup_vpif_input_channel_mode()
555 * @mux_mode: mux mode. 0 - 1 channel or (1) - 2 channel
557 * This will setup input mode to one channel (TVP7002) or 2 channel (TVP5147)
559 static int setup_vpif_input_channel_mode(int mux_mode
)
566 if (!vpif_vsclkdis_reg
|| !cpld_client
)
569 val
= i2c_smbus_read_byte(cpld_client
);
573 spin_lock_irqsave(&vpif_reg_lock
, flags
);
574 value
= __raw_readl(vpif_vsclkdis_reg
);
576 val
&= VPIF_INPUT_TWO_CHANNEL
;
579 val
|= VPIF_INPUT_ONE_CHANNEL
;
582 __raw_writel(value
, vpif_vsclkdis_reg
);
583 spin_unlock_irqrestore(&vpif_reg_lock
, flags
);
585 err
= i2c_smbus_write_byte(cpld_client
, val
);
592 static struct tvp514x_platform_data tvp5146_pdata
= {
598 #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
600 static struct vpif_subdev_info vpif_capture_sdev_info
[] = {
604 I2C_BOARD_INFO("tvp5146", 0x5d),
605 .platform_data
= &tvp5146_pdata
,
607 .input
= INPUT_CVBS_VI2B
,
608 .output
= OUTPUT_10BIT_422_EMBEDDED_SYNC
,
611 .if_type
= VPIF_IF_BT656
,
620 I2C_BOARD_INFO("tvp5146", 0x5c),
621 .platform_data
= &tvp5146_pdata
,
623 .input
= INPUT_SVIDEO_VI2C_VI1C
,
624 .output
= OUTPUT_10BIT_422_EMBEDDED_SYNC
,
627 .if_type
= VPIF_IF_BT656
,
635 static const struct vpif_input dm6467_ch0_inputs
[] = {
640 .type
= V4L2_INPUT_TYPE_CAMERA
,
641 .std
= TVP514X_STD_ALL
,
643 .subdev_name
= TVP5147_CH0
,
647 static const struct vpif_input dm6467_ch1_inputs
[] = {
652 .type
= V4L2_INPUT_TYPE_CAMERA
,
653 .std
= TVP514X_STD_ALL
,
655 .subdev_name
= TVP5147_CH1
,
659 static struct vpif_capture_config dm646x_vpif_capture_cfg
= {
660 .setup_input_path
= setup_vpif_input_path
,
661 .setup_input_channel_mode
= setup_vpif_input_channel_mode
,
662 .subdev_info
= vpif_capture_sdev_info
,
663 .subdev_count
= ARRAY_SIZE(vpif_capture_sdev_info
),
665 .inputs
= dm6467_ch0_inputs
,
666 .input_count
= ARRAY_SIZE(dm6467_ch0_inputs
),
669 .inputs
= dm6467_ch1_inputs
,
670 .input_count
= ARRAY_SIZE(dm6467_ch1_inputs
),
674 static void __init
evm_init_video(void)
676 vpif_vidclkctl_reg
= ioremap(VIDCLKCTL_OFFSET
, 4);
677 vpif_vsclkdis_reg
= ioremap(VSCLKDIS_OFFSET
, 4);
678 if (!vpif_vidclkctl_reg
|| !vpif_vsclkdis_reg
) {
679 pr_err("Can't map VPIF VIDCLKCTL or VSCLKDIS registers\n");
682 spin_lock_init(&vpif_reg_lock
);
684 dm646x_setup_vpif(&dm646x_vpif_display_config
,
685 &dm646x_vpif_capture_cfg
);
688 static void __init
evm_init_i2c(void)
690 davinci_init_i2c(&i2c_pdata
);
691 i2c_add_driver(&dm6467evm_cpld_driver
);
692 i2c_register_board_info(1, i2c_info
, ARRAY_SIZE(i2c_info
));
697 #define CDCE949_XIN_RATE 27000000
699 /* CDCE949 support - "lpsc" field is overridden to work as clock number */
700 static struct clk cdce_clk_in
= {
702 .rate
= CDCE949_XIN_RATE
,
705 static struct clk_lookup cdce_clks
[] = {
706 CLK(NULL
, "xin", &cdce_clk_in
),
707 CLK(NULL
, NULL
, NULL
),
710 static void __init
cdce_clk_init(void)
712 struct clk_lookup
*c
;
715 for (c
= cdce_clks
; c
->clk
; c
++) {
722 static void __init
davinci_map_io(void)
728 static struct davinci_uart_config uart_config __initdata
= {
729 .enabled_uarts
= (1 << 0),
732 #define DM646X_EVM_PHY_ID "0:01"
734 * The following EDMA channels/slots are not being used by drivers (for
735 * example: Timer, GPIO, UART events etc) on dm646x, hence they are being
736 * reserved for codecs on the DSP side.
738 static const s16 dm646x_dma_rsv_chans
[][2] = {
739 /* (offset, number) */
748 static const s16 dm646x_dma_rsv_slots
[][2] = {
749 /* (offset, number) */
759 static struct edma_rsv_info dm646x_edma_rsv
[] = {
761 .rsv_chans
= dm646x_dma_rsv_chans
,
762 .rsv_slots
= dm646x_dma_rsv_slots
,
766 static __init
void evm_init(void)
768 struct davinci_soc_info
*soc_info
= &davinci_soc_info
;
771 davinci_serial_init(&uart_config
);
772 dm646x_init_mcasp0(&dm646x_evm_snd_data
[0]);
773 dm646x_init_mcasp1(&dm646x_evm_snd_data
[1]);
775 if (machine_is_davinci_dm6467tevm())
776 davinci_nand_data
.timing
= &dm6467tevm_nandflash_timing
;
778 platform_device_register(&davinci_nand_device
);
780 dm646x_init_edma(dm646x_edma_rsv
);
785 soc_info
->emac_pdata
->phy_id
= DM646X_EVM_PHY_ID
;
788 #define DM646X_EVM_REF_FREQ 27000000
789 #define DM6467T_EVM_REF_FREQ 33000000
791 void __init
dm646x_board_setup_refclk(struct clk
*clk
)
793 if (machine_is_davinci_dm6467tevm())
794 clk
->rate
= DM6467T_EVM_REF_FREQ
;
796 clk
->rate
= DM646X_EVM_REF_FREQ
;
799 MACHINE_START(DAVINCI_DM6467_EVM
, "DaVinci DM646x EVM")
800 .boot_params
= (0x80000100),
801 .map_io
= davinci_map_io
,
802 .init_irq
= davinci_irq_init
,
803 .timer
= &davinci_timer
,
804 .init_machine
= evm_init
,
807 MACHINE_START(DAVINCI_DM6467TEVM
, "DaVinci DM6467T EVM")
808 .boot_params
= (0x80000100),
809 .map_io
= davinci_map_io
,
810 .init_irq
= davinci_irq_init
,
811 .timer
= &davinci_timer
,
812 .init_machine
= evm_init
,