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[linux-2.6/next.git] / arch / arm / mach-iop32x / iq31244.c
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1 /*
2 * arch/arm/mach-iop32x/iq31244.c
4 * Board support code for the Intel EP80219 and IQ31244 platforms.
6 * Author: Rory Bolt <rorybolt@pacbell.net>
7 * Copyright (C) 2002 Rory Bolt
8 * Copyright 2003 (c) MontaVista, Software, Inc.
9 * Copyright (C) 2004 Intel Corp.
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
17 #include <linux/mm.h>
18 #include <linux/init.h>
19 #include <linux/delay.h>
20 #include <linux/kernel.h>
21 #include <linux/pci.h>
22 #include <linux/pm.h>
23 #include <linux/string.h>
24 #include <linux/serial_core.h>
25 #include <linux/serial_8250.h>
26 #include <linux/mtd/physmap.h>
27 #include <linux/platform_device.h>
28 #include <linux/io.h>
29 #include <mach/hardware.h>
30 #include <asm/cputype.h>
31 #include <asm/irq.h>
32 #include <asm/mach/arch.h>
33 #include <asm/mach/map.h>
34 #include <asm/mach/pci.h>
35 #include <asm/mach/time.h>
36 #include <asm/mach-types.h>
37 #include <asm/page.h>
38 #include <asm/pgtable.h>
39 #include <mach/time.h>
42 * Until March of 2007 iq31244 platforms and ep80219 platforms shared the
43 * same machine id, and the processor type was used to select board type.
44 * However this assumption breaks for an iq80219 board which is an iop219
45 * processor on an iq31244 board. The force_ep80219 flag has been added
46 * for old boot loaders using the iq31244 machine id for an ep80219 platform.
48 static int force_ep80219;
50 static int is_80219(void)
52 return !!((read_cpuid_id() & 0xffffffe0) == 0x69052e20);
55 static int is_ep80219(void)
57 if (machine_is_ep80219() || force_ep80219)
58 return 1;
59 else
60 return 0;
65 * EP80219/IQ31244 timer tick configuration.
67 static void __init iq31244_timer_init(void)
69 if (is_ep80219()) {
70 /* 33.333 MHz crystal. */
71 iop_init_time(200000000);
72 } else {
73 /* 33.000 MHz crystal. */
74 iop_init_time(198000000);
78 static struct sys_timer iq31244_timer = {
79 .init = iq31244_timer_init,
84 * IQ31244 I/O.
86 static struct map_desc iq31244_io_desc[] __initdata = {
87 { /* on-board devices */
88 .virtual = IQ31244_UART,
89 .pfn = __phys_to_pfn(IQ31244_UART),
90 .length = 0x00100000,
91 .type = MT_DEVICE,
95 void __init iq31244_map_io(void)
97 iop3xx_map_io();
98 iotable_init(iq31244_io_desc, ARRAY_SIZE(iq31244_io_desc));
103 * EP80219/IQ31244 PCI.
105 static int __init
106 ep80219_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
108 int irq;
110 if (slot == 0) {
111 /* CFlash */
112 irq = IRQ_IOP32X_XINT1;
113 } else if (slot == 1) {
114 /* 82551 Pro 100 */
115 irq = IRQ_IOP32X_XINT0;
116 } else if (slot == 2) {
117 /* PCI-X Slot */
118 irq = IRQ_IOP32X_XINT3;
119 } else if (slot == 3) {
120 /* SATA */
121 irq = IRQ_IOP32X_XINT2;
122 } else {
123 printk(KERN_ERR "ep80219_pci_map_irq() called for unknown "
124 "device PCI:%d:%d:%d\n", dev->bus->number,
125 PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
126 irq = -1;
129 return irq;
132 static struct hw_pci ep80219_pci __initdata = {
133 .swizzle = pci_std_swizzle,
134 .nr_controllers = 1,
135 .setup = iop3xx_pci_setup,
136 .preinit = iop3xx_pci_preinit,
137 .scan = iop3xx_pci_scan_bus,
138 .map_irq = ep80219_pci_map_irq,
141 static int __init
142 iq31244_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
144 int irq;
146 if (slot == 0) {
147 /* CFlash */
148 irq = IRQ_IOP32X_XINT1;
149 } else if (slot == 1) {
150 /* SATA */
151 irq = IRQ_IOP32X_XINT2;
152 } else if (slot == 2) {
153 /* PCI-X Slot */
154 irq = IRQ_IOP32X_XINT3;
155 } else if (slot == 3) {
156 /* 82546 GigE */
157 irq = IRQ_IOP32X_XINT0;
158 } else {
159 printk(KERN_ERR "iq31244_pci_map_irq called for unknown "
160 "device PCI:%d:%d:%d\n", dev->bus->number,
161 PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
162 irq = -1;
165 return irq;
168 static struct hw_pci iq31244_pci __initdata = {
169 .swizzle = pci_std_swizzle,
170 .nr_controllers = 1,
171 .setup = iop3xx_pci_setup,
172 .preinit = iop3xx_pci_preinit,
173 .scan = iop3xx_pci_scan_bus,
174 .map_irq = iq31244_pci_map_irq,
177 static int __init iq31244_pci_init(void)
179 if (is_ep80219())
180 pci_common_init(&ep80219_pci);
181 else if (machine_is_iq31244()) {
182 if (is_80219()) {
183 printk("note: iq31244 board type has been selected\n");
184 printk("note: to select ep80219 operation:\n");
185 printk("\t1/ specify \"force_ep80219\" on the kernel"
186 " command line\n");
187 printk("\t2/ update boot loader to pass"
188 " the ep80219 id: %d\n", MACH_TYPE_EP80219);
190 pci_common_init(&iq31244_pci);
193 return 0;
196 subsys_initcall(iq31244_pci_init);
200 * IQ31244 machine initialisation.
202 static struct physmap_flash_data iq31244_flash_data = {
203 .width = 2,
206 static struct resource iq31244_flash_resource = {
207 .start = 0xf0000000,
208 .end = 0xf07fffff,
209 .flags = IORESOURCE_MEM,
212 static struct platform_device iq31244_flash_device = {
213 .name = "physmap-flash",
214 .id = 0,
215 .dev = {
216 .platform_data = &iq31244_flash_data,
218 .num_resources = 1,
219 .resource = &iq31244_flash_resource,
222 static struct plat_serial8250_port iq31244_serial_port[] = {
224 .mapbase = IQ31244_UART,
225 .membase = (char *)IQ31244_UART,
226 .irq = IRQ_IOP32X_XINT1,
227 .flags = UPF_SKIP_TEST,
228 .iotype = UPIO_MEM,
229 .regshift = 0,
230 .uartclk = 1843200,
232 { },
235 static struct resource iq31244_uart_resource = {
236 .start = IQ31244_UART,
237 .end = IQ31244_UART + 7,
238 .flags = IORESOURCE_MEM,
241 static struct platform_device iq31244_serial_device = {
242 .name = "serial8250",
243 .id = PLAT8250_DEV_PLATFORM,
244 .dev = {
245 .platform_data = iq31244_serial_port,
247 .num_resources = 1,
248 .resource = &iq31244_uart_resource,
252 * This function will send a SHUTDOWN_COMPLETE message to the PIC
253 * controller over I2C. We are not using the i2c subsystem since
254 * we are going to power off and it may be removed
256 void ep80219_power_off(void)
259 * Send the Address byte w/ the start condition
261 *IOP3XX_IDBR1 = 0x60;
262 *IOP3XX_ICR1 = 0xE9;
263 mdelay(1);
266 * Send the START_MSG byte w/ no start or stop condition
268 *IOP3XX_IDBR1 = 0x0F;
269 *IOP3XX_ICR1 = 0xE8;
270 mdelay(1);
273 * Send the SHUTDOWN_COMPLETE Message ID byte w/ no start or
274 * stop condition
276 *IOP3XX_IDBR1 = 0x03;
277 *IOP3XX_ICR1 = 0xE8;
278 mdelay(1);
281 * Send an ignored byte w/ stop condition
283 *IOP3XX_IDBR1 = 0x00;
284 *IOP3XX_ICR1 = 0xEA;
286 while (1)
290 static void __init iq31244_init_machine(void)
292 platform_device_register(&iop3xx_i2c0_device);
293 platform_device_register(&iop3xx_i2c1_device);
294 platform_device_register(&iq31244_flash_device);
295 platform_device_register(&iq31244_serial_device);
296 platform_device_register(&iop3xx_dma_0_channel);
297 platform_device_register(&iop3xx_dma_1_channel);
299 if (is_ep80219())
300 pm_power_off = ep80219_power_off;
302 if (!is_80219())
303 platform_device_register(&iop3xx_aau_channel);
306 static int __init force_ep80219_setup(char *str)
308 force_ep80219 = 1;
309 return 1;
312 __setup("force_ep80219", force_ep80219_setup);
314 MACHINE_START(IQ31244, "Intel IQ31244")
315 /* Maintainer: Intel Corp. */
316 .boot_params = 0xa0000100,
317 .map_io = iq31244_map_io,
318 .init_irq = iop32x_init_irq,
319 .timer = &iq31244_timer,
320 .init_machine = iq31244_init_machine,
321 MACHINE_END
323 /* There should have been an ep80219 machine identifier from the beginning.
324 * Boot roms older than March 2007 do not know the ep80219 machine id. Pass
325 * "force_ep80219" on the kernel command line, otherwise iq31244 operation
326 * will be selected.
328 MACHINE_START(EP80219, "Intel EP80219")
329 /* Maintainer: Intel Corp. */
330 .boot_params = 0xa0000100,
331 .map_io = iq31244_map_io,
332 .init_irq = iop32x_init_irq,
333 .timer = &iq31244_timer,
334 .init_machine = iq31244_init_machine,
335 MACHINE_END