2 * linux/arch/arm/mach-mmp/pxa168.c
4 * Code specific to PXA168
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/list.h>
16 #include <linux/clk.h>
18 #include <asm/mach/time.h>
19 #include <mach/addr-map.h>
20 #include <mach/cputype.h>
21 #include <mach/regs-apbc.h>
22 #include <mach/regs-apmu.h>
23 #include <mach/irqs.h>
24 #include <mach/gpio.h>
26 #include <mach/devices.h>
32 #define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
34 static struct mfp_addr_map pxa168_mfp_addr_map
[] __initdata
=
36 MFP_ADDR_X(GPIO0
, GPIO36
, 0x04c),
37 MFP_ADDR_X(GPIO37
, GPIO55
, 0x000),
38 MFP_ADDR_X(GPIO56
, GPIO123
, 0x0e0),
39 MFP_ADDR_X(GPIO124
, GPIO127
, 0x0f4),
44 #define APMASK(i) (GPIO_REGS_VIRT + BANK_OFF(i) + 0x09c)
46 static void __init
pxa168_init_gpio(void)
50 /* enable GPIO clock */
51 __raw_writel(APBC_APBCLK
| APBC_FNCLK
, APBC_PXA168_GPIO
);
53 /* unmask GPIO edge detection for all 4 banks - APMASKx */
54 for (i
= 0; i
< 4; i
++)
55 __raw_writel(0xffffffff, APMASK(i
));
57 pxa_init_gpio(IRQ_PXA168_GPIOX
, 0, 127, NULL
);
60 void __init
pxa168_init_irq(void)
66 /* APB peripheral clocks */
67 static APBC_CLK(uart1
, PXA168_UART1
, 1, 14745600);
68 static APBC_CLK(uart2
, PXA168_UART2
, 1, 14745600);
69 static APBC_CLK(twsi0
, PXA168_TWSI0
, 1, 33000000);
70 static APBC_CLK(twsi1
, PXA168_TWSI1
, 1, 33000000);
71 static APBC_CLK(pwm1
, PXA168_PWM1
, 1, 13000000);
72 static APBC_CLK(pwm2
, PXA168_PWM2
, 1, 13000000);
73 static APBC_CLK(pwm3
, PXA168_PWM3
, 1, 13000000);
74 static APBC_CLK(pwm4
, PXA168_PWM4
, 1, 13000000);
75 static APBC_CLK(ssp1
, PXA168_SSP1
, 4, 0);
76 static APBC_CLK(ssp2
, PXA168_SSP2
, 4, 0);
77 static APBC_CLK(ssp3
, PXA168_SSP3
, 4, 0);
78 static APBC_CLK(ssp4
, PXA168_SSP4
, 4, 0);
79 static APBC_CLK(ssp5
, PXA168_SSP5
, 4, 0);
80 static APBC_CLK(keypad
, PXA168_KPC
, 0, 32000);
82 static APMU_CLK(nand
, NAND
, 0x01db, 208000000);
83 static APMU_CLK(lcd
, LCD
, 0x7f, 312000000);
85 /* device and clock bindings */
86 static struct clk_lookup pxa168_clkregs
[] = {
87 INIT_CLKREG(&clk_uart1
, "pxa2xx-uart.0", NULL
),
88 INIT_CLKREG(&clk_uart2
, "pxa2xx-uart.1", NULL
),
89 INIT_CLKREG(&clk_twsi0
, "pxa2xx-i2c.0", NULL
),
90 INIT_CLKREG(&clk_twsi1
, "pxa2xx-i2c.1", NULL
),
91 INIT_CLKREG(&clk_pwm1
, "pxa168-pwm.0", NULL
),
92 INIT_CLKREG(&clk_pwm2
, "pxa168-pwm.1", NULL
),
93 INIT_CLKREG(&clk_pwm3
, "pxa168-pwm.2", NULL
),
94 INIT_CLKREG(&clk_pwm4
, "pxa168-pwm.3", NULL
),
95 INIT_CLKREG(&clk_ssp1
, "pxa168-ssp.0", NULL
),
96 INIT_CLKREG(&clk_ssp2
, "pxa168-ssp.1", NULL
),
97 INIT_CLKREG(&clk_ssp3
, "pxa168-ssp.2", NULL
),
98 INIT_CLKREG(&clk_ssp4
, "pxa168-ssp.3", NULL
),
99 INIT_CLKREG(&clk_ssp5
, "pxa168-ssp.4", NULL
),
100 INIT_CLKREG(&clk_nand
, "pxa3xx-nand", NULL
),
101 INIT_CLKREG(&clk_lcd
, "pxa168-fb", NULL
),
102 INIT_CLKREG(&clk_keypad
, "pxa27x-keypad", NULL
),
105 static int __init
pxa168_init(void)
107 if (cpu_is_pxa168()) {
108 mfp_init_base(MFPR_VIRT_BASE
);
109 mfp_init_addr(pxa168_mfp_addr_map
);
110 pxa_init_dma(IRQ_PXA168_DMA_INT0
, 32);
111 clkdev_add_table(ARRAY_AND_SIZE(pxa168_clkregs
));
116 postcore_initcall(pxa168_init
);
118 /* system timer - clock enabled, 3.25MHz */
119 #define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3))
121 static void __init
pxa168_timer_init(void)
123 /* this is early, we have to initialize the CCU registers by
124 * ourselves instead of using clk_* API. Clock rate is defined
125 * by APBC_TIMERS_CLK_RST (3.25MHz) and enabled free-running
127 __raw_writel(APBC_APBCLK
| APBC_RST
, APBC_PXA168_TIMERS
);
129 /* 3.25MHz, bus/functional clock enabled, release reset */
130 __raw_writel(TIMER_CLK_RST
, APBC_PXA168_TIMERS
);
132 timer_init(IRQ_PXA168_TIMER1
);
135 struct sys_timer pxa168_timer
= {
136 .init
= pxa168_timer_init
,
139 void pxa168_clear_keypad_wakeup(void)
142 uint32_t mask
= APMU_PXA168_KP_WAKE_CLR
;
144 /* wake event clear is needed in order to clear keypad interrupt */
145 val
= __raw_readl(APMU_WAKE_CLR
);
146 __raw_writel(val
| mask
, APMU_WAKE_CLR
);
149 /* on-chip devices */
150 PXA168_DEVICE(uart1
, "pxa2xx-uart", 0, UART1
, 0xd4017000, 0x30, 21, 22);
151 PXA168_DEVICE(uart2
, "pxa2xx-uart", 1, UART2
, 0xd4018000, 0x30, 23, 24);
152 PXA168_DEVICE(twsi0
, "pxa2xx-i2c", 0, TWSI0
, 0xd4011000, 0x28);
153 PXA168_DEVICE(twsi1
, "pxa2xx-i2c", 1, TWSI1
, 0xd4025000, 0x28);
154 PXA168_DEVICE(pwm1
, "pxa168-pwm", 0, NONE
, 0xd401a000, 0x10);
155 PXA168_DEVICE(pwm2
, "pxa168-pwm", 1, NONE
, 0xd401a400, 0x10);
156 PXA168_DEVICE(pwm3
, "pxa168-pwm", 2, NONE
, 0xd401a800, 0x10);
157 PXA168_DEVICE(pwm4
, "pxa168-pwm", 3, NONE
, 0xd401ac00, 0x10);
158 PXA168_DEVICE(nand
, "pxa3xx-nand", -1, NAND
, 0xd4283000, 0x80, 97, 99);
159 PXA168_DEVICE(ssp1
, "pxa168-ssp", 0, SSP1
, 0xd401b000, 0x40, 52, 53);
160 PXA168_DEVICE(ssp2
, "pxa168-ssp", 1, SSP2
, 0xd401c000, 0x40, 54, 55);
161 PXA168_DEVICE(ssp3
, "pxa168-ssp", 2, SSP3
, 0xd401f000, 0x40, 56, 57);
162 PXA168_DEVICE(ssp4
, "pxa168-ssp", 3, SSP4
, 0xd4020000, 0x40, 58, 59);
163 PXA168_DEVICE(ssp5
, "pxa168-ssp", 4, SSP5
, 0xd4021000, 0x40, 60, 61);
164 PXA168_DEVICE(fb
, "pxa168-fb", -1, LCD
, 0xd420b000, 0x1c8);
165 PXA168_DEVICE(keypad
, "pxa27x-keypad", -1, KEYPAD
, 0xd4012000, 0x4c);