arch/arm/mach-tegra/board-trimslice.c

   1 /*
   2  * arch/arm/mach-tegra/board-trimslice.c
   3  *
   4  * Copyright (C) 2011 CompuLab, Ltd.
   5  * Author: Mike Rapoport <mike@compulab.co.il>
   6  *
   7  * Based on board-harmony.c
   8  * Copyright (C) 2010 Google, Inc.
   9  *
  10  * This software is licensed under the terms of the GNU General Public
  11  * License version 2, as published by the Free Software Foundation, and
  12  * may be copied, distributed, and modified under those terms.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  */
  20
  21 #include <linux/kernel.h>
  22 #include <linux/init.h>
  23 #include <linux/platform_device.h>
  24 #include <linux/serial_8250.h>
  25 #include <linux/io.h>
  26
  27 #include <asm/mach-types.h>
  28 #include <asm/mach/arch.h>
  29 #include <asm/setup.h>
  30
  31 #include <mach/iomap.h>
  32 #include <mach/sdhci.h>
  33
  34 #include "board.h"
  35 #include "clock.h"
  36 #include "devices.h"
  37 #include "gpio-names.h"
  38
  39 #include "board-trimslice.h"
  40
  41 static struct plat_serial8250_port debug_uart_platform_data[] = {
  42         {
  43                 .membase        = IO_ADDRESS(TEGRA_UARTA_BASE),
  44                 .mapbase        = TEGRA_UARTA_BASE,
  45                 .irq            = INT_UARTA,
  46                 .flags          = UPF_BOOT_AUTOCONF,
  47                 .iotype         = UPIO_MEM,
  48                 .regshift       = 2,
  49                 .uartclk        = 216000000,
  50         }, {
  51                 .flags          = 0
  52         }
  53 };
  54
  55 static struct platform_device debug_uart = {
  56         .name   = "serial8250",
  57         .id     = PLAT8250_DEV_PLATFORM,
  58         .dev    = {
  59                 .platform_data  = debug_uart_platform_data,
  60         },
  61 };
  62 static struct tegra_sdhci_platform_data sdhci_pdata1 = {
  63         .cd_gpio        = -1,
  64         .wp_gpio        = -1,
  65         .power_gpio     = -1,
  66 };
  67
  68 static struct tegra_sdhci_platform_data sdhci_pdata4 = {
  69         .cd_gpio        = TRIMSLICE_GPIO_SD4_CD,
  70         .wp_gpio        = TRIMSLICE_GPIO_SD4_WP,
  71         .power_gpio     = -1,
  72 };
  73
  74 static struct platform_device *trimslice_devices[] __initdata = {
  75         &debug_uart,
  76         &tegra_sdhci_device1,
  77         &tegra_sdhci_device4,
  78 };
  79
  80 static void __init tegra_trimslice_fixup(struct machine_desc *desc,
  81         struct tag *tags, char **cmdline, struct meminfo *mi)
  82 {
  83         mi->nr_banks = 2;
  84         mi->bank[0].start = PHYS_OFFSET;
  85         mi->bank[0].size = 448 * SZ_1M;
  86         mi->bank[1].start = SZ_512M;
  87         mi->bank[1].size = SZ_512M;
  88 }
  89
  90 static __initdata struct tegra_clk_init_table trimslice_clk_init_table[] = {
  91         /* name         parent          rate            enabled */
  92         { "uarta",      "pll_p",        216000000,      true },
  93         { NULL,         NULL,           0,              0},
  94 };
  95
  96 static int __init tegra_trimslice_pci_init(void)
  97 {
  98         if (!machine_is_trimslice())
  99                 return 0;
 100
 101         return tegra_pcie_init(true, true);
 102 }
 103 subsys_initcall(tegra_trimslice_pci_init);
 104
 105 static void __init tegra_trimslice_init(void)
 106 {
 107         tegra_clk_init_from_table(trimslice_clk_init_table);
 108
 109         trimslice_pinmux_init();
 110
 111         tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1;
 112         tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4;
 113
 114         platform_add_devices(trimslice_devices, ARRAY_SIZE(trimslice_devices));
 115 }
 116
 117 MACHINE_START(TRIMSLICE, "trimslice")
 118         .boot_params    = 0x00000100,
 119         .fixup          = tegra_trimslice_fixup,
 120         .map_io         = tegra_map_common_io,
 121         .init_early     = tegra_init_early,
 122         .init_irq       = tegra_init_irq,
 123         .timer          = &tegra_timer,
 124         .init_machine   = tegra_trimslice_init,
 125 MACHINE_END