arch/arm/plat-versatile/sched-clock.c

   1 /*
   2  *  linux/arch/arm/plat-versatile/sched-clock.c
   3  *
   4  *  Copyright (C) 1999 - 2003 ARM Limited
   5  *  Copyright (C) 2000 Deep Blue Solutions Ltd
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  20  */
  21 #include <linux/io.h>
  22 #include <linux/sched.h>
  23
  24 #include <asm/sched_clock.h>
  25 #include <plat/sched_clock.h>
  26
  27 static DEFINE_CLOCK_DATA(cd);
  28 static void __iomem *ctr;
  29
  30 /*
  31  * Constants generated by clocks_calc_mult_shift(m, s, 24MHz, NSEC_PER_SEC, 60).
  32  * This gives a resolution of about 41ns and a wrap period of about 178s.
  33  */
  34 #define SC_MULT         2796202667u
  35 #define SC_SHIFT        26
  36
  37 unsigned long long notrace sched_clock(void)
  38 {
  39         if (ctr) {
  40                 u32 cyc = readl(ctr);
  41                 return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0,
  42                                                 SC_MULT, SC_SHIFT);
  43         } else
  44                 return 0;
  45 }
  46
  47 static void notrace versatile_update_sched_clock(void)
  48 {
  49         u32 cyc = readl(ctr);
  50         update_sched_clock(&cd, cyc, (u32)~0);
  51 }
  52
  53 void __init versatile_sched_clock_init(void __iomem *reg, unsigned long rate)
  54 {
  55         ctr = reg;
  56         init_fixed_sched_clock(&cd, versatile_update_sched_clock,
  57                                32, rate, SC_MULT, SC_SHIFT);
  58 }