2 * Board-specific setup code for the ATNGW100 Network Gateway
4 * Copyright (C) 2005-2006 Atmel Corporation
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 #include <linux/clk.h>
11 #include <linux/etherdevice.h>
12 #include <linux/gpio.h>
13 #include <linux/irq.h>
14 #include <linux/i2c.h>
15 #include <linux/i2c-gpio.h>
16 #include <linux/init.h>
17 #include <linux/linkage.h>
18 #include <linux/platform_device.h>
19 #include <linux/types.h>
20 #include <linux/leds.h>
21 #include <linux/spi/spi.h>
22 #include <linux/atmel-mci.h>
23 #include <linux/usb/atmel_usba_udc.h>
26 #include <asm/setup.h>
28 #include <mach/at32ap700x.h>
29 #include <mach/board.h>
30 #include <mach/init.h>
31 #include <mach/portmux.h>
33 /* Oscillator frequencies. These are board-specific */
34 unsigned long at32_board_osc_rates
[3] = {
35 [0] = 32768, /* 32.768 kHz on RTC osc */
36 [1] = 20000000, /* 20 MHz on osc0 */
37 [2] = 12000000, /* 12 MHz on osc1 */
41 * The ATNGW100 mkII is very similar to the ATNGW100. Both have the AT32AP7000
42 * chip on board; the difference is that the ATNGW100 mkII has 128 MB 32-bit
43 * SDRAM (the ATNGW100 has 32 MB 16-bit SDRAM) and 256 MB 16-bit NAND flash
44 * (the ATNGW100 has none.)
46 * The RAM difference is handled by the boot loader, so the only difference we
47 * end up handling here is the NAND flash, EBI pin reservation and if LCDC or
48 * MACB1 should be enabled.
50 #ifdef CONFIG_BOARD_ATNGW100_MKII
51 #include <linux/mtd/partitions.h>
54 static struct smc_timing nand_timing __initdata
= {
62 .ncs_write_pulse
= 30,
68 .ncs_read_recover
= 0,
70 .ncs_write_recover
= 0,
71 /* WE# high -> RE# low min 60 ns */
75 static struct smc_config nand_config __initdata
= {
85 static struct mtd_partition nand_partitions
[] = {
89 .size
= MTDPART_SIZ_FULL
,
93 static struct mtd_partition
*nand_part_info(int size
, int *num_partitions
)
95 *num_partitions
= ARRAY_SIZE(nand_partitions
);
96 return nand_partitions
;
99 static struct atmel_nand_data atngw100mkii_nand_data __initdata
= {
102 .rdy_pin
= GPIO_PIN_PB(28),
103 .enable_pin
= GPIO_PIN_PE(23),
104 .bus_width_16
= true,
105 .partition_info
= nand_part_info
,
109 /* Initialized by bootloader-specific startup code. */
110 struct tag
*bootloader_tags __initdata
;
115 static struct eth_addr __initdata hw_addr
[2];
116 static struct eth_platform_data __initdata eth_data
[2];
118 static struct spi_board_info spi0_board_info
[] __initdata
= {
120 .modalias
= "mtd_dataflash",
121 .max_speed_hz
= 8000000,
126 static struct mci_platform_data __initdata mci0_data
= {
129 #if defined(CONFIG_BOARD_ATNGW100_MKII)
130 .detect_pin
= GPIO_PIN_PC(25),
131 .wp_pin
= GPIO_PIN_PE(22),
133 .detect_pin
= GPIO_PIN_PC(25),
134 .wp_pin
= GPIO_PIN_PE(0),
139 static struct usba_platform_data atngw100_usba_data __initdata
= {
140 #if defined(CONFIG_BOARD_ATNGW100_MKII)
141 .vbus_pin
= GPIO_PIN_PE(26),
148 * The next two functions should go away as the boot loader is
149 * supposed to initialize the macb address registers with a valid
150 * ethernet address. But we need to keep it around for a while until
151 * we can be reasonably sure the boot loader does this.
153 * The phy_id is ignored as the driver will probe for it.
155 static int __init
parse_tag_ethernet(struct tag
*tag
)
159 i
= tag
->u
.ethernet
.mac_index
;
160 if (i
< ARRAY_SIZE(hw_addr
))
161 memcpy(hw_addr
[i
].addr
, tag
->u
.ethernet
.hw_address
,
162 sizeof(hw_addr
[i
].addr
));
166 __tagtable(ATAG_ETHERNET
, parse_tag_ethernet
);
168 static void __init
set_hw_addr(struct platform_device
*pdev
)
170 struct resource
*res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
177 if (pdev
->id
>= ARRAY_SIZE(hw_addr
))
180 addr
= hw_addr
[pdev
->id
].addr
;
181 if (!is_valid_ether_addr(addr
))
185 * Since this is board-specific code, we'll cheat and use the
186 * physical address directly as we happen to know that it's
187 * the same as the virtual address.
189 regs
= (void __iomem __force
*)res
->start
;
190 pclk
= clk_get(&pdev
->dev
, "pclk");
195 __raw_writel((addr
[3] << 24) | (addr
[2] << 16)
196 | (addr
[1] << 8) | addr
[0], regs
+ 0x98);
197 __raw_writel((addr
[5] << 8) | addr
[4], regs
+ 0x9c);
202 void __init
setup_board(void)
204 at32_map_usart(1, 0, 0); /* USART 1: /dev/ttyS0, DB9 */
205 at32_setup_serial_console(0);
208 static const struct gpio_led ngw_leds
[] = {
209 { .name
= "sys", .gpio
= GPIO_PIN_PA(16), .active_low
= 1,
210 .default_trigger
= "heartbeat",
212 { .name
= "a", .gpio
= GPIO_PIN_PA(19), .active_low
= 1, },
213 { .name
= "b", .gpio
= GPIO_PIN_PE(19), .active_low
= 1, },
216 static const struct gpio_led_platform_data ngw_led_data
= {
217 .num_leds
= ARRAY_SIZE(ngw_leds
),
218 .leds
= (void *) ngw_leds
,
221 static struct platform_device ngw_gpio_leds
= {
225 .platform_data
= (void *) &ngw_led_data
,
229 static struct i2c_gpio_platform_data i2c_gpio_data
= {
230 .sda_pin
= GPIO_PIN_PA(6),
231 .scl_pin
= GPIO_PIN_PA(7),
232 .sda_is_open_drain
= 1,
233 .scl_is_open_drain
= 1,
234 .udelay
= 2, /* close to 100 kHz */
237 static struct platform_device i2c_gpio_device
= {
241 .platform_data
= &i2c_gpio_data
,
245 static struct i2c_board_info __initdata i2c_info
[] = {
246 /* NOTE: original ATtiny24 firmware is at address 0x0b */
249 static int __init
atngw100_init(void)
254 * ATNGW100 mkII uses 32-bit SDRAM interface. Reserve the
255 * SDRAM-specific pins so that nobody messes with them.
257 #ifdef CONFIG_BOARD_ATNGW100_MKII
258 at32_reserve_pin(GPIO_PIOE_BASE
, ATMEL_EBI_PE_DATA_ALL
);
260 smc_set_timing(&nand_config
, &nand_timing
);
261 smc_set_configuration(3, &nand_config
);
262 at32_add_device_nand(0, &atngw100mkii_nand_data
);
265 at32_add_device_usart(0);
267 set_hw_addr(at32_add_device_eth(0, ð_data
[0]));
268 #ifndef CONFIG_BOARD_ATNGW100_MKII_LCD
269 set_hw_addr(at32_add_device_eth(1, ð_data
[1]));
272 at32_add_device_spi(0, spi0_board_info
, ARRAY_SIZE(spi0_board_info
));
273 at32_add_device_mci(0, &mci0_data
);
274 at32_add_device_usba(0, &atngw100_usba_data
);
276 for (i
= 0; i
< ARRAY_SIZE(ngw_leds
); i
++) {
277 at32_select_gpio(ngw_leds
[i
].gpio
,
278 AT32_GPIOF_OUTPUT
| AT32_GPIOF_HIGH
);
280 platform_device_register(&ngw_gpio_leds
);
282 /* all these i2c/smbus pins should have external pullups for
283 * open-drain sharing among all I2C devices. SDA and SCL do;
284 * PB28/EXTINT3 (ATNGW100) and PE21 (ATNGW100 mkII) doesn't; it should
285 * be SMBALERT# (for PMBus), but it's not available off-board.
287 #ifdef CONFIG_BOARD_ATNGW100_MKII
288 at32_select_periph(GPIO_PIOE_BASE
, 1 << 21, 0, AT32_GPIOF_PULLUP
);
290 at32_select_periph(GPIO_PIOB_BASE
, 1 << 28, 0, AT32_GPIOF_PULLUP
);
292 at32_select_gpio(i2c_gpio_data
.sda_pin
,
293 AT32_GPIOF_MULTIDRV
| AT32_GPIOF_OUTPUT
| AT32_GPIOF_HIGH
);
294 at32_select_gpio(i2c_gpio_data
.scl_pin
,
295 AT32_GPIOF_MULTIDRV
| AT32_GPIOF_OUTPUT
| AT32_GPIOF_HIGH
);
296 platform_device_register(&i2c_gpio_device
);
297 i2c_register_board_info(0, i2c_info
, ARRAY_SIZE(i2c_info
));
301 postcore_initcall(atngw100_init
);
303 static int __init
atngw100_arch_init(void)
305 /* PB30 (ATNGW100) and PE30 (ATNGW100 mkII) is the otherwise unused
306 * jumper on the mainboard, with an external pullup; the jumper grounds
307 * it. Use it however you like, including letting U-Boot or Linux tweak
310 #ifdef CONFIG_BOARD_ATNGW100_MKII
311 at32_select_gpio(GPIO_PIN_PE(30), 0);
312 gpio_request(GPIO_PIN_PE(30), "j15");
313 gpio_direction_input(GPIO_PIN_PE(30));
314 gpio_export(GPIO_PIN_PE(30), false);
316 at32_select_gpio(GPIO_PIN_PB(30), 0);
317 gpio_request(GPIO_PIN_PB(30), "j15");
318 gpio_direction_input(GPIO_PIN_PB(30));
319 gpio_export(GPIO_PIN_PB(30), false);
322 /* set_irq_type() after the arch_initcall for EIC has run, and
323 * before the I2C subsystem could try using this IRQ.
325 return irq_set_irq_type(AT32_EXTINT(3), IRQ_TYPE_EDGE_FALLING
);
327 arch_initcall(atngw100_arch_init
);