arch/blackfin/mach-bf527/boards/ezbrd.c

   1 /*
   2  * Copyright 2004-2009 Analog Devices Inc.
   3  *                2005 National ICT Australia (NICTA)
   4  *                      Aidan Williams <aidan@nicta.com.au>
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <linux/device.h>
  10 #include <linux/platform_device.h>
  11 #include <linux/mtd/mtd.h>
  12 #include <linux/mtd/partitions.h>
  13 #include <linux/mtd/physmap.h>
  14 #include <linux/spi/spi.h>
  15 #include <linux/spi/flash.h>
  16
  17 #include <linux/i2c.h>
  18 #include <linux/irq.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/usb/musb.h>
  21 #include <asm/dma.h>
  22 #include <asm/bfin5xx_spi.h>
  23 #include <asm/reboot.h>
  24 #include <asm/nand.h>
  25 #include <asm/portmux.h>
  26 #include <asm/dpmc.h>
  27 #include <linux/spi/ad7877.h>
  28
  29 /*
  30  * Name the Board for the /proc/cpuinfo
  31  */
  32 const char bfin_board_name[] = "ADI BF526-EZBRD";
  33
  34 /*
  35  *  Driver needs to know address, irq and flag pin.
  36  */
  37
  38 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  39 static struct resource musb_resources[] = {
  40         [0] = {
  41                 .start  = 0xffc03800,
  42                 .end    = 0xffc03cff,
  43                 .flags  = IORESOURCE_MEM,
  44         },
  45         [1] = { /* general IRQ */
  46                 .start  = IRQ_USB_INT0,
  47                 .end    = IRQ_USB_INT0,
  48                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  49                 .name   = "mc"
  50         },
  51         [2] = { /* DMA IRQ */
  52                 .start  = IRQ_USB_DMA,
  53                 .end    = IRQ_USB_DMA,
  54                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  55                 .name   = "dma"
  56         },
  57 };
  58
  59 static struct musb_hdrc_config musb_config = {
  60         .multipoint     = 0,
  61         .dyn_fifo       = 0,
  62         .soft_con       = 1,
  63         .dma            = 1,
  64         .num_eps        = 8,
  65         .dma_channels   = 8,
  66         .gpio_vrsel     = GPIO_PG13,
  67         /* Some custom boards need to be active low, just set it to "0"
  68          * if it is the case.
  69          */
  70         .gpio_vrsel_active      = 1,
  71         .clkin          = 24,           /* musb CLKIN in MHZ */
  72 };
  73
  74 static struct musb_hdrc_platform_data musb_plat = {
  75 #if defined(CONFIG_USB_MUSB_OTG)
  76         .mode           = MUSB_OTG,
  77 #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  78         .mode           = MUSB_HOST,
  79 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  80         .mode           = MUSB_PERIPHERAL,
  81 #endif
  82         .config         = &musb_config,
  83 };
  84
  85 static u64 musb_dmamask = ~(u32)0;
  86
  87 static struct platform_device musb_device = {
  88         .name           = "musb-blackfin",
  89         .id             = 0,
  90         .dev = {
  91                 .dma_mask               = &musb_dmamask,
  92                 .coherent_dma_mask      = 0xffffffff,
  93                 .platform_data          = &musb_plat,
  94         },
  95         .num_resources  = ARRAY_SIZE(musb_resources),
  96         .resource       = musb_resources,
  97 };
  98 #endif
  99
 100 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 101 static struct mtd_partition ezbrd_partitions[] = {
 102         {
 103                 .name       = "bootloader(nor)",
 104                 .size       = 0x40000,
 105                 .offset     = 0,
 106         }, {
 107                 .name       = "linux kernel(nor)",
 108                 .size       = 0x1C0000,
 109                 .offset     = MTDPART_OFS_APPEND,
 110         }, {
 111                 .name       = "file system(nor)",
 112                 .size       = MTDPART_SIZ_FULL,
 113                 .offset     = MTDPART_OFS_APPEND,
 114         }
 115 };
 116
 117 static struct physmap_flash_data ezbrd_flash_data = {
 118         .width      = 2,
 119         .parts      = ezbrd_partitions,
 120         .nr_parts   = ARRAY_SIZE(ezbrd_partitions),
 121 };
 122
 123 static struct resource ezbrd_flash_resource = {
 124         .start = 0x20000000,
 125         .end   = 0x203fffff,
 126         .flags = IORESOURCE_MEM,
 127 };
 128
 129 static struct platform_device ezbrd_flash_device = {
 130         .name          = "physmap-flash",
 131         .id            = 0,
 132         .dev = {
 133                 .platform_data = &ezbrd_flash_data,
 134         },
 135         .num_resources = 1,
 136         .resource      = &ezbrd_flash_resource,
 137 };
 138 #endif
 139
 140 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
 141 static struct mtd_partition partition_info[] = {
 142         {
 143                 .name = "bootloader(nand)",
 144                 .offset = 0,
 145                 .size = 0x40000,
 146         }, {
 147                 .name = "linux kernel(nand)",
 148                 .offset = MTDPART_OFS_APPEND,
 149                 .size = 4 * 1024 * 1024,
 150         },
 151         {
 152                 .name = "file system(nand)",
 153                 .offset = MTDPART_OFS_APPEND,
 154                 .size = MTDPART_SIZ_FULL,
 155         },
 156 };
 157
 158 static struct bf5xx_nand_platform bf5xx_nand_platform = {
 159         .data_width = NFC_NWIDTH_8,
 160         .partitions = partition_info,
 161         .nr_partitions = ARRAY_SIZE(partition_info),
 162         .rd_dly = 3,
 163         .wr_dly = 3,
 164 };
 165
 166 static struct resource bf5xx_nand_resources[] = {
 167         {
 168                 .start = NFC_CTL,
 169                 .end = NFC_DATA_RD + 2,
 170                 .flags = IORESOURCE_MEM,
 171         },
 172         {
 173                 .start = CH_NFC,
 174                 .end = CH_NFC,
 175                 .flags = IORESOURCE_IRQ,
 176         },
 177 };
 178
 179 static struct platform_device bf5xx_nand_device = {
 180         .name = "bf5xx-nand",
 181         .id = 0,
 182         .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
 183         .resource = bf5xx_nand_resources,
 184         .dev = {
 185                 .platform_data = &bf5xx_nand_platform,
 186         },
 187 };
 188 #endif
 189
 190 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 191 static struct platform_device rtc_device = {
 192         .name = "rtc-bfin",
 193         .id   = -1,
 194 };
 195 #endif
 196
 197
 198 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 199 #include <linux/bfin_mac.h>
 200 static const unsigned short bfin_mac_peripherals[] = P_RMII0;
 201
 202 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
 203         {
 204                 .addr = 1,
 205                 .irq = IRQ_MAC_PHYINT,
 206         },
 207 };
 208
 209 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
 210         .phydev_number = 1,
 211         .phydev_data = bfin_phydev_data,
 212         .phy_mode = PHY_INTERFACE_MODE_RMII,
 213         .mac_peripherals = bfin_mac_peripherals,
 214 };
 215
 216 static struct platform_device bfin_mii_bus = {
 217         .name = "bfin_mii_bus",
 218         .dev = {
 219                 .platform_data = &bfin_mii_bus_data,
 220         }
 221 };
 222
 223 static struct platform_device bfin_mac_device = {
 224         .name = "bfin_mac",
 225         .dev = {
 226                 .platform_data = &bfin_mii_bus,
 227         }
 228 };
 229 #endif
 230
 231 #if defined(CONFIG_MTD_M25P80) \
 232         || defined(CONFIG_MTD_M25P80_MODULE)
 233 static struct mtd_partition bfin_spi_flash_partitions[] = {
 234         {
 235                 .name = "bootloader(spi)",
 236                 .size = 0x00040000,
 237                 .offset = 0,
 238                 .mask_flags = MTD_CAP_ROM
 239         }, {
 240                 .name = "linux kernel(spi)",
 241                 .size = MTDPART_SIZ_FULL,
 242                 .offset = MTDPART_OFS_APPEND,
 243         }
 244 };
 245
 246 static struct flash_platform_data bfin_spi_flash_data = {
 247         .name = "m25p80",
 248         .parts = bfin_spi_flash_partitions,
 249         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 250         .type = "sst25wf040",
 251 };
 252
 253 /* SPI flash chip (sst25wf040) */
 254 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 255         .enable_dma = 0,         /* use dma transfer with this chip*/
 256         .bits_per_word = 8,
 257 };
 258 #endif
 259
 260 #if defined(CONFIG_BFIN_SPI_ADC) \
 261         || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 262 /* SPI ADC chip */
 263 static struct bfin5xx_spi_chip spi_adc_chip_info = {
 264         .enable_dma = 1,         /* use dma transfer with this chip*/
 265         .bits_per_word = 16,
 266 };
 267 #endif
 268
 269 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 270 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
 271         .enable_dma = 0,
 272         .bits_per_word = 8,
 273 };
 274 #endif
 275
 276 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 277 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
 278         .enable_dma = 0,
 279         .bits_per_word = 16,
 280 };
 281
 282 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
 283         .model                  = 7877,
 284         .vref_delay_usecs       = 50,   /* internal, no capacitor */
 285         .x_plate_ohms           = 419,
 286         .y_plate_ohms           = 486,
 287         .pressure_max           = 1000,
 288         .pressure_min           = 0,
 289         .stopacq_polarity       = 1,
 290         .first_conversion_delay = 3,
 291         .acquisition_time       = 1,
 292         .averaging              = 1,
 293         .pen_down_acc_interval  = 1,
 294 };
 295 #endif
 296
 297 #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
 298 #include <linux/spi/ad7879.h>
 299 static const struct ad7879_platform_data bfin_ad7879_ts_info = {
 300         .model                  = 7879, /* Model = AD7879 */
 301         .x_plate_ohms           = 620,  /* 620 Ohm from the touch datasheet */
 302         .pressure_max           = 10000,
 303         .pressure_min           = 0,
 304         .first_conversion_delay = 3,    /* wait 512us before do a first conversion */
 305         .acquisition_time       = 1,    /* 4us acquisition time per sample */
 306         .median                 = 2,    /* do 8 measurements */
 307         .averaging              = 1,    /* take the average of 4 middle samples */
 308         .pen_down_acc_interval  = 255,  /* 9.4 ms */
 309         .gpio_export            = 1,    /* Export GPIO to gpiolib */
 310         .gpio_base              = -1,   /* Dynamic allocation */
 311 };
 312 #endif
 313
 314 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
 315 static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
 316         .enable_dma = 0,
 317         .bits_per_word = 16,
 318 };
 319 #endif
 320
 321 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
 322          && defined(CONFIG_SND_SOC_WM8731_SPI)
 323 static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
 324         .enable_dma = 0,
 325         .bits_per_word = 16,
 326 };
 327 #endif
 328
 329 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 330 static struct bfin5xx_spi_chip spidev_chip_info = {
 331         .enable_dma = 0,
 332         .bits_per_word = 8,
 333 };
 334 #endif
 335
 336 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 337 static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
 338         .enable_dma = 0,
 339         .bits_per_word = 8,
 340 };
 341 #endif
 342
 343 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 344 #if defined(CONFIG_MTD_M25P80) \
 345         || defined(CONFIG_MTD_M25P80_MODULE)
 346         {
 347                 /* the modalias must be the same as spi device driver name */
 348                 .modalias = "m25p80", /* Name of spi_driver for this device */
 349                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 350                 .bus_num = 0, /* Framework bus number */
 351                 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
 352                 .platform_data = &bfin_spi_flash_data,
 353                 .controller_data = &spi_flash_chip_info,
 354                 .mode = SPI_MODE_3,
 355         },
 356 #endif
 357
 358 #if defined(CONFIG_BFIN_SPI_ADC) \
 359         || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 360         {
 361                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
 362                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
 363                 .bus_num = 0, /* Framework bus number */
 364                 .chip_select = 1, /* Framework chip select. */
 365                 .platform_data = NULL, /* No spi_driver specific config */
 366                 .controller_data = &spi_adc_chip_info,
 367         },
 368 #endif
 369
 370 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 371         {
 372                 .modalias = "mmc_spi",
 373                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 374                 .bus_num = 0,
 375                 .chip_select = 5,
 376                 .controller_data = &mmc_spi_chip_info,
 377                 .mode = SPI_MODE_3,
 378         },
 379 #endif
 380 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 381         {
 382                 .modalias               = "ad7877",
 383                 .platform_data          = &bfin_ad7877_ts_info,
 384                 .irq                    = IRQ_PF8,
 385                 .max_speed_hz   = 12500000,     /* max spi clock (SCK) speed in HZ */
 386                 .bus_num        = 0,
 387                 .chip_select  = 2,
 388                 .controller_data = &spi_ad7877_chip_info,
 389         },
 390 #endif
 391 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
 392         {
 393                 .modalias = "ad7879",
 394                 .platform_data = &bfin_ad7879_ts_info,
 395                 .irq = IRQ_PG0,
 396                 .max_speed_hz = 5000000,     /* max spi clock (SCK) speed in HZ */
 397                 .bus_num = 0,
 398                 .chip_select = 5,
 399                 .controller_data = &spi_ad7879_chip_info,
 400                 .mode = SPI_CPHA | SPI_CPOL,
 401         },
 402 #endif
 403 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
 404          && defined(CONFIG_SND_SOC_WM8731_SPI)
 405         {
 406                 .modalias       = "wm8731",
 407                 .max_speed_hz   = 3125000,     /* max spi clock (SCK) speed in HZ */
 408                 .bus_num        = 0,
 409                 .chip_select    = 5,
 410                 .controller_data = &spi_wm8731_chip_info,
 411                 .mode = SPI_MODE_0,
 412         },
 413 #endif
 414 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 415         {
 416                 .modalias = "spidev",
 417                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 418                 .bus_num = 0,
 419                 .chip_select = 1,
 420                 .controller_data = &spidev_chip_info,
 421         },
 422 #endif
 423 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 424         {
 425                 .modalias = "bfin-lq035q1-spi",
 426                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
 427                 .bus_num = 0,
 428                 .chip_select = 1,
 429                 .controller_data = &lq035q1_spi_chip_info,
 430                 .mode = SPI_CPHA | SPI_CPOL,
 431         },
 432 #endif
 433 };
 434
 435 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 436 /* SPI controller data */
 437 static struct bfin5xx_spi_master bfin_spi0_info = {
 438         .num_chipselect = 8,
 439         .enable_dma = 1,  /* master has the ability to do dma transfer */
 440         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 441 };
 442
 443 /* SPI (0) */
 444 static struct resource bfin_spi0_resource[] = {
 445         [0] = {
 446                 .start = SPI0_REGBASE,
 447                 .end   = SPI0_REGBASE + 0xFF,
 448                 .flags = IORESOURCE_MEM,
 449                 },
 450         [1] = {
 451                 .start = CH_SPI,
 452                 .end   = CH_SPI,
 453                 .flags = IORESOURCE_DMA,
 454         },
 455         [2] = {
 456                 .start = IRQ_SPI,
 457                 .end   = IRQ_SPI,
 458                 .flags = IORESOURCE_IRQ,
 459         },
 460 };
 461
 462 static struct platform_device bfin_spi0_device = {
 463         .name = "bfin-spi",
 464         .id = 0, /* Bus number */
 465         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 466         .resource = bfin_spi0_resource,
 467         .dev = {
 468                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 469         },
 470 };
 471 #endif  /* spi master and devices */
 472
 473 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 474 #ifdef CONFIG_SERIAL_BFIN_UART0
 475 static struct resource bfin_uart0_resources[] = {
 476         {
 477                 .start = UART0_THR,
 478                 .end = UART0_GCTL+2,
 479                 .flags = IORESOURCE_MEM,
 480         },
 481         {
 482                 .start = IRQ_UART0_RX,
 483                 .end = IRQ_UART0_RX+1,
 484                 .flags = IORESOURCE_IRQ,
 485         },
 486         {
 487                 .start = IRQ_UART0_ERROR,
 488                 .end = IRQ_UART0_ERROR,
 489                 .flags = IORESOURCE_IRQ,
 490         },
 491         {
 492                 .start = CH_UART0_TX,
 493                 .end = CH_UART0_TX,
 494                 .flags = IORESOURCE_DMA,
 495         },
 496         {
 497                 .start = CH_UART0_RX,
 498                 .end = CH_UART0_RX,
 499                 .flags = IORESOURCE_DMA,
 500         },
 501 };
 502
 503 static unsigned short bfin_uart0_peripherals[] = {
 504         P_UART0_TX, P_UART0_RX, 0
 505 };
 506
 507 static struct platform_device bfin_uart0_device = {
 508         .name = "bfin-uart",
 509         .id = 0,
 510         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 511         .resource = bfin_uart0_resources,
 512         .dev = {
 513                 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
 514         },
 515 };
 516 #endif
 517 #ifdef CONFIG_SERIAL_BFIN_UART1
 518 static struct resource bfin_uart1_resources[] = {
 519         {
 520                 .start = UART1_THR,
 521                 .end = UART1_GCTL+2,
 522                 .flags = IORESOURCE_MEM,
 523         },
 524         {
 525                 .start = IRQ_UART1_RX,
 526                 .end = IRQ_UART1_RX+1,
 527                 .flags = IORESOURCE_IRQ,
 528         },
 529         {
 530                 .start = IRQ_UART1_ERROR,
 531                 .end = IRQ_UART1_ERROR,
 532                 .flags = IORESOURCE_IRQ,
 533         },
 534         {
 535                 .start = CH_UART1_TX,
 536                 .end = CH_UART1_TX,
 537                 .flags = IORESOURCE_DMA,
 538         },
 539         {
 540                 .start = CH_UART1_RX,
 541                 .end = CH_UART1_RX,
 542                 .flags = IORESOURCE_DMA,
 543         },
 544 #ifdef CONFIG_BFIN_UART1_CTSRTS
 545         {       /* CTS pin */
 546                 .start = GPIO_PG0,
 547                 .end = GPIO_PG0,
 548                 .flags = IORESOURCE_IO,
 549         },
 550         {       /* RTS pin */
 551                 .start = GPIO_PF10,
 552                 .end = GPIO_PF10,
 553                 .flags = IORESOURCE_IO,
 554         },
 555 #endif
 556 };
 557
 558 static unsigned short bfin_uart1_peripherals[] = {
 559         P_UART1_TX, P_UART1_RX, 0
 560 };
 561
 562 static struct platform_device bfin_uart1_device = {
 563         .name = "bfin-uart",
 564         .id = 1,
 565         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 566         .resource = bfin_uart1_resources,
 567         .dev = {
 568                 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
 569         },
 570 };
 571 #endif
 572 #endif
 573
 574 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 575 #ifdef CONFIG_BFIN_SIR0
 576 static struct resource bfin_sir0_resources[] = {
 577         {
 578                 .start = 0xFFC00400,
 579                 .end = 0xFFC004FF,
 580                 .flags = IORESOURCE_MEM,
 581         },
 582         {
 583                 .start = IRQ_UART0_RX,
 584                 .end = IRQ_UART0_RX+1,
 585                 .flags = IORESOURCE_IRQ,
 586         },
 587         {
 588                 .start = CH_UART0_RX,
 589                 .end = CH_UART0_RX+1,
 590                 .flags = IORESOURCE_DMA,
 591         },
 592 };
 593
 594 static struct platform_device bfin_sir0_device = {
 595         .name = "bfin_sir",
 596         .id = 0,
 597         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 598         .resource = bfin_sir0_resources,
 599 };
 600 #endif
 601 #ifdef CONFIG_BFIN_SIR1
 602 static struct resource bfin_sir1_resources[] = {
 603         {
 604                 .start = 0xFFC02000,
 605                 .end = 0xFFC020FF,
 606                 .flags = IORESOURCE_MEM,
 607         },
 608         {
 609                 .start = IRQ_UART1_RX,
 610                 .end = IRQ_UART1_RX+1,
 611                 .flags = IORESOURCE_IRQ,
 612         },
 613         {
 614                 .start = CH_UART1_RX,
 615                 .end = CH_UART1_RX+1,
 616                 .flags = IORESOURCE_DMA,
 617         },
 618 };
 619
 620 static struct platform_device bfin_sir1_device = {
 621         .name = "bfin_sir",
 622         .id = 1,
 623         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 624         .resource = bfin_sir1_resources,
 625 };
 626 #endif
 627 #endif
 628
 629 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 630 static struct resource bfin_twi0_resource[] = {
 631         [0] = {
 632                 .start = TWI0_REGBASE,
 633                 .end   = TWI0_REGBASE,
 634                 .flags = IORESOURCE_MEM,
 635         },
 636         [1] = {
 637                 .start = IRQ_TWI,
 638                 .end   = IRQ_TWI,
 639                 .flags = IORESOURCE_IRQ,
 640         },
 641 };
 642
 643 static struct platform_device i2c_bfin_twi_device = {
 644         .name = "i2c-bfin-twi",
 645         .id = 0,
 646         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 647         .resource = bfin_twi0_resource,
 648 };
 649 #endif
 650
 651 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 652 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
 653         {
 654                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
 655         },
 656 #endif
 657 #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
 658         {
 659                 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
 660                 .irq = IRQ_PF8,
 661         },
 662 #endif
 663 };
 664
 665 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 666 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 667 static struct resource bfin_sport0_uart_resources[] = {
 668         {
 669                 .start = SPORT0_TCR1,
 670                 .end = SPORT0_MRCS3+4,
 671                 .flags = IORESOURCE_MEM,
 672         },
 673         {
 674                 .start = IRQ_SPORT0_RX,
 675                 .end = IRQ_SPORT0_RX+1,
 676                 .flags = IORESOURCE_IRQ,
 677         },
 678         {
 679                 .start = IRQ_SPORT0_ERROR,
 680                 .end = IRQ_SPORT0_ERROR,
 681                 .flags = IORESOURCE_IRQ,
 682         },
 683 };
 684
 685 static unsigned short bfin_sport0_peripherals[] = {
 686         P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
 687         P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
 688 };
 689
 690 static struct platform_device bfin_sport0_uart_device = {
 691         .name = "bfin-sport-uart",
 692         .id = 0,
 693         .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
 694         .resource = bfin_sport0_uart_resources,
 695         .dev = {
 696                 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
 697         },
 698 };
 699 #endif
 700 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 701 static struct resource bfin_sport1_uart_resources[] = {
 702         {
 703                 .start = SPORT1_TCR1,
 704                 .end = SPORT1_MRCS3+4,
 705                 .flags = IORESOURCE_MEM,
 706         },
 707         {
 708                 .start = IRQ_SPORT1_RX,
 709                 .end = IRQ_SPORT1_RX+1,
 710                 .flags = IORESOURCE_IRQ,
 711         },
 712         {
 713                 .start = IRQ_SPORT1_ERROR,
 714                 .end = IRQ_SPORT1_ERROR,
 715                 .flags = IORESOURCE_IRQ,
 716         },
 717 };
 718
 719 static unsigned short bfin_sport1_peripherals[] = {
 720         P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
 721         P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
 722 };
 723
 724 static struct platform_device bfin_sport1_uart_device = {
 725         .name = "bfin-sport-uart",
 726         .id = 1,
 727         .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
 728         .resource = bfin_sport1_uart_resources,
 729         .dev = {
 730                 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
 731         },
 732 };
 733 #endif
 734 #endif
 735
 736 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 737 #include <linux/input.h>
 738 #include <linux/gpio_keys.h>
 739
 740 static struct gpio_keys_button bfin_gpio_keys_table[] = {
 741         {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
 742         {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
 743 };
 744
 745 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
 746         .buttons        = bfin_gpio_keys_table,
 747         .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
 748 };
 749
 750 static struct platform_device bfin_device_gpiokeys = {
 751         .name      = "gpio-keys",
 752         .dev = {
 753                 .platform_data = &bfin_gpio_keys_data,
 754         },
 755 };
 756 #endif
 757
 758 static const unsigned int cclk_vlev_datasheet[] =
 759 {
 760         VRPAIR(VLEV_100, 400000000),
 761         VRPAIR(VLEV_105, 426000000),
 762         VRPAIR(VLEV_110, 500000000),
 763         VRPAIR(VLEV_115, 533000000),
 764         VRPAIR(VLEV_120, 600000000),
 765 };
 766
 767 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 768         .tuple_tab = cclk_vlev_datasheet,
 769         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 770         .vr_settling_time = 25 /* us */,
 771 };
 772
 773 static struct platform_device bfin_dpmc = {
 774         .name = "bfin dpmc",
 775         .dev = {
 776                 .platform_data = &bfin_dmpc_vreg_data,
 777         },
 778 };
 779
 780 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 781 #include <asm/bfin-lq035q1.h>
 782
 783 static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
 784         .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
 785         .ppi_mode = USE_RGB565_16_BIT_PPI,
 786         .use_bl = 1,
 787         .gpio_bl = GPIO_PG12,
 788 };
 789
 790 static struct resource bfin_lq035q1_resources[] = {
 791         {
 792                 .start = IRQ_PPI_ERROR,
 793                 .end = IRQ_PPI_ERROR,
 794                 .flags = IORESOURCE_IRQ,
 795         },
 796 };
 797
 798 static struct platform_device bfin_lq035q1_device = {
 799         .name           = "bfin-lq035q1",
 800         .id             = -1,
 801         .num_resources  = ARRAY_SIZE(bfin_lq035q1_resources),
 802         .resource       = bfin_lq035q1_resources,
 803         .dev            = {
 804                 .platform_data = &bfin_lq035q1_data,
 805         },
 806 };
 807 #endif
 808
 809 static struct platform_device *stamp_devices[] __initdata = {
 810
 811         &bfin_dpmc,
 812
 813 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
 814         &bf5xx_nand_device,
 815 #endif
 816
 817 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 818         &rtc_device,
 819 #endif
 820
 821 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
 822         &musb_device,
 823 #endif
 824
 825 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 826         &bfin_mii_bus,
 827         &bfin_mac_device,
 828 #endif
 829
 830 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 831         &bfin_spi0_device,
 832 #endif
 833
 834 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 835 #ifdef CONFIG_SERIAL_BFIN_UART0
 836         &bfin_uart0_device,
 837 #endif
 838 #ifdef CONFIG_SERIAL_BFIN_UART1
 839         &bfin_uart1_device,
 840 #endif
 841 #endif
 842
 843 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 844         &bfin_lq035q1_device,
 845 #endif
 846
 847 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 848 #ifdef CONFIG_BFIN_SIR0
 849         &bfin_sir0_device,
 850 #endif
 851 #ifdef CONFIG_BFIN_SIR1
 852         &bfin_sir1_device,
 853 #endif
 854 #endif
 855
 856 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 857         &i2c_bfin_twi_device,
 858 #endif
 859
 860 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 861 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 862         &bfin_sport0_uart_device,
 863 #endif
 864 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 865         &bfin_sport1_uart_device,
 866 #endif
 867 #endif
 868
 869 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 870         &bfin_device_gpiokeys,
 871 #endif
 872
 873 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 874         &ezbrd_flash_device,
 875 #endif
 876 };
 877
 878 static int __init ezbrd_init(void)
 879 {
 880         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 881         i2c_register_board_info(0, bfin_i2c_board_info,
 882                                 ARRAY_SIZE(bfin_i2c_board_info));
 883         platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
 884         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 885         return 0;
 886 }
 887
 888 arch_initcall(ezbrd_init);
 889
 890 static struct platform_device *ezbrd_early_devices[] __initdata = {
 891 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
 892 #ifdef CONFIG_SERIAL_BFIN_UART0
 893         &bfin_uart0_device,
 894 #endif
 895 #ifdef CONFIG_SERIAL_BFIN_UART1
 896         &bfin_uart1_device,
 897 #endif
 898 #endif
 899
 900 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
 901 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 902         &bfin_sport0_uart_device,
 903 #endif
 904 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 905         &bfin_sport1_uart_device,
 906 #endif
 907 #endif
 908 };
 909
 910 void __init native_machine_early_platform_add_devices(void)
 911 {
 912         printk(KERN_INFO "register early platform devices\n");
 913         early_platform_add_devices(ezbrd_early_devices,
 914                 ARRAY_SIZE(ezbrd_early_devices));
 915 }
 916
 917 void native_machine_restart(char *cmd)
 918 {
 919         /* workaround reboot hang when booting from SPI */
 920         if ((bfin_read_SYSCR() & 0x7) == 0x3)
 921                 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
 922 }
 923
 924 void bfin_get_ether_addr(char *addr)
 925 {
 926         /* the MAC is stored in OTP memory page 0xDF */
 927         u32 ret;
 928         u64 otp_mac;
 929         u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
 930
 931         ret = otp_read(0xDF, 0x00, &otp_mac);
 932         if (!(ret & 0x1)) {
 933                 char *otp_mac_p = (char *)&otp_mac;
 934                 for (ret = 0; ret < 6; ++ret)
 935                         addr[ret] = otp_mac_p[5 - ret];
 936         }
 937 }
 938 EXPORT_SYMBOL(bfin_get_ether_addr);