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kvm tools, setup: Create private directory
[linux-2.6/next.git] / arch / blackfin / mach-bf537 / boards / stamp.c
blob76db1d4831739027e32b38c4e8f5fc7762672b7f
1 /*
2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9 #include <linux/device.h>
10 #include <linux/kernel.h>
11 #include <linux/platform_device.h>
12 #include <linux/io.h>
13 #include <linux/mtd/mtd.h>
14 #include <linux/mtd/nand.h>
15 #include <linux/mtd/partitions.h>
16 #include <linux/mtd/plat-ram.h>
17 #include <linux/mtd/physmap.h>
18 #include <linux/spi/spi.h>
19 #include <linux/spi/flash.h>
20 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
21 #include <linux/usb/isp1362.h>
22 #endif
23 #include <linux/i2c.h>
24 #include <linux/i2c/adp5588.h>
25 #include <linux/etherdevice.h>
26 #include <linux/ata_platform.h>
27 #include <linux/irq.h>
28 #include <linux/interrupt.h>
29 #include <linux/usb/sl811.h>
30 #include <linux/spi/mmc_spi.h>
31 #include <linux/leds.h>
32 #include <linux/input.h>
33 #include <asm/dma.h>
34 #include <asm/bfin5xx_spi.h>
35 #include <asm/reboot.h>
36 #include <asm/portmux.h>
37 #include <asm/dpmc.h>
38 #include <asm/bfin_sport.h>
39 #ifdef CONFIG_REGULATOR_FIXED_VOLTAGE
40 #include <linux/regulator/fixed.h>
41 #endif
42 #include <linux/regulator/machine.h>
43 #include <linux/regulator/consumer.h>
44 #include <linux/regulator/userspace-consumer.h>
45
46 /*
47 * Name the Board for the /proc/cpuinfo
48 */
49 const char bfin_board_name[] = "ADI BF537-STAMP";
50
51 /*
52 * Driver needs to know address, irq and flag pin.
53 */
54
55 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
56 #include <linux/usb/isp1760.h>
57 static struct resource bfin_isp1760_resources[] = {
58 [0] = {
59 .start = 0x203C0000,
60 .end = 0x203C0000 + 0x000fffff,
61 .flags = IORESOURCE_MEM,
62 },
63 [1] = {
64 .start = IRQ_PF7,
65 .end = IRQ_PF7,
66 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
67 },
68 };
69
70 static struct isp1760_platform_data isp1760_priv = {
71 .is_isp1761 = 0,
72 .bus_width_16 = 1,
73 .port1_otg = 0,
74 .analog_oc = 0,
75 .dack_polarity_high = 0,
76 .dreq_polarity_high = 0,
77 };
78
79 static struct platform_device bfin_isp1760_device = {
80 .name = "isp1760",
81 .id = 0,
82 .dev = {
83 .platform_data = &isp1760_priv,
84 },
85 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
86 .resource = bfin_isp1760_resources,
87 };
88 #endif
89
90 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
91 #include <linux/gpio_keys.h>
92
93 static struct gpio_keys_button bfin_gpio_keys_table[] = {
94 {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
95 {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
96 {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
97 {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
98 };
99
100 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
101 .buttons = bfin_gpio_keys_table,
102 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
103 };
104
105 static struct platform_device bfin_device_gpiokeys = {
106 .name = "gpio-keys",
107 .dev = {
108 .platform_data = &bfin_gpio_keys_data,
109 },
110 };
111 #endif
112
113 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
114 static struct resource bfin_pcmcia_cf_resources[] = {
115 {
116 .start = 0x20310000, /* IO PORT */
117 .end = 0x20312000,
118 .flags = IORESOURCE_MEM,
119 }, {
120 .start = 0x20311000, /* Attribute Memory */
121 .end = 0x20311FFF,
122 .flags = IORESOURCE_MEM,
123 }, {
124 .start = IRQ_PF4,
125 .end = IRQ_PF4,
126 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
127 }, {
128 .start = 6, /* Card Detect PF6 */
129 .end = 6,
130 .flags = IORESOURCE_IRQ,
131 },
132 };
133
134 static struct platform_device bfin_pcmcia_cf_device = {
135 .name = "bfin_cf_pcmcia",
136 .id = -1,
137 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
138 .resource = bfin_pcmcia_cf_resources,
139 };
140 #endif
141
142 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
143 static struct platform_device rtc_device = {
144 .name = "rtc-bfin",
145 .id = -1,
146 };
147 #endif
148
149 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
150 #include <linux/smc91x.h>
151
152 static struct smc91x_platdata smc91x_info = {
153 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
154 .leda = RPC_LED_100_10,
155 .ledb = RPC_LED_TX_RX,
156 };
157
158 static struct resource smc91x_resources[] = {
159 {
160 .name = "smc91x-regs",
161 .start = 0x20300300,
162 .end = 0x20300300 + 16,
163 .flags = IORESOURCE_MEM,
164 }, {
165
166 .start = IRQ_PF7,
167 .end = IRQ_PF7,
168 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
169 },
170 };
171 static struct platform_device smc91x_device = {
172 .name = "smc91x",
173 .id = 0,
174 .num_resources = ARRAY_SIZE(smc91x_resources),
175 .resource = smc91x_resources,
176 .dev = {
177 .platform_data = &smc91x_info,
178 },
179 };
180 #endif
181
182 #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
183 static struct resource dm9000_resources[] = {
184 [0] = {
185 .start = 0x203FB800,
186 .end = 0x203FB800 + 1,
187 .flags = IORESOURCE_MEM,
188 },
189 [1] = {
190 .start = 0x203FB804,
191 .end = 0x203FB804 + 1,
192 .flags = IORESOURCE_MEM,
193 },
194 [2] = {
195 .start = IRQ_PF9,
196 .end = IRQ_PF9,
197 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
198 },
199 };
200
201 static struct platform_device dm9000_device = {
202 .name = "dm9000",
203 .id = -1,
204 .num_resources = ARRAY_SIZE(dm9000_resources),
205 .resource = dm9000_resources,
206 };
207 #endif
208
209 #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
210 static struct resource sl811_hcd_resources[] = {
211 {
212 .start = 0x20340000,
213 .end = 0x20340000,
214 .flags = IORESOURCE_MEM,
215 }, {
216 .start = 0x20340004,
217 .end = 0x20340004,
218 .flags = IORESOURCE_MEM,
219 }, {
220 .start = IRQ_PF4,
221 .end = IRQ_PF4,
222 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
223 },
224 };
225
226 #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
227 void sl811_port_power(struct device *dev, int is_on)
228 {
229 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
230 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
231 }
232 #endif
233
234 static struct sl811_platform_data sl811_priv = {
235 .potpg = 10,
236 .power = 250, /* == 500mA */
237 #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
238 .port_power = &sl811_port_power,
239 #endif
240 };
241
242 static struct platform_device sl811_hcd_device = {
243 .name = "sl811-hcd",
244 .id = 0,
245 .dev = {
246 .platform_data = &sl811_priv,
247 },
248 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
249 .resource = sl811_hcd_resources,
250 };
251 #endif
252
253 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
254 static struct resource isp1362_hcd_resources[] = {
255 {
256 .start = 0x20360000,
257 .end = 0x20360000,
258 .flags = IORESOURCE_MEM,
259 }, {
260 .start = 0x20360004,
261 .end = 0x20360004,
262 .flags = IORESOURCE_MEM,
263 }, {
264 .start = IRQ_PF3,
265 .end = IRQ_PF3,
266 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
267 },
268 };
269
270 static struct isp1362_platform_data isp1362_priv = {
271 .sel15Kres = 1,
272 .clknotstop = 0,
273 .oc_enable = 0,
274 .int_act_high = 0,
275 .int_edge_triggered = 0,
276 .remote_wakeup_connected = 0,
277 .no_power_switching = 1,
278 .power_switching_mode = 0,
279 };
280
281 static struct platform_device isp1362_hcd_device = {
282 .name = "isp1362-hcd",
283 .id = 0,
284 .dev = {
285 .platform_data = &isp1362_priv,
286 },
287 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
288 .resource = isp1362_hcd_resources,
289 };
290 #endif
291
292 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
293 static unsigned short bfin_can_peripherals[] = {
294 P_CAN0_RX, P_CAN0_TX, 0
295 };
296
297 static struct resource bfin_can_resources[] = {
298 {
299 .start = 0xFFC02A00,
300 .end = 0xFFC02FFF,
301 .flags = IORESOURCE_MEM,
302 },
303 {
304 .start = IRQ_CAN_RX,
305 .end = IRQ_CAN_RX,
306 .flags = IORESOURCE_IRQ,
307 },
308 {
309 .start = IRQ_CAN_TX,
310 .end = IRQ_CAN_TX,
311 .flags = IORESOURCE_IRQ,
312 },
313 {
314 .start = IRQ_CAN_ERROR,
315 .end = IRQ_CAN_ERROR,
316 .flags = IORESOURCE_IRQ,
317 },
318 };
319
320 static struct platform_device bfin_can_device = {
321 .name = "bfin_can",
322 .num_resources = ARRAY_SIZE(bfin_can_resources),
323 .resource = bfin_can_resources,
324 .dev = {
325 .platform_data = &bfin_can_peripherals, /* Passed to driver */
326 },
327 };
328 #endif
329
330 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
331 #include <linux/bfin_mac.h>
332 static const unsigned short bfin_mac_peripherals[] = P_MII0;
333
334 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
335 {
336 .addr = 1,
337 .irq = PHY_POLL, /* IRQ_MAC_PHYINT */
338 },
339 };
340
341 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
342 .phydev_number = 1,
343 .phydev_data = bfin_phydev_data,
344 .phy_mode = PHY_INTERFACE_MODE_MII,
345 .mac_peripherals = bfin_mac_peripherals,
346 };
347
348 static struct platform_device bfin_mii_bus = {
349 .name = "bfin_mii_bus",
350 .dev = {
351 .platform_data = &bfin_mii_bus_data,
352 }
353 };
354
355 static struct platform_device bfin_mac_device = {
356 .name = "bfin_mac",
357 .dev = {
358 .platform_data = &bfin_mii_bus,
359 }
360 };
361 #endif
362
363 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
364 static struct resource net2272_bfin_resources[] = {
365 {
366 .start = 0x20300000,
367 .end = 0x20300000 + 0x100,
368 .flags = IORESOURCE_MEM,
369 }, {
370 .start = IRQ_PF7,
371 .end = IRQ_PF7,
372 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
373 },
374 };
375
376 static struct platform_device net2272_bfin_device = {
377 .name = "net2272",
378 .id = -1,
379 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
380 .resource = net2272_bfin_resources,
381 };
382 #endif
383
384 #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
385 const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
386
387 static struct mtd_partition bfin_plat_nand_partitions[] = {
388 {
389 .name = "linux kernel(nand)",
390 .size = 0x400000,
391 .offset = 0,
392 }, {
393 .name = "file system(nand)",
394 .size = MTDPART_SIZ_FULL,
395 .offset = MTDPART_OFS_APPEND,
396 },
397 };
398
399 #define BFIN_NAND_PLAT_CLE 2
400 #define BFIN_NAND_PLAT_ALE 1
401 static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
402 {
403 struct nand_chip *this = mtd->priv;
404
405 if (cmd == NAND_CMD_NONE)
406 return;
407
408 if (ctrl & NAND_CLE)
409 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));
410 else
411 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));
412 }
413
414 #define BFIN_NAND_PLAT_READY GPIO_PF3
415 static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
416 {
417 return gpio_get_value(BFIN_NAND_PLAT_READY);
418 }
419
420 static struct platform_nand_data bfin_plat_nand_data = {
421 .chip = {
422 .nr_chips = 1,
423 .chip_delay = 30,
424 .part_probe_types = part_probes,
425 .partitions = bfin_plat_nand_partitions,
426 .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),
427 },
428 .ctrl = {
429 .cmd_ctrl = bfin_plat_nand_cmd_ctrl,
430 .dev_ready = bfin_plat_nand_dev_ready,
431 },
432 };
433
434 #define MAX(x, y) (x > y ? x : y)
435 static struct resource bfin_plat_nand_resources = {
436 .start = 0x20212000,
437 .end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),
438 .flags = IORESOURCE_MEM,
439 };
440
441 static struct platform_device bfin_async_nand_device = {
442 .name = "gen_nand",
443 .id = -1,
444 .num_resources = 1,
445 .resource = &bfin_plat_nand_resources,
446 .dev = {
447 .platform_data = &bfin_plat_nand_data,
448 },
449 };
450
451 static void bfin_plat_nand_init(void)
452 {
453 gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");
454 }
455 #else
456 static void bfin_plat_nand_init(void) {}
457 #endif
458
459 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
460 static struct mtd_partition stamp_partitions[] = {
461 {
462 .name = "bootloader(nor)",
463 .size = 0x40000,
464 .offset = 0,
465 }, {
466 .name = "linux kernel(nor)",
467 .size = 0x180000,
468 .offset = MTDPART_OFS_APPEND,
469 }, {
470 .name = "file system(nor)",
471 .size = 0x400000 - 0x40000 - 0x180000 - 0x10000,
472 .offset = MTDPART_OFS_APPEND,
473 }, {
474 .name = "MAC Address(nor)",
475 .size = MTDPART_SIZ_FULL,
476 .offset = 0x3F0000,
477 .mask_flags = MTD_WRITEABLE,
478 }
479 };
480
481 static struct physmap_flash_data stamp_flash_data = {
482 .width = 2,
483 .parts = stamp_partitions,
484 .nr_parts = ARRAY_SIZE(stamp_partitions),
485 #ifdef CONFIG_ROMKERNEL
486 .probe_type = "map_rom",
487 #endif
488 };
489
490 static struct resource stamp_flash_resource = {
491 .start = 0x20000000,
492 .end = 0x203fffff,
493 .flags = IORESOURCE_MEM,
494 };
495
496 static struct platform_device stamp_flash_device = {
497 .name = "physmap-flash",
498 .id = 0,
499 .dev = {
500 .platform_data = &stamp_flash_data,
501 },
502 .num_resources = 1,
503 .resource = &stamp_flash_resource,
504 };
505 #endif
506
507 #if defined(CONFIG_MTD_M25P80) \
508 || defined(CONFIG_MTD_M25P80_MODULE)
509 static struct mtd_partition bfin_spi_flash_partitions[] = {
510 {
511 .name = "bootloader(spi)",
512 .size = 0x00040000,
513 .offset = 0,
514 .mask_flags = MTD_CAP_ROM
515 }, {
516 .name = "linux kernel(spi)",
517 .size = 0x180000,
518 .offset = MTDPART_OFS_APPEND,
519 }, {
520 .name = "file system(spi)",
521 .size = MTDPART_SIZ_FULL,
522 .offset = MTDPART_OFS_APPEND,
523 }
524 };
525
526 static struct flash_platform_data bfin_spi_flash_data = {
527 .name = "m25p80",
528 .parts = bfin_spi_flash_partitions,
529 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
530 /* .type = "m25p64", */
531 };
532
533 /* SPI flash chip (m25p64) */
534 static struct bfin5xx_spi_chip spi_flash_chip_info = {
535 .enable_dma = 0, /* use dma transfer with this chip*/
536 .bits_per_word = 8,
537 };
538 #endif
539
540 #if defined(CONFIG_BFIN_SPI_ADC) \
541 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
542 /* SPI ADC chip */
543 static struct bfin5xx_spi_chip spi_adc_chip_info = {
544 .enable_dma = 1, /* use dma transfer with this chip*/
545 .bits_per_word = 16,
546 };
547 #endif
548
549 #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
550 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
551 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
552 .enable_dma = 0,
553 .bits_per_word = 16,
554 };
555 #endif
556
557 #if defined(CONFIG_SND_BF5XX_SOC_AD193X) \
558 || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
559 static struct bfin5xx_spi_chip ad1938_spi_chip_info = {
560 .enable_dma = 0,
561 .bits_per_word = 8,
562 };
563 #endif
564
565 #if defined(CONFIG_SND_BF5XX_SOC_ADAV80X) \
566 || defined(CONFIG_SND_BF5XX_SOC_ADAV80X_MODULE)
567 static struct bfin5xx_spi_chip adav801_spi_chip_info = {
568 .enable_dma = 0,
569 .bits_per_word = 8,
570 };
571 #endif
572
573 #if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
574 #include <linux/input/ad714x.h>
575 static struct bfin5xx_spi_chip ad7147_spi_chip_info = {
576 .enable_dma = 0,
577 .bits_per_word = 16,
578 };
579
580 static struct ad714x_slider_plat ad7147_spi_slider_plat[] = {
581 {
582 .start_stage = 0,
583 .end_stage = 7,
584 .max_coord = 128,
585 },
586 };
587
588 static struct ad714x_button_plat ad7147_spi_button_plat[] = {
589 {
590 .keycode = BTN_FORWARD,
591 .l_mask = 0,
592 .h_mask = 0x600,
593 },
594 {
595 .keycode = BTN_LEFT,
596 .l_mask = 0,
597 .h_mask = 0x500,
598 },
599 {
600 .keycode = BTN_MIDDLE,
601 .l_mask = 0,
602 .h_mask = 0x800,
603 },
604 {
605 .keycode = BTN_RIGHT,
606 .l_mask = 0x100,
607 .h_mask = 0x400,
608 },
609 {
610 .keycode = BTN_BACK,
611 .l_mask = 0x200,
612 .h_mask = 0x400,
613 },
614 };
615 static struct ad714x_platform_data ad7147_spi_platform_data = {
616 .slider_num = 1,
617 .button_num = 5,
618 .slider = ad7147_spi_slider_plat,
619 .button = ad7147_spi_button_plat,
620 .stage_cfg_reg = {
621 {0xFBFF, 0x1FFF, 0, 0x2626, 1600, 1600, 1600, 1600},
622 {0xEFFF, 0x1FFF, 0, 0x2626, 1650, 1650, 1650, 1650},
623 {0xFFFF, 0x1FFE, 0, 0x2626, 1650, 1650, 1650, 1650},
624 {0xFFFF, 0x1FFB, 0, 0x2626, 1650, 1650, 1650, 1650},
625 {0xFFFF, 0x1FEF, 0, 0x2626, 1650, 1650, 1650, 1650},
626 {0xFFFF, 0x1FBF, 0, 0x2626, 1650, 1650, 1650, 1650},
627 {0xFFFF, 0x1EFF, 0, 0x2626, 1650, 1650, 1650, 1650},
628 {0xFFFF, 0x1BFF, 0, 0x2626, 1600, 1600, 1600, 1600},
629 {0xFF7B, 0x3FFF, 0x506, 0x2626, 1100, 1100, 1150, 1150},
630 {0xFDFE, 0x3FFF, 0x606, 0x2626, 1100, 1100, 1150, 1150},
631 {0xFEBA, 0x1FFF, 0x1400, 0x2626, 1200, 1200, 1300, 1300},
632 {0xFFEF, 0x1FFF, 0x0, 0x2626, 1100, 1100, 1150, 1150},
633 },
634 .sys_cfg_reg = {0x2B2, 0x0, 0x3233, 0x819, 0x832, 0xCFF, 0xCFF, 0x0},
635 };
636 #endif
637
638 #if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
639 #include <linux/input/ad714x.h>
640 static struct ad714x_button_plat ad7142_i2c_button_plat[] = {
641 {
642 .keycode = BTN_1,
643 .l_mask = 0,
644 .h_mask = 0x1,
645 },
646 {
647 .keycode = BTN_2,
648 .l_mask = 0,
649 .h_mask = 0x2,
650 },
651 {
652 .keycode = BTN_3,
653 .l_mask = 0,
654 .h_mask = 0x4,
655 },
656 {
657 .keycode = BTN_4,
658 .l_mask = 0x0,
659 .h_mask = 0x8,
660 },
661 };
662 static struct ad714x_platform_data ad7142_i2c_platform_data = {
663 .button_num = 4,
664 .button = ad7142_i2c_button_plat,
665 .stage_cfg_reg = {
666 /* fixme: figure out right setting for all comoponent according
667 * to hardware feature of EVAL-AD7142EB board */
668 {0xE7FF, 0x3FFF, 0x0005, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
669 {0xFDBF, 0x3FFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
670 {0xFFFF, 0x2DFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
671 {0xFFFF, 0x37BF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
672 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
673 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
674 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
675 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
676 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
677 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
678 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
679 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
680 },
681 .sys_cfg_reg = {0x0B2, 0x0, 0x690, 0x664, 0x290F, 0xF, 0xF, 0x0},
682 };
683 #endif
684
685 #if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
686 static struct bfin5xx_spi_chip ad2s90_spi_chip_info = {
687 .enable_dma = 0,
688 .bits_per_word = 16,
689 };
690 #endif
691
692 #if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
693 static unsigned short ad2s120x_platform_data[] = {
694 /* used as SAMPLE and RDVEL */
695 GPIO_PF5, GPIO_PF6, 0
696 };
697
698 static struct bfin5xx_spi_chip ad2s120x_spi_chip_info = {
699 .enable_dma = 0,
700 .bits_per_word = 16,
701 };
702 #endif
703
704 #if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
705 static unsigned short ad2s1210_platform_data[] = {
706 /* use as SAMPLE, A0, A1 */
707 GPIO_PF7, GPIO_PF8, GPIO_PF9,
708 # if defined(CONFIG_AD2S1210_GPIO_INPUT) || defined(CONFIG_AD2S1210_GPIO_OUTPUT)
709 /* the RES0 and RES1 pins */
710 GPIO_PF4, GPIO_PF5,
711 # endif
712 0,
713 };
714
715 static struct bfin5xx_spi_chip ad2s1210_spi_chip_info = {
716 .enable_dma = 0,
717 .bits_per_word = 8,
718 };
719 #endif
720
721 #if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE)
722 static struct bfin5xx_spi_chip ad7314_spi_chip_info = {
723 .enable_dma = 0,
724 .bits_per_word = 16,
725 };
726 #endif
727
728 #if defined(CONFIG_AD7816) || defined(CONFIG_AD7816_MODULE)
729 static unsigned short ad7816_platform_data[] = {
730 GPIO_PF4, /* rdwr_pin */
731 GPIO_PF5, /* convert_pin */
732 GPIO_PF7, /* busy_pin */
733 0,
734 };
735
736 static struct bfin5xx_spi_chip ad7816_spi_chip_info = {
737 .enable_dma = 0,
738 .bits_per_word = 8,
739 };
740 #endif
741
742 #if defined(CONFIG_ADT7310) || defined(CONFIG_ADT7310_MODULE)
743 static unsigned long adt7310_platform_data[3] = {
744 /* INT bound temperature alarm event. line 1 */
745 IRQ_PG4, IRQF_TRIGGER_LOW,
746 /* CT bound temperature alarm event irq_flags. line 0 */
747 IRQF_TRIGGER_LOW,
748 };
749
750 static struct bfin5xx_spi_chip adt7310_spi_chip_info = {
751 .enable_dma = 0,
752 .bits_per_word = 8,
753 };
754 #endif
755
756 #if defined(CONFIG_AD7298) || defined(CONFIG_AD7298_MODULE)
757 static unsigned short ad7298_platform_data[] = {
758 GPIO_PF7, /* busy_pin */
759 0,
760 };
761
762 static struct bfin5xx_spi_chip ad7298_spi_chip_info = {
763 .enable_dma = 0,
764 .bits_per_word = 16,
765 };
766 #endif
767
768 #if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE)
769 static unsigned long adt7316_spi_data[2] = {
770 IRQF_TRIGGER_LOW, /* interrupt flags */
771 GPIO_PF7, /* ldac_pin, 0 means DAC/LDAC registers control DAC update */
772 };
773
774 static struct bfin5xx_spi_chip adt7316_spi_chip_info = {
775 .enable_dma = 0,
776 .bits_per_word = 8,
777 };
778 #endif
779
780 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
781 #define MMC_SPI_CARD_DETECT_INT IRQ_PF5
782
783 static int bfin_mmc_spi_init(struct device *dev,
784 irqreturn_t (*detect_int)(int, void *), void *data)
785 {
786 return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
787 IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
788 }
789
790 static void bfin_mmc_spi_exit(struct device *dev, void *data)
791 {
792 free_irq(MMC_SPI_CARD_DETECT_INT, data);
793 }
794
795 static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
796 .init = bfin_mmc_spi_init,
797 .exit = bfin_mmc_spi_exit,
798 .detect_delay = 100, /* msecs */
799 };
800
801 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
802 .enable_dma = 0,
803 .bits_per_word = 8,
804 .pio_interrupt = 0,
805 };
806 #endif
807
808 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
809 #include <linux/spi/ad7877.h>
810 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
811 .enable_dma = 0,
812 .bits_per_word = 16,
813 };
814
815 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
816 .model = 7877,
817 .vref_delay_usecs = 50, /* internal, no capacitor */
818 .x_plate_ohms = 419,
819 .y_plate_ohms = 486,
820 .pressure_max = 1000,
821 .pressure_min = 0,
822 .stopacq_polarity = 1,
823 .first_conversion_delay = 3,
824 .acquisition_time = 1,
825 .averaging = 1,
826 .pen_down_acc_interval = 1,
827 };
828 #endif
829
830 #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
831 #include <linux/spi/ad7879.h>
832 static const struct ad7879_platform_data bfin_ad7879_ts_info = {
833 .model = 7879, /* Model = AD7879 */
834 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
835 .pressure_max = 10000,
836 .pressure_min = 0,
837 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
838 .acquisition_time = 1, /* 4us acquisition time per sample */
839 .median = 2, /* do 8 measurements */
840 .averaging = 1, /* take the average of 4 middle samples */
841 .pen_down_acc_interval = 255, /* 9.4 ms */
842 .gpio_export = 1, /* Export GPIO to gpiolib */
843 .gpio_base = -1, /* Dynamic allocation */
844 };
845 #endif
846
847 #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
848 #include <linux/input/adxl34x.h>
849 static const struct adxl34x_platform_data adxl34x_info = {
850 .x_axis_offset = 0,
851 .y_axis_offset = 0,
852 .z_axis_offset = 0,
853 .tap_threshold = 0x31,
854 .tap_duration = 0x10,
855 .tap_latency = 0x60,
856 .tap_window = 0xF0,
857 .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
858 .act_axis_control = 0xFF,
859 .activity_threshold = 5,
860 .inactivity_threshold = 3,
861 .inactivity_time = 4,
862 .free_fall_threshold = 0x7,
863 .free_fall_time = 0x20,
864 .data_rate = 0x8,
865 .data_range = ADXL_FULL_RES,
866
867 .ev_type = EV_ABS,
868 .ev_code_x = ABS_X, /* EV_REL */
869 .ev_code_y = ABS_Y, /* EV_REL */
870 .ev_code_z = ABS_Z, /* EV_REL */
871
872 .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
873
874 /* .ev_code_ff = KEY_F,*/ /* EV_KEY */
875 /* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
876 .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
877 .fifo_mode = ADXL_FIFO_STREAM,
878 .orientation_enable = ADXL_EN_ORIENTATION_3D,
879 .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
880 .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
881 /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
882 .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
883 };
884 #endif
885
886 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
887 static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
888 .enable_dma = 0,
889 .bits_per_word = 16,
890 };
891 #endif
892
893 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
894 static struct bfin5xx_spi_chip spidev_chip_info = {
895 .enable_dma = 0,
896 .bits_per_word = 8,
897 };
898 #endif
899
900 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
901 static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
902 .enable_dma = 0,
903 .bits_per_word = 8,
904 };
905 #endif
906
907 #if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
908 static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {
909 .enable_dma = 1,
910 .bits_per_word = 8,
911 };
912 #endif
913
914 #if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
915 static struct bfin5xx_spi_chip adf7021_spi_chip_info = {
916 .bits_per_word = 16,
917 };
918
919 #include <linux/spi/adf702x.h>
920 #define TXREG 0x0160A470
921 static const u32 adf7021_regs[] = {
922 0x09608FA0,
923 0x00575011,
924 0x00A7F092,
925 0x2B141563,
926 0x81F29E94,
927 0x00003155,
928 0x050A4F66,
929 0x00000007,
930 0x00000008,
931 0x000231E9,
932 0x3296354A,
933 0x891A2B3B,
934 0x00000D9C,
935 0x0000000D,
936 0x0000000E,
937 0x0000000F,
938 };
939
940 static struct adf702x_platform_data adf7021_platform_data = {
941 .regs_base = (void *)SPORT1_TCR1,
942 .dma_ch_rx = CH_SPORT1_RX,
943 .dma_ch_tx = CH_SPORT1_TX,
944 .irq_sport_err = IRQ_SPORT1_ERROR,
945 .gpio_int_rfs = GPIO_PF8,
946 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_RFS, P_SPORT1_DRPRI,
947 P_SPORT1_RSCLK, P_SPORT1_TSCLK, 0},
948 .adf702x_model = MODEL_ADF7021,
949 .adf702x_regs = adf7021_regs,
950 .tx_reg = TXREG,
951 };
952 static inline void adf702x_mac_init(void)
953 {
954 random_ether_addr(adf7021_platform_data.mac_addr);
955 }
956 #else
957 static inline void adf702x_mac_init(void) {}
958 #endif
959
960 #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
961 #include <linux/spi/ads7846.h>
962 static struct bfin5xx_spi_chip ad7873_spi_chip_info = {
963 .bits_per_word = 8,
964 };
965
966 static int ads7873_get_pendown_state(void)
967 {
968 return gpio_get_value(GPIO_PF6);
969 }
970
971 static struct ads7846_platform_data __initdata ad7873_pdata = {
972 .model = 7873, /* AD7873 */
973 .x_max = 0xfff,
974 .y_max = 0xfff,
975 .x_plate_ohms = 620,
976 .debounce_max = 1,
977 .debounce_rep = 0,
978 .debounce_tol = (~0),
979 .get_pendown_state = ads7873_get_pendown_state,
980 };
981 #endif
982
983 #if defined(CONFIG_MTD_DATAFLASH) \
984 || defined(CONFIG_MTD_DATAFLASH_MODULE)
985
986 static struct mtd_partition bfin_spi_dataflash_partitions[] = {
987 {
988 .name = "bootloader(spi)",
989 .size = 0x00040000,
990 .offset = 0,
991 .mask_flags = MTD_CAP_ROM
992 }, {
993 .name = "linux kernel(spi)",
994 .size = 0x180000,
995 .offset = MTDPART_OFS_APPEND,
996 }, {
997 .name = "file system(spi)",
998 .size = MTDPART_SIZ_FULL,
999 .offset = MTDPART_OFS_APPEND,
1000 }
1001 };
1002
1003 static struct flash_platform_data bfin_spi_dataflash_data = {
1004 .name = "SPI Dataflash",
1005 .parts = bfin_spi_dataflash_partitions,
1006 .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
1007 };
1008
1009 /* DataFlash chip */
1010 static struct bfin5xx_spi_chip data_flash_chip_info = {
1011 .enable_dma = 0, /* use dma transfer with this chip*/
1012 .bits_per_word = 8,
1013 };
1014 #endif
1015
1016 #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
1017 static struct bfin5xx_spi_chip spi_adxl34x_chip_info = {
1018 .enable_dma = 0, /* use dma transfer with this chip*/
1019 .bits_per_word = 8,
1020 };
1021 #endif
1022
1023 #if defined(CONFIG_AD7476) || defined(CONFIG_AD7476_MODULE)
1024 static struct bfin5xx_spi_chip spi_ad7476_chip_info = {
1025 .enable_dma = 0, /* use dma transfer with this chip*/
1026 .bits_per_word = 8,
1027 };
1028 #endif
1029
1030 static struct spi_board_info bfin_spi_board_info[] __initdata = {
1031 #if defined(CONFIG_MTD_M25P80) \
1032 || defined(CONFIG_MTD_M25P80_MODULE)
1033 {
1034 /* the modalias must be the same as spi device driver name */
1035 .modalias = "m25p80", /* Name of spi_driver for this device */
1036 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
1037 .bus_num = 0, /* Framework bus number */
1038 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
1039 .platform_data = &bfin_spi_flash_data,
1040 .controller_data = &spi_flash_chip_info,
1041 .mode = SPI_MODE_3,
1042 },
1043 #endif
1044 #if defined(CONFIG_MTD_DATAFLASH) \
1045 || defined(CONFIG_MTD_DATAFLASH_MODULE)
1046 { /* DataFlash chip */
1047 .modalias = "mtd_dataflash",
1048 .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */
1049 .bus_num = 0, /* Framework bus number */
1050 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
1051 .platform_data = &bfin_spi_dataflash_data,
1052 .controller_data = &data_flash_chip_info,
1053 .mode = SPI_MODE_3,
1054 },
1055 #endif
1056 #if defined(CONFIG_BFIN_SPI_ADC) \
1057 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
1058 {
1059 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
1060 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
1061 .bus_num = 0, /* Framework bus number */
1062 .chip_select = 1, /* Framework chip select. */
1063 .platform_data = NULL, /* No spi_driver specific config */
1064 .controller_data = &spi_adc_chip_info,
1065 },
1066 #endif
1067
1068 #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
1069 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
1070 {
1071 .modalias = "ad183x",
1072 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1073 .bus_num = 0,
1074 .chip_select = 4,
1075 .platform_data = "ad1836", /* only includes chip name for the moment */
1076 .controller_data = &ad1836_spi_chip_info,
1077 .mode = SPI_MODE_3,
1078 },
1079 #endif
1080
1081 #if defined(CONFIG_SND_BF5XX_SOC_AD193X) || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
1082 {
1083 .modalias = "ad193x",
1084 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1085 .bus_num = 0,
1086 .chip_select = 5,
1087 .controller_data = &ad1938_spi_chip_info,
1088 .mode = SPI_MODE_3,
1089 },
1090 #endif
1091
1092 #if defined(CONFIG_SND_BF5XX_SOC_ADAV80X) || defined(CONFIG_SND_BF5XX_SOC_ADAV80X_MODULE)
1093 {
1094 .modalias = "adav80x",
1095 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1096 .bus_num = 0,
1097 .chip_select = 1,
1098 .controller_data = &adav801_spi_chip_info,
1099 .mode = SPI_MODE_3,
1100 },
1101 #endif
1102
1103 #if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
1104 {
1105 .modalias = "ad714x_captouch",
1106 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1107 .irq = IRQ_PF4,
1108 .bus_num = 0,
1109 .chip_select = 5,
1110 .mode = SPI_MODE_3,
1111 .platform_data = &ad7147_spi_platform_data,
1112 .controller_data = &ad7147_spi_chip_info,
1113 },
1114 #endif
1115
1116 #if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
1117 {
1118 .modalias = "ad2s90",
1119 .bus_num = 0,
1120 .chip_select = 3, /* change it for your board */
1121 .mode = SPI_MODE_3,
1122 .platform_data = NULL,
1123 .controller_data = &ad2s90_spi_chip_info,
1124 },
1125 #endif
1126
1127 #if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
1128 {
1129 .modalias = "ad2s120x",
1130 .bus_num = 0,
1131 .chip_select = 4, /* CS, change it for your board */
1132 .platform_data = ad2s120x_platform_data,
1133 .controller_data = &ad2s120x_spi_chip_info,
1134 },
1135 #endif
1136
1137 #if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
1138 {
1139 .modalias = "ad2s1210",
1140 .max_speed_hz = 8192000,
1141 .bus_num = 0,
1142 .chip_select = 4, /* CS, change it for your board */
1143 .platform_data = ad2s1210_platform_data,
1144 .controller_data = &ad2s1210_spi_chip_info,
1145 },
1146 #endif
1147
1148 #if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE)
1149 {
1150 .modalias = "ad7314",
1151 .max_speed_hz = 1000000,
1152 .bus_num = 0,
1153 .chip_select = 4, /* CS, change it for your board */
1154 .controller_data = &ad7314_spi_chip_info,
1155 .mode = SPI_MODE_1,
1156 },
1157 #endif
1158
1159 #if defined(CONFIG_AD7816) || defined(CONFIG_AD7816_MODULE)
1160 {
1161 .modalias = "ad7818",
1162 .max_speed_hz = 1000000,
1163 .bus_num = 0,
1164 .chip_select = 4, /* CS, change it for your board */
1165 .platform_data = ad7816_platform_data,
1166 .controller_data = &ad7816_spi_chip_info,
1167 .mode = SPI_MODE_3,
1168 },
1169 #endif
1170
1171 #if defined(CONFIG_ADT7310) || defined(CONFIG_ADT7310_MODULE)
1172 {
1173 .modalias = "adt7310",
1174 .max_speed_hz = 1000000,
1175 .irq = IRQ_PG5, /* CT alarm event. Line 0 */
1176 .bus_num = 0,
1177 .chip_select = 4, /* CS, change it for your board */
1178 .platform_data = adt7310_platform_data,
1179 .controller_data = &adt7310_spi_chip_info,
1180 .mode = SPI_MODE_3,
1181 },
1182 #endif
1183
1184 #if defined(CONFIG_AD7298) || defined(CONFIG_AD7298_MODULE)
1185 {
1186 .modalias = "ad7298",
1187 .max_speed_hz = 1000000,
1188 .bus_num = 0,
1189 .chip_select = 4, /* CS, change it for your board */
1190 .platform_data = ad7298_platform_data,
1191 .controller_data = &ad7298_spi_chip_info,
1192 .mode = SPI_MODE_3,
1193 },
1194 #endif
1195
1196 #if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE)
1197 {
1198 .modalias = "adt7316",
1199 .max_speed_hz = 1000000,
1200 .irq = IRQ_PG5, /* interrupt line */
1201 .bus_num = 0,
1202 .chip_select = 4, /* CS, change it for your board */
1203 .platform_data = adt7316_spi_data,
1204 .controller_data = &adt7316_spi_chip_info,
1205 .mode = SPI_MODE_3,
1206 },
1207 #endif
1208
1209 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
1210 {
1211 .modalias = "mmc_spi",
1212 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1213 .bus_num = 0,
1214 .chip_select = 4,
1215 .platform_data = &bfin_mmc_spi_pdata,
1216 .controller_data = &mmc_spi_chip_info,
1217 .mode = SPI_MODE_3,
1218 },
1219 #endif
1220 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
1221 {
1222 .modalias = "ad7877",
1223 .platform_data = &bfin_ad7877_ts_info,
1224 .irq = IRQ_PF6,
1225 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
1226 .bus_num = 0,
1227 .chip_select = 1,
1228 .controller_data = &spi_ad7877_chip_info,
1229 },
1230 #endif
1231 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
1232 {
1233 .modalias = "ad7879",
1234 .platform_data = &bfin_ad7879_ts_info,
1235 .irq = IRQ_PF7,
1236 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1237 .bus_num = 0,
1238 .chip_select = 1,
1239 .controller_data = &spi_ad7879_chip_info,
1240 .mode = SPI_CPHA | SPI_CPOL,
1241 },
1242 #endif
1243 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
1244 {
1245 .modalias = "spidev",
1246 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1247 .bus_num = 0,
1248 .chip_select = 1,
1249 .controller_data = &spidev_chip_info,
1250 },
1251 #endif
1252 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1253 {
1254 .modalias = "bfin-lq035q1-spi",
1255 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1256 .bus_num = 0,
1257 .chip_select = 2,
1258 .controller_data = &lq035q1_spi_chip_info,
1259 .mode = SPI_CPHA | SPI_CPOL,
1260 },
1261 #endif
1262 #if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
1263 {
1264 .modalias = "enc28j60",
1265 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1266 .irq = IRQ_PF6,
1267 .bus_num = 0,
1268 .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
1269 .controller_data = &enc28j60_spi_chip_info,
1270 .mode = SPI_MODE_0,
1271 },
1272 #endif
1273 #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
1274 {
1275 .modalias = "adxl34x",
1276 .platform_data = &adxl34x_info,
1277 .irq = IRQ_PF6,
1278 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1279 .bus_num = 0,
1280 .chip_select = 2,
1281 .controller_data = &spi_adxl34x_chip_info,
1282 .mode = SPI_MODE_3,
1283 },
1284 #endif
1285 #if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
1286 {
1287 .modalias = "adf702x",
1288 .max_speed_hz = 16000000, /* max spi clock (SCK) speed in HZ */
1289 .bus_num = 0,
1290 .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
1291 .controller_data = &adf7021_spi_chip_info,
1292 .platform_data = &adf7021_platform_data,
1293 .mode = SPI_MODE_0,
1294 },
1295 #endif
1296 #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
1297 {
1298 .modalias = "ads7846",
1299 .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
1300 .bus_num = 0,
1301 .irq = IRQ_PF6,
1302 .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
1303 .controller_data = &ad7873_spi_chip_info,
1304 .platform_data = &ad7873_pdata,
1305 .mode = SPI_MODE_0,
1306 },
1307 #endif
1308 #if defined(CONFIG_AD7476) \
1309 || defined(CONFIG_AD7476_MODULE)
1310 {
1311 .modalias = "ad7476", /* Name of spi_driver for this device */
1312 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
1313 .bus_num = 0, /* Framework bus number */
1314 .chip_select = 1, /* Framework chip select. */
1315 .platform_data = NULL, /* No spi_driver specific config */
1316 .controller_data = &spi_ad7476_chip_info,
1317 .mode = SPI_MODE_3,
1318 },
1319 #endif
1320 #if defined(CONFIG_ADE7753) \
1321 || defined(CONFIG_ADE7753_MODULE)
1322 {
1323 .modalias = "ade7753",
1324 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1325 .bus_num = 0,
1326 .chip_select = 1, /* CS, change it for your board */
1327 .platform_data = NULL, /* No spi_driver specific config */
1328 .mode = SPI_MODE_1,
1329 },
1330 #endif
1331 #if defined(CONFIG_ADE7754) \
1332 || defined(CONFIG_ADE7754_MODULE)
1333 {
1334 .modalias = "ade7754",
1335 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1336 .bus_num = 0,
1337 .chip_select = 1, /* CS, change it for your board */
1338 .platform_data = NULL, /* No spi_driver specific config */
1339 .mode = SPI_MODE_1,
1340 },
1341 #endif
1342 #if defined(CONFIG_ADE7758) \
1343 || defined(CONFIG_ADE7758_MODULE)
1344 {
1345 .modalias = "ade7758",
1346 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1347 .bus_num = 0,
1348 .chip_select = 1, /* CS, change it for your board */
1349 .platform_data = NULL, /* No spi_driver specific config */
1350 .mode = SPI_MODE_1,
1351 },
1352 #endif
1353 #if defined(CONFIG_ADE7759) \
1354 || defined(CONFIG_ADE7759_MODULE)
1355 {
1356 .modalias = "ade7759",
1357 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1358 .bus_num = 0,
1359 .chip_select = 1, /* CS, change it for your board */
1360 .platform_data = NULL, /* No spi_driver specific config */
1361 .mode = SPI_MODE_1,
1362 },
1363 #endif
1364 #if defined(CONFIG_ADE7854_SPI) \
1365 || defined(CONFIG_ADE7854_SPI_MODULE)
1366 {
1367 .modalias = "ade7854",
1368 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1369 .bus_num = 0,
1370 .chip_select = 1, /* CS, change it for your board */
1371 .platform_data = NULL, /* No spi_driver specific config */
1372 .mode = SPI_MODE_3,
1373 },
1374 #endif
1375 #if defined(CONFIG_ADIS16060) \
1376 || defined(CONFIG_ADIS16060_MODULE)
1377 {
1378 .modalias = "adis16060_r",
1379 .max_speed_hz = 2900000, /* max spi clock (SCK) speed in HZ */
1380 .bus_num = 0,
1381 .chip_select = MAX_CTRL_CS + 1, /* CS for read, change it for your board */
1382 .platform_data = NULL, /* No spi_driver specific config */
1383 .mode = SPI_MODE_0,
1384 },
1385 {
1386 .modalias = "adis16060_w",
1387 .max_speed_hz = 2900000, /* max spi clock (SCK) speed in HZ */
1388 .bus_num = 0,
1389 .chip_select = 2, /* CS for write, change it for your board */
1390 .platform_data = NULL, /* No spi_driver specific config */
1391 .mode = SPI_MODE_1,
1392 },
1393 #endif
1394 #if defined(CONFIG_ADIS16130) \
1395 || defined(CONFIG_ADIS16130_MODULE)
1396 {
1397 .modalias = "adis16130",
1398 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1399 .bus_num = 0,
1400 .chip_select = 1, /* CS for read, change it for your board */
1401 .platform_data = NULL, /* No spi_driver specific config */
1402 .mode = SPI_MODE_3,
1403 },
1404 #endif
1405 #if defined(CONFIG_ADIS16201) \
1406 || defined(CONFIG_ADIS16201_MODULE)
1407 {
1408 .modalias = "adis16201",
1409 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1410 .bus_num = 0,
1411 .chip_select = 5, /* CS, change it for your board */
1412 .platform_data = NULL, /* No spi_driver specific config */
1413 .mode = SPI_MODE_3,
1414 .irq = IRQ_PF4,
1415 },
1416 #endif
1417 #if defined(CONFIG_ADIS16203) \
1418 || defined(CONFIG_ADIS16203_MODULE)
1419 {
1420 .modalias = "adis16203",
1421 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1422 .bus_num = 0,
1423 .chip_select = 5, /* CS, change it for your board */
1424 .platform_data = NULL, /* No spi_driver specific config */
1425 .mode = SPI_MODE_3,
1426 .irq = IRQ_PF4,
1427 },
1428 #endif
1429 #if defined(CONFIG_ADIS16204) \
1430 || defined(CONFIG_ADIS16204_MODULE)
1431 {
1432 .modalias = "adis16204",
1433 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1434 .bus_num = 0,
1435 .chip_select = 5, /* CS, change it for your board */
1436 .platform_data = NULL, /* No spi_driver specific config */
1437 .mode = SPI_MODE_3,
1438 .irq = IRQ_PF4,
1439 },
1440 #endif
1441 #if defined(CONFIG_ADIS16209) \
1442 || defined(CONFIG_ADIS16209_MODULE)
1443 {
1444 .modalias = "adis16209",
1445 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1446 .bus_num = 0,
1447 .chip_select = 5, /* CS, change it for your board */
1448 .platform_data = NULL, /* No spi_driver specific config */
1449 .mode = SPI_MODE_3,
1450 .irq = IRQ_PF4,
1451 },
1452 #endif
1453 #if defined(CONFIG_ADIS16220) \
1454 || defined(CONFIG_ADIS16220_MODULE)
1455 {
1456 .modalias = "adis16220",
1457 .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
1458 .bus_num = 0,
1459 .chip_select = 5, /* CS, change it for your board */
1460 .platform_data = NULL, /* No spi_driver specific config */
1461 .mode = SPI_MODE_3,
1462 .irq = IRQ_PF4,
1463 },
1464 #endif
1465 #if defined(CONFIG_ADIS16240) \
1466 || defined(CONFIG_ADIS16240_MODULE)
1467 {
1468 .modalias = "adis16240",
1469 .max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */
1470 .bus_num = 0,
1471 .chip_select = 5, /* CS, change it for your board */
1472 .platform_data = NULL, /* No spi_driver specific config */
1473 .mode = SPI_MODE_3,
1474 .irq = IRQ_PF4,
1475 },
1476 #endif
1477 #if defined(CONFIG_ADIS16260) \
1478 || defined(CONFIG_ADIS16260_MODULE)
1479 {
1480 .modalias = "adis16260",
1481 .max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */
1482 .bus_num = 0,
1483 .chip_select = 5, /* CS, change it for your board */
1484 .platform_data = NULL, /* No spi_driver specific config */
1485 .mode = SPI_MODE_3,
1486 .irq = IRQ_PF4,
1487 },
1488 #endif
1489 #if defined(CONFIG_ADIS16261) \
1490 || defined(CONFIG_ADIS16261_MODULE)
1491 {
1492 .modalias = "adis16261",
1493 .max_speed_hz = 2500000, /* max spi clock (SCK) speed in HZ */
1494 .bus_num = 0,
1495 .chip_select = 1, /* CS, change it for your board */
1496 .platform_data = NULL, /* No spi_driver specific config */
1497 .mode = SPI_MODE_3,
1498 },
1499 #endif
1500 #if defined(CONFIG_ADIS16300) \
1501 || defined(CONFIG_ADIS16300_MODULE)
1502 {
1503 .modalias = "adis16300",
1504 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1505 .bus_num = 0,
1506 .chip_select = 5, /* CS, change it for your board */
1507 .platform_data = NULL, /* No spi_driver specific config */
1508 .mode = SPI_MODE_3,
1509 .irq = IRQ_PF4,
1510 },
1511 #endif
1512 #if defined(CONFIG_ADIS16350) \
1513 || defined(CONFIG_ADIS16350_MODULE)
1514 {
1515 .modalias = "adis16364",
1516 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1517 .bus_num = 0,
1518 .chip_select = 5, /* CS, change it for your board */
1519 .platform_data = NULL, /* No spi_driver specific config */
1520 .mode = SPI_MODE_3,
1521 .irq = IRQ_PF4,
1522 },
1523 #endif
1524 #if defined(CONFIG_ADIS16400) \
1525 || defined(CONFIG_ADIS16400_MODULE)
1526 {
1527 .modalias = "adis16400",
1528 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1529 .bus_num = 0,
1530 .chip_select = 1, /* CS, change it for your board */
1531 .platform_data = NULL, /* No spi_driver specific config */
1532 .mode = SPI_MODE_3,
1533 },
1534 #endif
1535 };
1536
1537 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
1538 /* SPI controller data */
1539 static struct bfin5xx_spi_master bfin_spi0_info = {
1540 .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
1541 .enable_dma = 1, /* master has the ability to do dma transfer */
1542 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1543 };
1544
1545 /* SPI (0) */
1546 static struct resource bfin_spi0_resource[] = {
1547 [0] = {
1548 .start = SPI0_REGBASE,
1549 .end = SPI0_REGBASE + 0xFF,
1550 .flags = IORESOURCE_MEM,
1551 },
1552 [1] = {
1553 .start = CH_SPI,
1554 .end = CH_SPI,
1555 .flags = IORESOURCE_DMA,
1556 },
1557 [2] = {
1558 .start = IRQ_SPI,
1559 .end = IRQ_SPI,
1560 .flags = IORESOURCE_IRQ,
1561 },
1562 };
1563
1564 static struct platform_device bfin_spi0_device = {
1565 .name = "bfin-spi",
1566 .id = 0, /* Bus number */
1567 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
1568 .resource = bfin_spi0_resource,
1569 .dev = {
1570 .platform_data = &bfin_spi0_info, /* Passed to driver */
1571 },
1572 };
1573 #endif /* spi master and devices */
1574
1575 #if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
1576
1577 /* SPORT SPI controller data */
1578 static struct bfin5xx_spi_master bfin_sport_spi0_info = {
1579 .num_chipselect = 1, /* master only supports one device */
1580 .enable_dma = 0, /* master don't support DMA */
1581 .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
1582 P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
1583 };
1584
1585 static struct resource bfin_sport_spi0_resource[] = {
1586 [0] = {
1587 .start = SPORT0_TCR1,
1588 .end = SPORT0_TCR1 + 0xFF,
1589 .flags = IORESOURCE_MEM,
1590 },
1591 [1] = {
1592 .start = IRQ_SPORT0_ERROR,
1593 .end = IRQ_SPORT0_ERROR,
1594 .flags = IORESOURCE_IRQ,
1595 },
1596 };
1597
1598 static struct platform_device bfin_sport_spi0_device = {
1599 .name = "bfin-sport-spi",
1600 .id = 1, /* Bus number */
1601 .num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
1602 .resource = bfin_sport_spi0_resource,
1603 .dev = {
1604 .platform_data = &bfin_sport_spi0_info, /* Passed to driver */
1605 },
1606 };
1607
1608 static struct bfin5xx_spi_master bfin_sport_spi1_info = {
1609 .num_chipselect = 1, /* master only supports one device */
1610 .enable_dma = 0, /* master don't support DMA */
1611 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
1612 P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
1613 };
1614
1615 static struct resource bfin_sport_spi1_resource[] = {
1616 [0] = {
1617 .start = SPORT1_TCR1,
1618 .end = SPORT1_TCR1 + 0xFF,
1619 .flags = IORESOURCE_MEM,
1620 },
1621 [1] = {
1622 .start = IRQ_SPORT1_ERROR,
1623 .end = IRQ_SPORT1_ERROR,
1624 .flags = IORESOURCE_IRQ,
1625 },
1626 };
1627
1628 static struct platform_device bfin_sport_spi1_device = {
1629 .name = "bfin-sport-spi",
1630 .id = 2, /* Bus number */
1631 .num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
1632 .resource = bfin_sport_spi1_resource,
1633 .dev = {
1634 .platform_data = &bfin_sport_spi1_info, /* Passed to driver */
1635 },
1636 };
1637
1638 #endif /* sport spi master and devices */
1639
1640 #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1641 static struct platform_device bfin_fb_device = {
1642 .name = "bf537-lq035",
1643 };
1644 #endif
1645
1646 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1647 #include <asm/bfin-lq035q1.h>
1648
1649 static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
1650 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
1651 .ppi_mode = USE_RGB565_16_BIT_PPI,
1652 .use_bl = 0, /* let something else control the LCD Blacklight */
1653 .gpio_bl = GPIO_PF7,
1654 };
1655
1656 static struct resource bfin_lq035q1_resources[] = {
1657 {
1658 .start = IRQ_PPI_ERROR,
1659 .end = IRQ_PPI_ERROR,
1660 .flags = IORESOURCE_IRQ,
1661 },
1662 };
1663
1664 static struct platform_device bfin_lq035q1_device = {
1665 .name = "bfin-lq035q1",
1666 .id = -1,
1667 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
1668 .resource = bfin_lq035q1_resources,
1669 .dev = {
1670 .platform_data = &bfin_lq035q1_data,
1671 },
1672 };
1673 #endif
1674
1675 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
1676 #ifdef CONFIG_SERIAL_BFIN_UART0
1677 static struct resource bfin_uart0_resources[] = {
1678 {
1679 .start = UART0_THR,
1680 .end = UART0_GCTL+2,
1681 .flags = IORESOURCE_MEM,
1682 },
1683 {
1684 .start = IRQ_UART0_RX,
1685 .end = IRQ_UART0_RX+1,
1686 .flags = IORESOURCE_IRQ,
1687 },
1688 {
1689 .start = IRQ_UART0_ERROR,
1690 .end = IRQ_UART0_ERROR,
1691 .flags = IORESOURCE_IRQ,
1692 },
1693 {
1694 .start = CH_UART0_TX,
1695 .end = CH_UART0_TX,
1696 .flags = IORESOURCE_DMA,
1697 },
1698 {
1699 .start = CH_UART0_RX,
1700 .end = CH_UART0_RX,
1701 .flags = IORESOURCE_DMA,
1702 },
1703 #ifdef CONFIG_BFIN_UART0_CTSRTS
1704 { /* CTS pin */
1705 .start = GPIO_PG7,
1706 .end = GPIO_PG7,
1707 .flags = IORESOURCE_IO,
1708 },
1709 { /* RTS pin */
1710 .start = GPIO_PG6,
1711 .end = GPIO_PG6,
1712 .flags = IORESOURCE_IO,
1713 },
1714 #endif
1715 };
1716
1717 static unsigned short bfin_uart0_peripherals[] = {
1718 P_UART0_TX, P_UART0_RX, 0
1719 };
1720
1721 static struct platform_device bfin_uart0_device = {
1722 .name = "bfin-uart",
1723 .id = 0,
1724 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
1725 .resource = bfin_uart0_resources,
1726 .dev = {
1727 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
1728 },
1729 };
1730 #endif
1731 #ifdef CONFIG_SERIAL_BFIN_UART1
1732 static struct resource bfin_uart1_resources[] = {
1733 {
1734 .start = UART1_THR,
1735 .end = UART1_GCTL+2,
1736 .flags = IORESOURCE_MEM,
1737 },
1738 {
1739 .start = IRQ_UART1_RX,
1740 .end = IRQ_UART1_RX+1,
1741 .flags = IORESOURCE_IRQ,
1742 },
1743 {
1744 .start = IRQ_UART1_ERROR,
1745 .end = IRQ_UART1_ERROR,
1746 .flags = IORESOURCE_IRQ,
1747 },
1748 {
1749 .start = CH_UART1_TX,
1750 .end = CH_UART1_TX,
1751 .flags = IORESOURCE_DMA,
1752 },
1753 {
1754 .start = CH_UART1_RX,
1755 .end = CH_UART1_RX,
1756 .flags = IORESOURCE_DMA,
1757 },
1758 };
1759
1760 static unsigned short bfin_uart1_peripherals[] = {
1761 P_UART1_TX, P_UART1_RX, 0
1762 };
1763
1764 static struct platform_device bfin_uart1_device = {
1765 .name = "bfin-uart",
1766 .id = 1,
1767 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
1768 .resource = bfin_uart1_resources,
1769 .dev = {
1770 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
1771 },
1772 };
1773 #endif
1774 #endif
1775
1776 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
1777 #ifdef CONFIG_BFIN_SIR0
1778 static struct resource bfin_sir0_resources[] = {
1779 {
1780 .start = 0xFFC00400,
1781 .end = 0xFFC004FF,
1782 .flags = IORESOURCE_MEM,
1783 },
1784 {
1785 .start = IRQ_UART0_RX,
1786 .end = IRQ_UART0_RX+1,
1787 .flags = IORESOURCE_IRQ,
1788 },
1789 {
1790 .start = CH_UART0_RX,
1791 .end = CH_UART0_RX+1,
1792 .flags = IORESOURCE_DMA,
1793 },
1794 };
1795
1796 static struct platform_device bfin_sir0_device = {
1797 .name = "bfin_sir",
1798 .id = 0,
1799 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
1800 .resource = bfin_sir0_resources,
1801 };
1802 #endif
1803 #ifdef CONFIG_BFIN_SIR1
1804 static struct resource bfin_sir1_resources[] = {
1805 {
1806 .start = 0xFFC02000,
1807 .end = 0xFFC020FF,
1808 .flags = IORESOURCE_MEM,
1809 },
1810 {
1811 .start = IRQ_UART1_RX,
1812 .end = IRQ_UART1_RX+1,
1813 .flags = IORESOURCE_IRQ,
1814 },
1815 {
1816 .start = CH_UART1_RX,
1817 .end = CH_UART1_RX+1,
1818 .flags = IORESOURCE_DMA,
1819 },
1820 };
1821
1822 static struct platform_device bfin_sir1_device = {
1823 .name = "bfin_sir",
1824 .id = 1,
1825 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
1826 .resource = bfin_sir1_resources,
1827 };
1828 #endif
1829 #endif
1830
1831 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1832 static struct resource bfin_twi0_resource[] = {
1833 [0] = {
1834 .start = TWI0_REGBASE,
1835 .end = TWI0_REGBASE,
1836 .flags = IORESOURCE_MEM,
1837 },
1838 [1] = {
1839 .start = IRQ_TWI,
1840 .end = IRQ_TWI,
1841 .flags = IORESOURCE_IRQ,
1842 },
1843 };
1844
1845 static struct platform_device i2c_bfin_twi_device = {
1846 .name = "i2c-bfin-twi",
1847 .id = 0,
1848 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
1849 .resource = bfin_twi0_resource,
1850 };
1851 #endif
1852
1853 #if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
1854 static const unsigned short adp5588_keymap[ADP5588_KEYMAPSIZE] = {
1855 [0] = KEY_GRAVE,
1856 [1] = KEY_1,
1857 [2] = KEY_2,
1858 [3] = KEY_3,
1859 [4] = KEY_4,
1860 [5] = KEY_5,
1861 [6] = KEY_6,
1862 [7] = KEY_7,
1863 [8] = KEY_8,
1864 [9] = KEY_9,
1865 [10] = KEY_0,
1866 [11] = KEY_MINUS,
1867 [12] = KEY_EQUAL,
1868 [13] = KEY_BACKSLASH,
1869 [15] = KEY_KP0,
1870 [16] = KEY_Q,
1871 [17] = KEY_W,
1872 [18] = KEY_E,
1873 [19] = KEY_R,
1874 [20] = KEY_T,
1875 [21] = KEY_Y,
1876 [22] = KEY_U,
1877 [23] = KEY_I,
1878 [24] = KEY_O,
1879 [25] = KEY_P,
1880 [26] = KEY_LEFTBRACE,
1881 [27] = KEY_RIGHTBRACE,
1882 [29] = KEY_KP1,
1883 [30] = KEY_KP2,
1884 [31] = KEY_KP3,
1885 [32] = KEY_A,
1886 [33] = KEY_S,
1887 [34] = KEY_D,
1888 [35] = KEY_F,
1889 [36] = KEY_G,
1890 [37] = KEY_H,
1891 [38] = KEY_J,
1892 [39] = KEY_K,
1893 [40] = KEY_L,
1894 [41] = KEY_SEMICOLON,
1895 [42] = KEY_APOSTROPHE,
1896 [43] = KEY_BACKSLASH,
1897 [45] = KEY_KP4,
1898 [46] = KEY_KP5,
1899 [47] = KEY_KP6,
1900 [48] = KEY_102ND,
1901 [49] = KEY_Z,
1902 [50] = KEY_X,
1903 [51] = KEY_C,
1904 [52] = KEY_V,
1905 [53] = KEY_B,
1906 [54] = KEY_N,
1907 [55] = KEY_M,
1908 [56] = KEY_COMMA,
1909 [57] = KEY_DOT,
1910 [58] = KEY_SLASH,
1911 [60] = KEY_KPDOT,
1912 [61] = KEY_KP7,
1913 [62] = KEY_KP8,
1914 [63] = KEY_KP9,
1915 [64] = KEY_SPACE,
1916 [65] = KEY_BACKSPACE,
1917 [66] = KEY_TAB,
1918 [67] = KEY_KPENTER,
1919 [68] = KEY_ENTER,
1920 [69] = KEY_ESC,
1921 [70] = KEY_DELETE,
1922 [74] = KEY_KPMINUS,
1923 [76] = KEY_UP,
1924 [77] = KEY_DOWN,
1925 [78] = KEY_RIGHT,
1926 [79] = KEY_LEFT,
1927 };
1928
1929 static struct adp5588_kpad_platform_data adp5588_kpad_data = {
1930 .rows = 8,
1931 .cols = 10,
1932 .keymap = adp5588_keymap,
1933 .keymapsize = ARRAY_SIZE(adp5588_keymap),
1934 .repeat = 0,
1935 };
1936 #endif
1937
1938 #if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
1939 #include <linux/mfd/adp5520.h>
1940
1941 /*
1942 * ADP5520/5501 Backlight Data
1943 */
1944
1945 static struct adp5520_backlight_platform_data adp5520_backlight_data = {
1946 .fade_in = ADP5520_FADE_T_1200ms,
1947 .fade_out = ADP5520_FADE_T_1200ms,
1948 .fade_led_law = ADP5520_BL_LAW_LINEAR,
1949 .en_ambl_sens = 1,
1950 .abml_filt = ADP5520_BL_AMBL_FILT_640ms,
1951 .l1_daylight_max = ADP5520_BL_CUR_mA(15),
1952 .l1_daylight_dim = ADP5520_BL_CUR_mA(0),
1953 .l2_office_max = ADP5520_BL_CUR_mA(7),
1954 .l2_office_dim = ADP5520_BL_CUR_mA(0),
1955 .l3_dark_max = ADP5520_BL_CUR_mA(3),
1956 .l3_dark_dim = ADP5520_BL_CUR_mA(0),
1957 .l2_trip = ADP5520_L2_COMP_CURR_uA(700),
1958 .l2_hyst = ADP5520_L2_COMP_CURR_uA(50),
1959 .l3_trip = ADP5520_L3_COMP_CURR_uA(80),
1960 .l3_hyst = ADP5520_L3_COMP_CURR_uA(20),
1961 };
1962
1963 /*
1964 * ADP5520/5501 LEDs Data
1965 */
1966
1967 static struct led_info adp5520_leds[] = {
1968 {
1969 .name = "adp5520-led1",
1970 .default_trigger = "none",
1971 .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
1972 },
1973 #ifdef ADP5520_EN_ALL_LEDS
1974 {
1975 .name = "adp5520-led2",
1976 .default_trigger = "none",
1977 .flags = FLAG_ID_ADP5520_LED2_ADP5501_LED1,
1978 },
1979 {
1980 .name = "adp5520-led3",
1981 .default_trigger = "none",
1982 .flags = FLAG_ID_ADP5520_LED3_ADP5501_LED2,
1983 },
1984 #endif
1985 };
1986
1987 static struct adp5520_leds_platform_data adp5520_leds_data = {
1988 .num_leds = ARRAY_SIZE(adp5520_leds),
1989 .leds = adp5520_leds,
1990 .fade_in = ADP5520_FADE_T_600ms,
1991 .fade_out = ADP5520_FADE_T_600ms,
1992 .led_on_time = ADP5520_LED_ONT_600ms,
1993 };
1994
1995 /*
1996 * ADP5520 GPIO Data
1997 */
1998
1999 static struct adp5520_gpio_platform_data adp5520_gpio_data = {
2000 .gpio_start = 50,
2001 .gpio_en_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
2002 .gpio_pullup_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
2003 };
2004
2005 /*
2006 * ADP5520 Keypad Data
2007 */
2008
2009 static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
2010 [ADP5520_KEY(0, 0)] = KEY_GRAVE,
2011 [ADP5520_KEY(0, 1)] = KEY_1,
2012 [ADP5520_KEY(0, 2)] = KEY_2,
2013 [ADP5520_KEY(0, 3)] = KEY_3,
2014 [ADP5520_KEY(1, 0)] = KEY_4,
2015 [ADP5520_KEY(1, 1)] = KEY_5,
2016 [ADP5520_KEY(1, 2)] = KEY_6,
2017 [ADP5520_KEY(1, 3)] = KEY_7,
2018 [ADP5520_KEY(2, 0)] = KEY_8,
2019 [ADP5520_KEY(2, 1)] = KEY_9,
2020 [ADP5520_KEY(2, 2)] = KEY_0,
2021 [ADP5520_KEY(2, 3)] = KEY_MINUS,
2022 [ADP5520_KEY(3, 0)] = KEY_EQUAL,
2023 [ADP5520_KEY(3, 1)] = KEY_BACKSLASH,
2024 [ADP5520_KEY(3, 2)] = KEY_BACKSPACE,
2025 [ADP5520_KEY(3, 3)] = KEY_ENTER,
2026 };
2027
2028 static struct adp5520_keys_platform_data adp5520_keys_data = {
2029 .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
2030 .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
2031 .keymap = adp5520_keymap,
2032 .keymapsize = ARRAY_SIZE(adp5520_keymap),
2033 .repeat = 0,
2034 };
2035
2036 /*
2037 * ADP5520/5501 Multifunction Device Init Data
2038 */
2039
2040 static struct adp5520_platform_data adp5520_pdev_data = {
2041 .backlight = &adp5520_backlight_data,
2042 .leds = &adp5520_leds_data,
2043 .gpio = &adp5520_gpio_data,
2044 .keys = &adp5520_keys_data,
2045 };
2046
2047 #endif
2048
2049 #if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
2050 static struct adp5588_gpio_platform_data adp5588_gpio_data = {
2051 .gpio_start = 50,
2052 .pullup_dis_mask = 0,
2053 };
2054 #endif
2055
2056 #if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
2057 #include <linux/i2c/adp8870.h>
2058 static struct led_info adp8870_leds[] = {
2059 {
2060 .name = "adp8870-led7",
2061 .default_trigger = "none",
2062 .flags = ADP8870_LED_D7 | ADP8870_LED_OFFT_600ms,
2063 },
2064 };
2065
2066
2067 static struct adp8870_backlight_platform_data adp8870_pdata = {
2068 .bl_led_assign = ADP8870_BL_D1 | ADP8870_BL_D2 | ADP8870_BL_D3 |
2069 ADP8870_BL_D4 | ADP8870_BL_D5 | ADP8870_BL_D6, /* 1 = Backlight 0 = Individual LED */
2070 .pwm_assign = 0, /* 1 = Enables PWM mode */
2071
2072 .bl_fade_in = ADP8870_FADE_T_1200ms, /* Backlight Fade-In Timer */
2073 .bl_fade_out = ADP8870_FADE_T_1200ms, /* Backlight Fade-Out Timer */
2074 .bl_fade_law = ADP8870_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
2075
2076 .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
2077 .abml_filt = ADP8870_BL_AMBL_FILT_320ms, /* Light sensor filter time */
2078
2079 .l1_daylight_max = ADP8870_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2080 .l1_daylight_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2081 .l2_bright_max = ADP8870_BL_CUR_mA(14), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2082 .l2_bright_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2083 .l3_office_max = ADP8870_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2084 .l3_office_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2085 .l4_indoor_max = ADP8870_BL_CUR_mA(3), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2086 .l4_indor_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2087 .l5_dark_max = ADP8870_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2088 .l5_dark_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2089
2090 .l2_trip = ADP8870_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
2091 .l2_hyst = ADP8870_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
2092 .l3_trip = ADP8870_L3_COMP_CURR_uA(389), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
2093 .l3_hyst = ADP8870_L3_COMP_CURR_uA(54), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
2094 .l4_trip = ADP8870_L4_COMP_CURR_uA(167), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
2095 .l4_hyst = ADP8870_L4_COMP_CURR_uA(16), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
2096 .l5_trip = ADP8870_L5_COMP_CURR_uA(43), /* use L5_COMP_CURR_uA(I) 0 <= I <= 138 uA */
2097 .l5_hyst = ADP8870_L5_COMP_CURR_uA(11), /* use L6_COMP_CURR_uA(I) 0 <= I <= 138 uA */
2098
2099 .leds = adp8870_leds,
2100 .num_leds = ARRAY_SIZE(adp8870_leds),
2101 .led_fade_law = ADP8870_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
2102 .led_fade_in = ADP8870_FADE_T_600ms,
2103 .led_fade_out = ADP8870_FADE_T_600ms,
2104 .led_on_time = ADP8870_LED_ONT_200ms,
2105 };
2106 #endif
2107
2108 #if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
2109 #include <linux/i2c/adp8860.h>
2110 static struct led_info adp8860_leds[] = {
2111 {
2112 .name = "adp8860-led7",
2113 .default_trigger = "none",
2114 .flags = ADP8860_LED_D7 | ADP8860_LED_OFFT_600ms,
2115 },
2116 };
2117
2118 static struct adp8860_backlight_platform_data adp8860_pdata = {
2119 .bl_led_assign = ADP8860_BL_D1 | ADP8860_BL_D2 | ADP8860_BL_D3 |
2120 ADP8860_BL_D4 | ADP8860_BL_D5 | ADP8860_BL_D6, /* 1 = Backlight 0 = Individual LED */
2121
2122 .bl_fade_in = ADP8860_FADE_T_1200ms, /* Backlight Fade-In Timer */
2123 .bl_fade_out = ADP8860_FADE_T_1200ms, /* Backlight Fade-Out Timer */
2124 .bl_fade_law = ADP8860_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
2125
2126 .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
2127 .abml_filt = ADP8860_BL_AMBL_FILT_320ms, /* Light sensor filter time */
2128
2129 .l1_daylight_max = ADP8860_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2130 .l1_daylight_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2131 .l2_office_max = ADP8860_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2132 .l2_office_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2133 .l3_dark_max = ADP8860_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2134 .l3_dark_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2135
2136 .l2_trip = ADP8860_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
2137 .l2_hyst = ADP8860_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
2138 .l3_trip = ADP8860_L3_COMP_CURR_uA(43), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
2139 .l3_hyst = ADP8860_L3_COMP_CURR_uA(11), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
2140
2141 .leds = adp8860_leds,
2142 .num_leds = ARRAY_SIZE(adp8860_leds),
2143 .led_fade_law = ADP8860_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
2144 .led_fade_in = ADP8860_FADE_T_600ms,
2145 .led_fade_out = ADP8860_FADE_T_600ms,
2146 .led_on_time = ADP8860_LED_ONT_200ms,
2147 };
2148 #endif
2149
2150 #if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
2151 static struct regulator_consumer_supply ad5398_consumer = {
2152 .supply = "current",
2153 };
2154
2155 static struct regulator_init_data ad5398_regulator_data = {
2156 .constraints = {
2157 .name = "current range",
2158 .max_uA = 120000,
2159 .valid_ops_mask = REGULATOR_CHANGE_CURRENT | REGULATOR_CHANGE_STATUS,
2160 },
2161 .num_consumer_supplies = 1,
2162 .consumer_supplies = &ad5398_consumer,
2163 };
2164
2165 #if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
2166 defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
2167 static struct platform_device ad5398_virt_consumer_device = {
2168 .name = "reg-virt-consumer",
2169 .id = 0,
2170 .dev = {
2171 .platform_data = "current", /* Passed to driver */
2172 },
2173 };
2174 #endif
2175 #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2176 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2177 static struct regulator_bulk_data ad5398_bulk_data = {
2178 .supply = "current",
2179 };
2180
2181 static struct regulator_userspace_consumer_data ad5398_userspace_comsumer_data = {
2182 .name = "ad5398",
2183 .num_supplies = 1,
2184 .supplies = &ad5398_bulk_data,
2185 };
2186
2187 static struct platform_device ad5398_userspace_consumer_device = {
2188 .name = "reg-userspace-consumer",
2189 .id = 0,
2190 .dev = {
2191 .platform_data = &ad5398_userspace_comsumer_data,
2192 },
2193 };
2194 #endif
2195 #endif
2196
2197 #if defined(CONFIG_ADT7410) || defined(CONFIG_ADT7410_MODULE)
2198 /* INT bound temperature alarm event. line 1 */
2199 static unsigned long adt7410_platform_data[2] = {
2200 IRQ_PG4, IRQF_TRIGGER_LOW,
2201 };
2202 #endif
2203
2204 #if defined(CONFIG_ADT7316_I2C) || defined(CONFIG_ADT7316_I2C_MODULE)
2205 /* INT bound temperature alarm event. line 1 */
2206 static unsigned long adt7316_i2c_data[2] = {
2207 IRQF_TRIGGER_LOW, /* interrupt flags */
2208 GPIO_PF4, /* ldac_pin, 0 means DAC/LDAC registers control DAC update */
2209 };
2210 #endif
2211
2212 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
2213 #if defined(CONFIG_SND_BF5XX_SOC_AD193X) || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
2214 {
2215 I2C_BOARD_INFO("ad1937", 0x04),
2216 },
2217 #endif
2218
2219 #if defined(CONFIG_SND_BF5XX_SOC_ADAV80X) || defined(CONFIG_SND_BF5XX_SOC_ADAV80X_MODULE)
2220 {
2221 I2C_BOARD_INFO("adav803", 0x10),
2222 },
2223 #endif
2224
2225 #if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
2226 {
2227 I2C_BOARD_INFO("ad7142_captouch", 0x2C),
2228 .irq = IRQ_PG5,
2229 .platform_data = (void *)&ad7142_i2c_platform_data,
2230 },
2231 #endif
2232
2233 #if defined(CONFIG_AD7150) || defined(CONFIG_AD7150_MODULE)
2234 {
2235 I2C_BOARD_INFO("ad7150", 0x48),
2236 .irq = IRQ_PG5, /* fixme: use real interrupt number */
2237 },
2238 #endif
2239
2240 #if defined(CONFIG_AD7152) || defined(CONFIG_AD7152_MODULE)
2241 {
2242 I2C_BOARD_INFO("ad7152", 0x48),
2243 },
2244 #endif
2245
2246 #if defined(CONFIG_AD774X) || defined(CONFIG_AD774X_MODULE)
2247 {
2248 I2C_BOARD_INFO("ad774x", 0x48),
2249 },
2250 #endif
2251
2252 #if defined(CONFIG_AD7414) || defined(CONFIG_AD7414_MODULE)
2253 {
2254 I2C_BOARD_INFO("ad7414", 0x9),
2255 .irq = IRQ_PG5,
2256 .irq_flags = IRQF_TRIGGER_LOW,
2257 },
2258 #endif
2259
2260 #if defined(CONFIG_AD7416) || defined(CONFIG_AD7416_MODULE)
2261 {
2262 I2C_BOARD_INFO("ad7417", 0xb),
2263 .irq = IRQ_PG5,
2264 .irq_flags = IRQF_TRIGGER_LOW,
2265 .platform_data = (void *)GPIO_PF4,
2266 },
2267 #endif
2268
2269 #if defined(CONFIG_ADE7854_I2C) || defined(CONFIG_ADE7854_I2C_MODULE)
2270 {
2271 I2C_BOARD_INFO("ade7854", 0x38),
2272 },
2273 #endif
2274
2275 #if defined(CONFIG_ADT75) || defined(CONFIG_ADT75_MODULE)
2276 {
2277 I2C_BOARD_INFO("adt75", 0x9),
2278 .irq = IRQ_PG5,
2279 .irq_flags = IRQF_TRIGGER_LOW,
2280 },
2281 #endif
2282
2283 #if defined(CONFIG_ADT7408) || defined(CONFIG_ADT7408_MODULE)
2284 {
2285 I2C_BOARD_INFO("adt7408", 0x18),
2286 .irq = IRQ_PG5,
2287 .irq_flags = IRQF_TRIGGER_LOW,
2288 },
2289 #endif
2290
2291 #if defined(CONFIG_ADT7410) || defined(CONFIG_ADT7410_MODULE)
2292 {
2293 I2C_BOARD_INFO("adt7410", 0x48),
2294 /* CT critical temperature event. line 0 */
2295 .irq = IRQ_PG5,
2296 .irq_flags = IRQF_TRIGGER_LOW,
2297 .platform_data = (void *)&adt7410_platform_data,
2298 },
2299 #endif
2300
2301 #if defined(CONFIG_AD7291) || defined(CONFIG_AD7291_MODULE)
2302 {
2303 I2C_BOARD_INFO("ad7291", 0x20),
2304 .irq = IRQ_PG5,
2305 .irq_flags = IRQF_TRIGGER_LOW,
2306 },
2307 #endif
2308
2309 #if defined(CONFIG_ADT7316_I2C) || defined(CONFIG_ADT7316_I2C_MODULE)
2310 {
2311 I2C_BOARD_INFO("adt7316", 0x48),
2312 .irq = IRQ_PG6,
2313 .platform_data = (void *)&adt7316_i2c_data,
2314 },
2315 #endif
2316
2317 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
2318 {
2319 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
2320 },
2321 #endif
2322 #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
2323 {
2324 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
2325 .irq = IRQ_PG6,
2326 },
2327 #endif
2328 #if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
2329 {
2330 I2C_BOARD_INFO("ad7879", 0x2F),
2331 .irq = IRQ_PG5,
2332 .platform_data = (void *)&bfin_ad7879_ts_info,
2333 },
2334 #endif
2335 #if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
2336 {
2337 I2C_BOARD_INFO("adp5588-keys", 0x34),
2338 .irq = IRQ_PG0,
2339 .platform_data = (void *)&adp5588_kpad_data,
2340 },
2341 #endif
2342 #if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
2343 {
2344 I2C_BOARD_INFO("pmic-adp5520", 0x32),
2345 .irq = IRQ_PG0,
2346 .platform_data = (void *)&adp5520_pdev_data,
2347 },
2348 #endif
2349 #if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
2350 {
2351 I2C_BOARD_INFO("adxl34x", 0x53),
2352 .irq = IRQ_PG3,
2353 .platform_data = (void *)&adxl34x_info,
2354 },
2355 #endif
2356 #if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
2357 {
2358 I2C_BOARD_INFO("adp5588-gpio", 0x34),
2359 .platform_data = (void *)&adp5588_gpio_data,
2360 },
2361 #endif
2362 #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
2363 {
2364 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
2365 },
2366 #endif
2367 #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
2368 {
2369 I2C_BOARD_INFO("bf537-lq035-ad5280", 0x2F),
2370 },
2371 #endif
2372 #if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
2373 {
2374 I2C_BOARD_INFO("adp8870", 0x2B),
2375 .platform_data = (void *)&adp8870_pdata,
2376 },
2377 #endif
2378 #if defined(CONFIG_SND_SOC_ADAU1371) || defined(CONFIG_SND_SOC_ADAU1371_MODULE)
2379 {
2380 I2C_BOARD_INFO("adau1371", 0x1A),
2381 },
2382 #endif
2383 #if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
2384 {
2385 I2C_BOARD_INFO("adau1761", 0x38),
2386 },
2387 #endif
2388 #if defined(CONFIG_SND_SOC_ADAU1361) || defined(CONFIG_SND_SOC_ADAU1361_MODULE)
2389 {
2390 I2C_BOARD_INFO("adau1361", 0x38),
2391 },
2392 #endif
2393 #if defined(CONFIG_AD525X_DPOT) || defined(CONFIG_AD525X_DPOT_MODULE)
2394 {
2395 I2C_BOARD_INFO("ad5258", 0x18),
2396 },
2397 #endif
2398 #if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
2399 {
2400 I2C_BOARD_INFO("ssm2602", 0x1b),
2401 },
2402 #endif
2403 #if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
2404 {
2405 I2C_BOARD_INFO("ad5398", 0xC),
2406 .platform_data = (void *)&ad5398_regulator_data,
2407 },
2408 #endif
2409 #if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
2410 {
2411 I2C_BOARD_INFO("adp8860", 0x2A),
2412 .platform_data = (void *)&adp8860_pdata,
2413 },
2414 #endif
2415 #if defined(CONFIG_SND_SOC_ADAU1373) || defined(CONFIG_SND_SOC_ADAU1373_MODULE)
2416 {
2417 I2C_BOARD_INFO("adau1373", 0x1A),
2418 },
2419 #endif
2420 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
2421 {
2422 I2C_BOARD_INFO("ad5252", 0x2e),
2423 },
2424 #endif
2425 };
2426
2427 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
2428 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
2429 static struct resource bfin_sport0_uart_resources[] = {
2430 {
2431 .start = SPORT0_TCR1,
2432 .end = SPORT0_MRCS3+4,
2433 .flags = IORESOURCE_MEM,
2434 },
2435 {
2436 .start = IRQ_SPORT0_RX,
2437 .end = IRQ_SPORT0_RX+1,
2438 .flags = IORESOURCE_IRQ,
2439 },
2440 {
2441 .start = IRQ_SPORT0_ERROR,
2442 .end = IRQ_SPORT0_ERROR,
2443 .flags = IORESOURCE_IRQ,
2444 },
2445 };
2446
2447 static unsigned short bfin_sport0_peripherals[] = {
2448 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
2449 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
2450 };
2451
2452 static struct platform_device bfin_sport0_uart_device = {
2453 .name = "bfin-sport-uart",
2454 .id = 0,
2455 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
2456 .resource = bfin_sport0_uart_resources,
2457 .dev = {
2458 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
2459 },
2460 };
2461 #endif
2462 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
2463 static struct resource bfin_sport1_uart_resources[] = {
2464 {
2465 .start = SPORT1_TCR1,
2466 .end = SPORT1_MRCS3+4,
2467 .flags = IORESOURCE_MEM,
2468 },
2469 {
2470 .start = IRQ_SPORT1_RX,
2471 .end = IRQ_SPORT1_RX+1,
2472 .flags = IORESOURCE_IRQ,
2473 },
2474 {
2475 .start = IRQ_SPORT1_ERROR,
2476 .end = IRQ_SPORT1_ERROR,
2477 .flags = IORESOURCE_IRQ,
2478 },
2479 };
2480
2481 static unsigned short bfin_sport1_peripherals[] = {
2482 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
2483 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
2484 };
2485
2486 static struct platform_device bfin_sport1_uart_device = {
2487 .name = "bfin-sport-uart",
2488 .id = 1,
2489 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
2490 .resource = bfin_sport1_uart_resources,
2491 .dev = {
2492 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
2493 },
2494 };
2495 #endif
2496 #endif
2497
2498 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
2499 #define CF_IDE_NAND_CARD_USE_HDD_INTERFACE
2500 /* #define CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE */
2501
2502 #ifdef CF_IDE_NAND_CARD_USE_HDD_INTERFACE
2503 #define PATA_INT IRQ_PF5
2504 static struct pata_platform_info bfin_pata_platform_data = {
2505 .ioport_shift = 1,
2506 .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
2507 };
2508
2509 static struct resource bfin_pata_resources[] = {
2510 {
2511 .start = 0x20314020,
2512 .end = 0x2031403F,
2513 .flags = IORESOURCE_MEM,
2514 },
2515 {
2516 .start = 0x2031401C,
2517 .end = 0x2031401F,
2518 .flags = IORESOURCE_MEM,
2519 },
2520 {
2521 .start = PATA_INT,
2522 .end = PATA_INT,
2523 .flags = IORESOURCE_IRQ,
2524 },
2525 };
2526 #elif defined(CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE)
2527 static struct pata_platform_info bfin_pata_platform_data = {
2528 .ioport_shift = 0,
2529 };
2530 /* CompactFlash Storage Card Memory Mapped Addressing
2531 * /REG = A11 = 1
2532 */
2533 static struct resource bfin_pata_resources[] = {
2534 {
2535 .start = 0x20211800,
2536 .end = 0x20211807,
2537 .flags = IORESOURCE_MEM,
2538 },
2539 {
2540 .start = 0x2021180E, /* Device Ctl */
2541 .end = 0x2021180E,
2542 .flags = IORESOURCE_MEM,
2543 },
2544 };
2545 #endif
2546
2547 static struct platform_device bfin_pata_device = {
2548 .name = "pata_platform",
2549 .id = -1,
2550 .num_resources = ARRAY_SIZE(bfin_pata_resources),
2551 .resource = bfin_pata_resources,
2552 .dev = {
2553 .platform_data = &bfin_pata_platform_data,
2554 }
2555 };
2556 #endif
2557
2558 static const unsigned int cclk_vlev_datasheet[] =
2559 {
2560 VRPAIR(VLEV_085, 250000000),
2561 VRPAIR(VLEV_090, 376000000),
2562 VRPAIR(VLEV_095, 426000000),
2563 VRPAIR(VLEV_100, 426000000),
2564 VRPAIR(VLEV_105, 476000000),
2565 VRPAIR(VLEV_110, 476000000),
2566 VRPAIR(VLEV_115, 476000000),
2567 VRPAIR(VLEV_120, 500000000),
2568 VRPAIR(VLEV_125, 533000000),
2569 VRPAIR(VLEV_130, 600000000),
2570 };
2571
2572 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
2573 .tuple_tab = cclk_vlev_datasheet,
2574 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
2575 .vr_settling_time = 25 /* us */,
2576 };
2577
2578 static struct platform_device bfin_dpmc = {
2579 .name = "bfin dpmc",
2580 .dev = {
2581 .platform_data = &bfin_dmpc_vreg_data,
2582 },
2583 };
2584
2585 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \
2586 defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE) || \
2587 defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2588
2589 #define SPORT_REQ(x) \
2590 [x] = {P_SPORT##x##_TFS, P_SPORT##x##_DTPRI, P_SPORT##x##_TSCLK, \
2591 P_SPORT##x##_RFS, P_SPORT##x##_DRPRI, P_SPORT##x##_RSCLK, 0}
2592
2593 static const u16 bfin_snd_pin[][7] = {
2594 SPORT_REQ(0),
2595 SPORT_REQ(1),
2596 };
2597
2598 static struct bfin_snd_platform_data bfin_snd_data[] = {
2599 {
2600 .pin_req = &bfin_snd_pin[0][0],
2601 },
2602 {
2603 .pin_req = &bfin_snd_pin[1][0],
2604 },
2605 };
2606
2607 #define BFIN_SND_RES(x) \
2608 [x] = { \
2609 { \
2610 .start = SPORT##x##_TCR1, \
2611 .end = SPORT##x##_TCR1, \
2612 .flags = IORESOURCE_MEM \
2613 }, \
2614 { \
2615 .start = CH_SPORT##x##_RX, \
2616 .end = CH_SPORT##x##_RX, \
2617 .flags = IORESOURCE_DMA, \
2618 }, \
2619 { \
2620 .start = CH_SPORT##x##_TX, \
2621 .end = CH_SPORT##x##_TX, \
2622 .flags = IORESOURCE_DMA, \
2623 }, \
2624 { \
2625 .start = IRQ_SPORT##x##_ERROR, \
2626 .end = IRQ_SPORT##x##_ERROR, \
2627 .flags = IORESOURCE_IRQ, \
2628 } \
2629 }
2630
2631 static struct resource bfin_snd_resources[][4] = {
2632 BFIN_SND_RES(0),
2633 BFIN_SND_RES(1),
2634 };
2635
2636 static struct platform_device bfin_pcm = {
2637 .name = "bfin-pcm-audio",
2638 .id = -1,
2639 };
2640 #endif
2641
2642 #if defined(CONFIG_SND_BF5XX_SOC_AD73311) || defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE)
2643 static struct platform_device bfin_ad73311_codec_device = {
2644 .name = "ad73311",
2645 .id = -1,
2646 };
2647 #endif
2648
2649 #if defined(CONFIG_SND_BF5XX_SOC_I2S) || defined(CONFIG_SND_BF5XX_SOC_I2S_MODULE)
2650 static struct platform_device bfin_i2s = {
2651 .name = "bfin-i2s",
2652 .id = CONFIG_SND_BF5XX_SPORT_NUM,
2653 .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
2654 .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
2655 .dev = {
2656 .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
2657 },
2658 };
2659 #endif
2660
2661 #if defined(CONFIG_SND_BF5XX_SOC_TDM) || defined(CONFIG_SND_BF5XX_SOC_TDM_MODULE)
2662 static struct platform_device bfin_tdm = {
2663 .name = "bfin-tdm",
2664 .id = CONFIG_SND_BF5XX_SPORT_NUM,
2665 .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
2666 .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
2667 .dev = {
2668 .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
2669 },
2670 };
2671 #endif
2672
2673 #if defined(CONFIG_SND_BF5XX_SOC_AC97) || defined(CONFIG_SND_BF5XX_SOC_AC97_MODULE)
2674 static struct platform_device bfin_ac97 = {
2675 .name = "bfin-ac97",
2676 .id = CONFIG_SND_BF5XX_SPORT_NUM,
2677 .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
2678 .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
2679 .dev = {
2680 .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
2681 },
2682 };
2683 #endif
2684
2685 #if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
2686 #define REGULATOR_ADP122 "adp122"
2687 #define REGULATOR_ADP122_UV 2500000
2688
2689 static struct regulator_consumer_supply adp122_consumers = {
2690 .supply = REGULATOR_ADP122,
2691 };
2692
2693 static struct regulator_init_data adp_switch_regulator_data = {
2694 .constraints = {
2695 .name = REGULATOR_ADP122,
2696 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
2697 .min_uV = REGULATOR_ADP122_UV,
2698 .max_uV = REGULATOR_ADP122_UV,
2699 .min_uA = 0,
2700 .max_uA = 300000,
2701 },
2702 .num_consumer_supplies = 1, /* only 1 */
2703 .consumer_supplies = &adp122_consumers,
2704 };
2705
2706 static struct fixed_voltage_config adp_switch_pdata = {
2707 .supply_name = REGULATOR_ADP122,
2708 .microvolts = REGULATOR_ADP122_UV,
2709 .gpio = GPIO_PF2,
2710 .enable_high = 1,
2711 .enabled_at_boot = 0,
2712 .init_data = &adp_switch_regulator_data,
2713 };
2714
2715 static struct platform_device adp_switch_device = {
2716 .name = "reg-fixed-voltage",
2717 .id = 0,
2718 .dev = {
2719 .platform_data = &adp_switch_pdata,
2720 },
2721 };
2722
2723 #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2724 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2725 static struct regulator_bulk_data adp122_bulk_data = {
2726 .supply = REGULATOR_ADP122,
2727 };
2728
2729 static struct regulator_userspace_consumer_data adp122_userspace_comsumer_data = {
2730 .name = REGULATOR_ADP122,
2731 .num_supplies = 1,
2732 .supplies = &adp122_bulk_data,
2733 };
2734
2735 static struct platform_device adp122_userspace_consumer_device = {
2736 .name = "reg-userspace-consumer",
2737 .id = 0,
2738 .dev = {
2739 .platform_data = &adp122_userspace_comsumer_data,
2740 },
2741 };
2742 #endif
2743 #endif
2744
2745 #if defined(CONFIG_IIO_GPIO_TRIGGER) || \
2746 defined(CONFIG_IIO_GPIO_TRIGGER_MODULE)
2747
2748 static struct resource iio_gpio_trigger_resources[] = {
2749 [0] = {
2750 .start = IRQ_PF5,
2751 .end = IRQ_PF5,
2752 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
2753 },
2754 };
2755
2756 static struct platform_device iio_gpio_trigger = {
2757 .name = "iio_gpio_trigger",
2758 .num_resources = ARRAY_SIZE(iio_gpio_trigger_resources),
2759 .resource = iio_gpio_trigger_resources,
2760 };
2761 #endif
2762
2763 static struct platform_device *stamp_devices[] __initdata = {
2764
2765 &bfin_dpmc,
2766
2767 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
2768 &bfin_pcmcia_cf_device,
2769 #endif
2770
2771 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
2772 &rtc_device,
2773 #endif
2774
2775 #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
2776 &sl811_hcd_device,
2777 #endif
2778
2779 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
2780 &isp1362_hcd_device,
2781 #endif
2782
2783 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
2784 &bfin_isp1760_device,
2785 #endif
2786
2787 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
2788 &smc91x_device,
2789 #endif
2790
2791 #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
2792 &dm9000_device,
2793 #endif
2794
2795 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
2796 &bfin_can_device,
2797 #endif
2798
2799 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
2800 &bfin_mii_bus,
2801 &bfin_mac_device,
2802 #endif
2803
2804 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
2805 &net2272_bfin_device,
2806 #endif
2807
2808 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
2809 &bfin_spi0_device,
2810 #endif
2811
2812 #if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
2813 &bfin_sport_spi0_device,
2814 &bfin_sport_spi1_device,
2815 #endif
2816
2817 #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
2818 &bfin_fb_device,
2819 #endif
2820
2821 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
2822 &bfin_lq035q1_device,
2823 #endif
2824
2825 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
2826 #ifdef CONFIG_SERIAL_BFIN_UART0
2827 &bfin_uart0_device,
2828 #endif
2829 #ifdef CONFIG_SERIAL_BFIN_UART1
2830 &bfin_uart1_device,
2831 #endif
2832 #endif
2833
2834 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
2835 #ifdef CONFIG_BFIN_SIR0
2836 &bfin_sir0_device,
2837 #endif
2838 #ifdef CONFIG_BFIN_SIR1
2839 &bfin_sir1_device,
2840 #endif
2841 #endif
2842
2843 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
2844 &i2c_bfin_twi_device,
2845 #endif
2846
2847 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
2848 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
2849 &bfin_sport0_uart_device,
2850 #endif
2851 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
2852 &bfin_sport1_uart_device,
2853 #endif
2854 #endif
2855
2856 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
2857 &bfin_pata_device,
2858 #endif
2859
2860 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
2861 &bfin_device_gpiokeys,
2862 #endif
2863
2864 #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
2865 &bfin_async_nand_device,
2866 #endif
2867
2868 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
2869 &stamp_flash_device,
2870 #endif
2871
2872 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \
2873 defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE) || \
2874 defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2875 &bfin_pcm,
2876 #endif
2877
2878 #if defined(CONFIG_SND_BF5XX_SOC_AD73311) || defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE)
2879 &bfin_ad73311_codec_device,
2880 #endif
2881
2882 #if defined(CONFIG_SND_BF5XX_SOC_I2S) || defined(CONFIG_SND_BF5XX_SOC_I2S_MODULE)
2883 &bfin_i2s,
2884 #endif
2885
2886 #if defined(CONFIG_SND_BF5XX_SOC_TDM) || defined(CONFIG_SND_BF5XX_SOC_TDM_MODULE)
2887 &bfin_tdm,
2888 #endif
2889
2890 #if defined(CONFIG_SND_BF5XX_SOC_AC97) || defined(CONFIG_SND_BF5XX_SOC_AC97_MODULE)
2891 &bfin_ac97,
2892 #endif
2893
2894 #if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
2895 #if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
2896 defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
2897 &ad5398_virt_consumer_device,
2898 #endif
2899 #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2900 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2901 &ad5398_userspace_consumer_device,
2902 #endif
2903 #endif
2904
2905 #if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
2906 &adp_switch_device,
2907 #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2908 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2909 &adp122_userspace_consumer_device,
2910 #endif
2911 #endif
2912
2913 #if defined(CONFIG_IIO_GPIO_TRIGGER) || \
2914 defined(CONFIG_IIO_GPIO_TRIGGER_MODULE)
2915 &iio_gpio_trigger,
2916 #endif
2917 };
2918
2919 static int __init stamp_init(void)
2920 {
2921 printk(KERN_INFO "%s(): registering device resources\n", __func__);
2922 bfin_plat_nand_init();
2923 adf702x_mac_init();
2924 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
2925 i2c_register_board_info(0, bfin_i2c_board_info,
2926 ARRAY_SIZE(bfin_i2c_board_info));
2927 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
2928
2929 return 0;
2930 }
2931
2932 arch_initcall(stamp_init);
2933
2934
2935 static struct platform_device *stamp_early_devices[] __initdata = {
2936 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
2937 #ifdef CONFIG_SERIAL_BFIN_UART0
2938 &bfin_uart0_device,
2939 #endif
2940 #ifdef CONFIG_SERIAL_BFIN_UART1
2941 &bfin_uart1_device,
2942 #endif
2943 #endif
2944
2945 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
2946 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
2947 &bfin_sport0_uart_device,
2948 #endif
2949 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
2950 &bfin_sport1_uart_device,
2951 #endif
2952 #endif
2953 };
2954
2955 void __init native_machine_early_platform_add_devices(void)
2956 {
2957 printk(KERN_INFO "register early platform devices\n");
2958 early_platform_add_devices(stamp_early_devices,
2959 ARRAY_SIZE(stamp_early_devices));
2960 }
2961
2962 void native_machine_restart(char *cmd)
2963 {
2964 /* workaround reboot hang when booting from SPI */
2965 if ((bfin_read_SYSCR() & 0x7) == 0x3)
2966 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
2967 }
2968
2969 /*
2970 * Currently the MAC address is saved in Flash by U-Boot
2971 */
2972 #define FLASH_MAC 0x203f0000
2973 void bfin_get_ether_addr(char *addr)
2974 {
2975 *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
2976 *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
2977 }
2978 EXPORT_SYMBOL(bfin_get_ether_addr);
linux-next