arch/mips/include/asm/octeon/cvmx-pciercx-defs.h

   1 /***********************license start***************
   2  * Author: Cavium Networks
   3  *
   4  * Contact: support@caviumnetworks.com
   5  * This file is part of the OCTEON SDK
   6  *
   7  * Copyright (c) 2003-2010 Cavium Networks
   8  *
   9  * This file is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License, Version 2, as
  11  * published by the Free Software Foundation.
  12  *
  13  * This file is distributed in the hope that it will be useful, but
  14  * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
  15  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
  16  * NONINFRINGEMENT.  See the GNU General Public License for more
  17  * details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this file; if not, write to the Free Software
  21  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  22  * or visit http://www.gnu.org/licenses/.
  23  *
  24  * This file may also be available under a different license from Cavium.
  25  * Contact Cavium Networks for more information
  26  ***********************license end**************************************/
  27
  28 #ifndef __CVMX_PCIERCX_DEFS_H__
  29 #define __CVMX_PCIERCX_DEFS_H__
  30
  31 #define CVMX_PCIERCX_CFG000(block_id) (0x0000000000000000ull)
  32 #define CVMX_PCIERCX_CFG001(block_id) (0x0000000000000004ull)
  33 #define CVMX_PCIERCX_CFG002(block_id) (0x0000000000000008ull)
  34 #define CVMX_PCIERCX_CFG003(block_id) (0x000000000000000Cull)
  35 #define CVMX_PCIERCX_CFG004(block_id) (0x0000000000000010ull)
  36 #define CVMX_PCIERCX_CFG005(block_id) (0x0000000000000014ull)
  37 #define CVMX_PCIERCX_CFG006(block_id) (0x0000000000000018ull)
  38 #define CVMX_PCIERCX_CFG007(block_id) (0x000000000000001Cull)
  39 #define CVMX_PCIERCX_CFG008(block_id) (0x0000000000000020ull)
  40 #define CVMX_PCIERCX_CFG009(block_id) (0x0000000000000024ull)
  41 #define CVMX_PCIERCX_CFG010(block_id) (0x0000000000000028ull)
  42 #define CVMX_PCIERCX_CFG011(block_id) (0x000000000000002Cull)
  43 #define CVMX_PCIERCX_CFG012(block_id) (0x0000000000000030ull)
  44 #define CVMX_PCIERCX_CFG013(block_id) (0x0000000000000034ull)
  45 #define CVMX_PCIERCX_CFG014(block_id) (0x0000000000000038ull)
  46 #define CVMX_PCIERCX_CFG015(block_id) (0x000000000000003Cull)
  47 #define CVMX_PCIERCX_CFG016(block_id) (0x0000000000000040ull)
  48 #define CVMX_PCIERCX_CFG017(block_id) (0x0000000000000044ull)
  49 #define CVMX_PCIERCX_CFG020(block_id) (0x0000000000000050ull)
  50 #define CVMX_PCIERCX_CFG021(block_id) (0x0000000000000054ull)
  51 #define CVMX_PCIERCX_CFG022(block_id) (0x0000000000000058ull)
  52 #define CVMX_PCIERCX_CFG023(block_id) (0x000000000000005Cull)
  53 #define CVMX_PCIERCX_CFG028(block_id) (0x0000000000000070ull)
  54 #define CVMX_PCIERCX_CFG029(block_id) (0x0000000000000074ull)
  55 #define CVMX_PCIERCX_CFG030(block_id) (0x0000000000000078ull)
  56 #define CVMX_PCIERCX_CFG031(block_id) (0x000000000000007Cull)
  57 #define CVMX_PCIERCX_CFG032(block_id) (0x0000000000000080ull)
  58 #define CVMX_PCIERCX_CFG033(block_id) (0x0000000000000084ull)
  59 #define CVMX_PCIERCX_CFG034(block_id) (0x0000000000000088ull)
  60 #define CVMX_PCIERCX_CFG035(block_id) (0x000000000000008Cull)
  61 #define CVMX_PCIERCX_CFG036(block_id) (0x0000000000000090ull)
  62 #define CVMX_PCIERCX_CFG037(block_id) (0x0000000000000094ull)
  63 #define CVMX_PCIERCX_CFG038(block_id) (0x0000000000000098ull)
  64 #define CVMX_PCIERCX_CFG039(block_id) (0x000000000000009Cull)
  65 #define CVMX_PCIERCX_CFG040(block_id) (0x00000000000000A0ull)
  66 #define CVMX_PCIERCX_CFG041(block_id) (0x00000000000000A4ull)
  67 #define CVMX_PCIERCX_CFG042(block_id) (0x00000000000000A8ull)
  68 #define CVMX_PCIERCX_CFG064(block_id) (0x0000000000000100ull)
  69 #define CVMX_PCIERCX_CFG065(block_id) (0x0000000000000104ull)
  70 #define CVMX_PCIERCX_CFG066(block_id) (0x0000000000000108ull)
  71 #define CVMX_PCIERCX_CFG067(block_id) (0x000000000000010Cull)
  72 #define CVMX_PCIERCX_CFG068(block_id) (0x0000000000000110ull)
  73 #define CVMX_PCIERCX_CFG069(block_id) (0x0000000000000114ull)
  74 #define CVMX_PCIERCX_CFG070(block_id) (0x0000000000000118ull)
  75 #define CVMX_PCIERCX_CFG071(block_id) (0x000000000000011Cull)
  76 #define CVMX_PCIERCX_CFG072(block_id) (0x0000000000000120ull)
  77 #define CVMX_PCIERCX_CFG073(block_id) (0x0000000000000124ull)
  78 #define CVMX_PCIERCX_CFG074(block_id) (0x0000000000000128ull)
  79 #define CVMX_PCIERCX_CFG075(block_id) (0x000000000000012Cull)
  80 #define CVMX_PCIERCX_CFG076(block_id) (0x0000000000000130ull)
  81 #define CVMX_PCIERCX_CFG077(block_id) (0x0000000000000134ull)
  82 #define CVMX_PCIERCX_CFG448(block_id) (0x0000000000000700ull)
  83 #define CVMX_PCIERCX_CFG449(block_id) (0x0000000000000704ull)
  84 #define CVMX_PCIERCX_CFG450(block_id) (0x0000000000000708ull)
  85 #define CVMX_PCIERCX_CFG451(block_id) (0x000000000000070Cull)
  86 #define CVMX_PCIERCX_CFG452(block_id) (0x0000000000000710ull)
  87 #define CVMX_PCIERCX_CFG453(block_id) (0x0000000000000714ull)
  88 #define CVMX_PCIERCX_CFG454(block_id) (0x0000000000000718ull)
  89 #define CVMX_PCIERCX_CFG455(block_id) (0x000000000000071Cull)
  90 #define CVMX_PCIERCX_CFG456(block_id) (0x0000000000000720ull)
  91 #define CVMX_PCIERCX_CFG458(block_id) (0x0000000000000728ull)
  92 #define CVMX_PCIERCX_CFG459(block_id) (0x000000000000072Cull)
  93 #define CVMX_PCIERCX_CFG460(block_id) (0x0000000000000730ull)
  94 #define CVMX_PCIERCX_CFG461(block_id) (0x0000000000000734ull)
  95 #define CVMX_PCIERCX_CFG462(block_id) (0x0000000000000738ull)
  96 #define CVMX_PCIERCX_CFG463(block_id) (0x000000000000073Cull)
  97 #define CVMX_PCIERCX_CFG464(block_id) (0x0000000000000740ull)
  98 #define CVMX_PCIERCX_CFG465(block_id) (0x0000000000000744ull)
  99 #define CVMX_PCIERCX_CFG466(block_id) (0x0000000000000748ull)
 100 #define CVMX_PCIERCX_CFG467(block_id) (0x000000000000074Cull)
 101 #define CVMX_PCIERCX_CFG468(block_id) (0x0000000000000750ull)
 102 #define CVMX_PCIERCX_CFG490(block_id) (0x00000000000007A8ull)
 103 #define CVMX_PCIERCX_CFG491(block_id) (0x00000000000007ACull)
 104 #define CVMX_PCIERCX_CFG492(block_id) (0x00000000000007B0ull)
 105 #define CVMX_PCIERCX_CFG515(block_id) (0x000000000000080Cull)
 106 #define CVMX_PCIERCX_CFG516(block_id) (0x0000000000000810ull)
 107 #define CVMX_PCIERCX_CFG517(block_id) (0x0000000000000814ull)
 108
 109 union cvmx_pciercx_cfg000 {
 110         uint32_t u32;
 111         struct cvmx_pciercx_cfg000_s {
 112                 uint32_t devid:16;
 113                 uint32_t vendid:16;
 114         } s;
 115         struct cvmx_pciercx_cfg000_s cn52xx;
 116         struct cvmx_pciercx_cfg000_s cn52xxp1;
 117         struct cvmx_pciercx_cfg000_s cn56xx;
 118         struct cvmx_pciercx_cfg000_s cn56xxp1;
 119         struct cvmx_pciercx_cfg000_s cn63xx;
 120         struct cvmx_pciercx_cfg000_s cn63xxp1;
 121 };
 122
 123 union cvmx_pciercx_cfg001 {
 124         uint32_t u32;
 125         struct cvmx_pciercx_cfg001_s {
 126                 uint32_t dpe:1;
 127                 uint32_t sse:1;
 128                 uint32_t rma:1;
 129                 uint32_t rta:1;
 130                 uint32_t sta:1;
 131                 uint32_t devt:2;
 132                 uint32_t mdpe:1;
 133                 uint32_t fbb:1;
 134                 uint32_t reserved_22_22:1;
 135                 uint32_t m66:1;
 136                 uint32_t cl:1;
 137                 uint32_t i_stat:1;
 138                 uint32_t reserved_11_18:8;
 139                 uint32_t i_dis:1;
 140                 uint32_t fbbe:1;
 141                 uint32_t see:1;
 142                 uint32_t ids_wcc:1;
 143                 uint32_t per:1;
 144                 uint32_t vps:1;
 145                 uint32_t mwice:1;
 146                 uint32_t scse:1;
 147                 uint32_t me:1;
 148                 uint32_t msae:1;
 149                 uint32_t isae:1;
 150         } s;
 151         struct cvmx_pciercx_cfg001_s cn52xx;
 152         struct cvmx_pciercx_cfg001_s cn52xxp1;
 153         struct cvmx_pciercx_cfg001_s cn56xx;
 154         struct cvmx_pciercx_cfg001_s cn56xxp1;
 155         struct cvmx_pciercx_cfg001_s cn63xx;
 156         struct cvmx_pciercx_cfg001_s cn63xxp1;
 157 };
 158
 159 union cvmx_pciercx_cfg002 {
 160         uint32_t u32;
 161         struct cvmx_pciercx_cfg002_s {
 162                 uint32_t bcc:8;
 163                 uint32_t sc:8;
 164                 uint32_t pi:8;
 165                 uint32_t rid:8;
 166         } s;
 167         struct cvmx_pciercx_cfg002_s cn52xx;
 168         struct cvmx_pciercx_cfg002_s cn52xxp1;
 169         struct cvmx_pciercx_cfg002_s cn56xx;
 170         struct cvmx_pciercx_cfg002_s cn56xxp1;
 171         struct cvmx_pciercx_cfg002_s cn63xx;
 172         struct cvmx_pciercx_cfg002_s cn63xxp1;
 173 };
 174
 175 union cvmx_pciercx_cfg003 {
 176         uint32_t u32;
 177         struct cvmx_pciercx_cfg003_s {
 178                 uint32_t bist:8;
 179                 uint32_t mfd:1;
 180                 uint32_t chf:7;
 181                 uint32_t lt:8;
 182                 uint32_t cls:8;
 183         } s;
 184         struct cvmx_pciercx_cfg003_s cn52xx;
 185         struct cvmx_pciercx_cfg003_s cn52xxp1;
 186         struct cvmx_pciercx_cfg003_s cn56xx;
 187         struct cvmx_pciercx_cfg003_s cn56xxp1;
 188         struct cvmx_pciercx_cfg003_s cn63xx;
 189         struct cvmx_pciercx_cfg003_s cn63xxp1;
 190 };
 191
 192 union cvmx_pciercx_cfg004 {
 193         uint32_t u32;
 194         struct cvmx_pciercx_cfg004_s {
 195                 uint32_t reserved_0_31:32;
 196         } s;
 197         struct cvmx_pciercx_cfg004_s cn52xx;
 198         struct cvmx_pciercx_cfg004_s cn52xxp1;
 199         struct cvmx_pciercx_cfg004_s cn56xx;
 200         struct cvmx_pciercx_cfg004_s cn56xxp1;
 201         struct cvmx_pciercx_cfg004_s cn63xx;
 202         struct cvmx_pciercx_cfg004_s cn63xxp1;
 203 };
 204
 205 union cvmx_pciercx_cfg005 {
 206         uint32_t u32;
 207         struct cvmx_pciercx_cfg005_s {
 208                 uint32_t reserved_0_31:32;
 209         } s;
 210         struct cvmx_pciercx_cfg005_s cn52xx;
 211         struct cvmx_pciercx_cfg005_s cn52xxp1;
 212         struct cvmx_pciercx_cfg005_s cn56xx;
 213         struct cvmx_pciercx_cfg005_s cn56xxp1;
 214         struct cvmx_pciercx_cfg005_s cn63xx;
 215         struct cvmx_pciercx_cfg005_s cn63xxp1;
 216 };
 217
 218 union cvmx_pciercx_cfg006 {
 219         uint32_t u32;
 220         struct cvmx_pciercx_cfg006_s {
 221                 uint32_t slt:8;
 222                 uint32_t subbnum:8;
 223                 uint32_t sbnum:8;
 224                 uint32_t pbnum:8;
 225         } s;
 226         struct cvmx_pciercx_cfg006_s cn52xx;
 227         struct cvmx_pciercx_cfg006_s cn52xxp1;
 228         struct cvmx_pciercx_cfg006_s cn56xx;
 229         struct cvmx_pciercx_cfg006_s cn56xxp1;
 230         struct cvmx_pciercx_cfg006_s cn63xx;
 231         struct cvmx_pciercx_cfg006_s cn63xxp1;
 232 };
 233
 234 union cvmx_pciercx_cfg007 {
 235         uint32_t u32;
 236         struct cvmx_pciercx_cfg007_s {
 237                 uint32_t dpe:1;
 238                 uint32_t sse:1;
 239                 uint32_t rma:1;
 240                 uint32_t rta:1;
 241                 uint32_t sta:1;
 242                 uint32_t devt:2;
 243                 uint32_t mdpe:1;
 244                 uint32_t fbb:1;
 245                 uint32_t reserved_22_22:1;
 246                 uint32_t m66:1;
 247                 uint32_t reserved_16_20:5;
 248                 uint32_t lio_limi:4;
 249                 uint32_t reserved_9_11:3;
 250                 uint32_t io32b:1;
 251                 uint32_t lio_base:4;
 252                 uint32_t reserved_1_3:3;
 253                 uint32_t io32a:1;
 254         } s;
 255         struct cvmx_pciercx_cfg007_s cn52xx;
 256         struct cvmx_pciercx_cfg007_s cn52xxp1;
 257         struct cvmx_pciercx_cfg007_s cn56xx;
 258         struct cvmx_pciercx_cfg007_s cn56xxp1;
 259         struct cvmx_pciercx_cfg007_s cn63xx;
 260         struct cvmx_pciercx_cfg007_s cn63xxp1;
 261 };
 262
 263 union cvmx_pciercx_cfg008 {
 264         uint32_t u32;
 265         struct cvmx_pciercx_cfg008_s {
 266                 uint32_t ml_addr:12;
 267                 uint32_t reserved_16_19:4;
 268                 uint32_t mb_addr:12;
 269                 uint32_t reserved_0_3:4;
 270         } s;
 271         struct cvmx_pciercx_cfg008_s cn52xx;
 272         struct cvmx_pciercx_cfg008_s cn52xxp1;
 273         struct cvmx_pciercx_cfg008_s cn56xx;
 274         struct cvmx_pciercx_cfg008_s cn56xxp1;
 275         struct cvmx_pciercx_cfg008_s cn63xx;
 276         struct cvmx_pciercx_cfg008_s cn63xxp1;
 277 };
 278
 279 union cvmx_pciercx_cfg009 {
 280         uint32_t u32;
 281         struct cvmx_pciercx_cfg009_s {
 282                 uint32_t lmem_limit:12;
 283                 uint32_t reserved_17_19:3;
 284                 uint32_t mem64b:1;
 285                 uint32_t lmem_base:12;
 286                 uint32_t reserved_1_3:3;
 287                 uint32_t mem64a:1;
 288         } s;
 289         struct cvmx_pciercx_cfg009_s cn52xx;
 290         struct cvmx_pciercx_cfg009_s cn52xxp1;
 291         struct cvmx_pciercx_cfg009_s cn56xx;
 292         struct cvmx_pciercx_cfg009_s cn56xxp1;
 293         struct cvmx_pciercx_cfg009_s cn63xx;
 294         struct cvmx_pciercx_cfg009_s cn63xxp1;
 295 };
 296
 297 union cvmx_pciercx_cfg010 {
 298         uint32_t u32;
 299         struct cvmx_pciercx_cfg010_s {
 300                 uint32_t umem_base:32;
 301         } s;
 302         struct cvmx_pciercx_cfg010_s cn52xx;
 303         struct cvmx_pciercx_cfg010_s cn52xxp1;
 304         struct cvmx_pciercx_cfg010_s cn56xx;
 305         struct cvmx_pciercx_cfg010_s cn56xxp1;
 306         struct cvmx_pciercx_cfg010_s cn63xx;
 307         struct cvmx_pciercx_cfg010_s cn63xxp1;
 308 };
 309
 310 union cvmx_pciercx_cfg011 {
 311         uint32_t u32;
 312         struct cvmx_pciercx_cfg011_s {
 313                 uint32_t umem_limit:32;
 314         } s;
 315         struct cvmx_pciercx_cfg011_s cn52xx;
 316         struct cvmx_pciercx_cfg011_s cn52xxp1;
 317         struct cvmx_pciercx_cfg011_s cn56xx;
 318         struct cvmx_pciercx_cfg011_s cn56xxp1;
 319         struct cvmx_pciercx_cfg011_s cn63xx;
 320         struct cvmx_pciercx_cfg011_s cn63xxp1;
 321 };
 322
 323 union cvmx_pciercx_cfg012 {
 324         uint32_t u32;
 325         struct cvmx_pciercx_cfg012_s {
 326                 uint32_t uio_limit:16;
 327                 uint32_t uio_base:16;
 328         } s;
 329         struct cvmx_pciercx_cfg012_s cn52xx;
 330         struct cvmx_pciercx_cfg012_s cn52xxp1;
 331         struct cvmx_pciercx_cfg012_s cn56xx;
 332         struct cvmx_pciercx_cfg012_s cn56xxp1;
 333         struct cvmx_pciercx_cfg012_s cn63xx;
 334         struct cvmx_pciercx_cfg012_s cn63xxp1;
 335 };
 336
 337 union cvmx_pciercx_cfg013 {
 338         uint32_t u32;
 339         struct cvmx_pciercx_cfg013_s {
 340                 uint32_t reserved_8_31:24;
 341                 uint32_t cp:8;
 342         } s;
 343         struct cvmx_pciercx_cfg013_s cn52xx;
 344         struct cvmx_pciercx_cfg013_s cn52xxp1;
 345         struct cvmx_pciercx_cfg013_s cn56xx;
 346         struct cvmx_pciercx_cfg013_s cn56xxp1;
 347         struct cvmx_pciercx_cfg013_s cn63xx;
 348         struct cvmx_pciercx_cfg013_s cn63xxp1;
 349 };
 350
 351 union cvmx_pciercx_cfg014 {
 352         uint32_t u32;
 353         struct cvmx_pciercx_cfg014_s {
 354                 uint32_t reserved_0_31:32;
 355         } s;
 356         struct cvmx_pciercx_cfg014_s cn52xx;
 357         struct cvmx_pciercx_cfg014_s cn52xxp1;
 358         struct cvmx_pciercx_cfg014_s cn56xx;
 359         struct cvmx_pciercx_cfg014_s cn56xxp1;
 360         struct cvmx_pciercx_cfg014_s cn63xx;
 361         struct cvmx_pciercx_cfg014_s cn63xxp1;
 362 };
 363
 364 union cvmx_pciercx_cfg015 {
 365         uint32_t u32;
 366         struct cvmx_pciercx_cfg015_s {
 367                 uint32_t reserved_28_31:4;
 368                 uint32_t dtsees:1;
 369                 uint32_t dts:1;
 370                 uint32_t sdt:1;
 371                 uint32_t pdt:1;
 372                 uint32_t fbbe:1;
 373                 uint32_t sbrst:1;
 374                 uint32_t mam:1;
 375                 uint32_t vga16d:1;
 376                 uint32_t vgae:1;
 377                 uint32_t isae:1;
 378                 uint32_t see:1;
 379                 uint32_t pere:1;
 380                 uint32_t inta:8;
 381                 uint32_t il:8;
 382         } s;
 383         struct cvmx_pciercx_cfg015_s cn52xx;
 384         struct cvmx_pciercx_cfg015_s cn52xxp1;
 385         struct cvmx_pciercx_cfg015_s cn56xx;
 386         struct cvmx_pciercx_cfg015_s cn56xxp1;
 387         struct cvmx_pciercx_cfg015_s cn63xx;
 388         struct cvmx_pciercx_cfg015_s cn63xxp1;
 389 };
 390
 391 union cvmx_pciercx_cfg016 {
 392         uint32_t u32;
 393         struct cvmx_pciercx_cfg016_s {
 394                 uint32_t pmes:5;
 395                 uint32_t d2s:1;
 396                 uint32_t d1s:1;
 397                 uint32_t auxc:3;
 398                 uint32_t dsi:1;
 399                 uint32_t reserved_20_20:1;
 400                 uint32_t pme_clock:1;
 401                 uint32_t pmsv:3;
 402                 uint32_t ncp:8;
 403                 uint32_t pmcid:8;
 404         } s;
 405         struct cvmx_pciercx_cfg016_s cn52xx;
 406         struct cvmx_pciercx_cfg016_s cn52xxp1;
 407         struct cvmx_pciercx_cfg016_s cn56xx;
 408         struct cvmx_pciercx_cfg016_s cn56xxp1;
 409         struct cvmx_pciercx_cfg016_s cn63xx;
 410         struct cvmx_pciercx_cfg016_s cn63xxp1;
 411 };
 412
 413 union cvmx_pciercx_cfg017 {
 414         uint32_t u32;
 415         struct cvmx_pciercx_cfg017_s {
 416                 uint32_t pmdia:8;
 417                 uint32_t bpccee:1;
 418                 uint32_t bd3h:1;
 419                 uint32_t reserved_16_21:6;
 420                 uint32_t pmess:1;
 421                 uint32_t pmedsia:2;
 422                 uint32_t pmds:4;
 423                 uint32_t pmeens:1;
 424                 uint32_t reserved_4_7:4;
 425                 uint32_t nsr:1;
 426                 uint32_t reserved_2_2:1;
 427                 uint32_t ps:2;
 428         } s;
 429         struct cvmx_pciercx_cfg017_s cn52xx;
 430         struct cvmx_pciercx_cfg017_s cn52xxp1;
 431         struct cvmx_pciercx_cfg017_s cn56xx;
 432         struct cvmx_pciercx_cfg017_s cn56xxp1;
 433         struct cvmx_pciercx_cfg017_s cn63xx;
 434         struct cvmx_pciercx_cfg017_s cn63xxp1;
 435 };
 436
 437 union cvmx_pciercx_cfg020 {
 438         uint32_t u32;
 439         struct cvmx_pciercx_cfg020_s {
 440                 uint32_t reserved_24_31:8;
 441                 uint32_t m64:1;
 442                 uint32_t mme:3;
 443                 uint32_t mmc:3;
 444                 uint32_t msien:1;
 445                 uint32_t ncp:8;
 446                 uint32_t msicid:8;
 447         } s;
 448         struct cvmx_pciercx_cfg020_s cn52xx;
 449         struct cvmx_pciercx_cfg020_s cn52xxp1;
 450         struct cvmx_pciercx_cfg020_s cn56xx;
 451         struct cvmx_pciercx_cfg020_s cn56xxp1;
 452         struct cvmx_pciercx_cfg020_s cn63xx;
 453         struct cvmx_pciercx_cfg020_s cn63xxp1;
 454 };
 455
 456 union cvmx_pciercx_cfg021 {
 457         uint32_t u32;
 458         struct cvmx_pciercx_cfg021_s {
 459                 uint32_t lmsi:30;
 460                 uint32_t reserved_0_1:2;
 461         } s;
 462         struct cvmx_pciercx_cfg021_s cn52xx;
 463         struct cvmx_pciercx_cfg021_s cn52xxp1;
 464         struct cvmx_pciercx_cfg021_s cn56xx;
 465         struct cvmx_pciercx_cfg021_s cn56xxp1;
 466         struct cvmx_pciercx_cfg021_s cn63xx;
 467         struct cvmx_pciercx_cfg021_s cn63xxp1;
 468 };
 469
 470 union cvmx_pciercx_cfg022 {
 471         uint32_t u32;
 472         struct cvmx_pciercx_cfg022_s {
 473                 uint32_t umsi:32;
 474         } s;
 475         struct cvmx_pciercx_cfg022_s cn52xx;
 476         struct cvmx_pciercx_cfg022_s cn52xxp1;
 477         struct cvmx_pciercx_cfg022_s cn56xx;
 478         struct cvmx_pciercx_cfg022_s cn56xxp1;
 479         struct cvmx_pciercx_cfg022_s cn63xx;
 480         struct cvmx_pciercx_cfg022_s cn63xxp1;
 481 };
 482
 483 union cvmx_pciercx_cfg023 {
 484         uint32_t u32;
 485         struct cvmx_pciercx_cfg023_s {
 486                 uint32_t reserved_16_31:16;
 487                 uint32_t msimd:16;
 488         } s;
 489         struct cvmx_pciercx_cfg023_s cn52xx;
 490         struct cvmx_pciercx_cfg023_s cn52xxp1;
 491         struct cvmx_pciercx_cfg023_s cn56xx;
 492         struct cvmx_pciercx_cfg023_s cn56xxp1;
 493         struct cvmx_pciercx_cfg023_s cn63xx;
 494         struct cvmx_pciercx_cfg023_s cn63xxp1;
 495 };
 496
 497 union cvmx_pciercx_cfg028 {
 498         uint32_t u32;
 499         struct cvmx_pciercx_cfg028_s {
 500                 uint32_t reserved_30_31:2;
 501                 uint32_t imn:5;
 502                 uint32_t si:1;
 503                 uint32_t dpt:4;
 504                 uint32_t pciecv:4;
 505                 uint32_t ncp:8;
 506                 uint32_t pcieid:8;
 507         } s;
 508         struct cvmx_pciercx_cfg028_s cn52xx;
 509         struct cvmx_pciercx_cfg028_s cn52xxp1;
 510         struct cvmx_pciercx_cfg028_s cn56xx;
 511         struct cvmx_pciercx_cfg028_s cn56xxp1;
 512         struct cvmx_pciercx_cfg028_s cn63xx;
 513         struct cvmx_pciercx_cfg028_s cn63xxp1;
 514 };
 515
 516 union cvmx_pciercx_cfg029 {
 517         uint32_t u32;
 518         struct cvmx_pciercx_cfg029_s {
 519                 uint32_t reserved_28_31:4;
 520                 uint32_t cspls:2;
 521                 uint32_t csplv:8;
 522                 uint32_t reserved_16_17:2;
 523                 uint32_t rber:1;
 524                 uint32_t reserved_12_14:3;
 525                 uint32_t el1al:3;
 526                 uint32_t el0al:3;
 527                 uint32_t etfs:1;
 528                 uint32_t pfs:2;
 529                 uint32_t mpss:3;
 530         } s;
 531         struct cvmx_pciercx_cfg029_s cn52xx;
 532         struct cvmx_pciercx_cfg029_s cn52xxp1;
 533         struct cvmx_pciercx_cfg029_s cn56xx;
 534         struct cvmx_pciercx_cfg029_s cn56xxp1;
 535         struct cvmx_pciercx_cfg029_s cn63xx;
 536         struct cvmx_pciercx_cfg029_s cn63xxp1;
 537 };
 538
 539 union cvmx_pciercx_cfg030 {
 540         uint32_t u32;
 541         struct cvmx_pciercx_cfg030_s {
 542                 uint32_t reserved_22_31:10;
 543                 uint32_t tp:1;
 544                 uint32_t ap_d:1;
 545                 uint32_t ur_d:1;
 546                 uint32_t fe_d:1;
 547                 uint32_t nfe_d:1;
 548                 uint32_t ce_d:1;
 549                 uint32_t reserved_15_15:1;
 550                 uint32_t mrrs:3;
 551                 uint32_t ns_en:1;
 552                 uint32_t ap_en:1;
 553                 uint32_t pf_en:1;
 554                 uint32_t etf_en:1;
 555                 uint32_t mps:3;
 556                 uint32_t ro_en:1;
 557                 uint32_t ur_en:1;
 558                 uint32_t fe_en:1;
 559                 uint32_t nfe_en:1;
 560                 uint32_t ce_en:1;
 561         } s;
 562         struct cvmx_pciercx_cfg030_s cn52xx;
 563         struct cvmx_pciercx_cfg030_s cn52xxp1;
 564         struct cvmx_pciercx_cfg030_s cn56xx;
 565         struct cvmx_pciercx_cfg030_s cn56xxp1;
 566         struct cvmx_pciercx_cfg030_s cn63xx;
 567         struct cvmx_pciercx_cfg030_s cn63xxp1;
 568 };
 569
 570 union cvmx_pciercx_cfg031 {
 571         uint32_t u32;
 572         struct cvmx_pciercx_cfg031_s {
 573                 uint32_t pnum:8;
 574                 uint32_t reserved_22_23:2;
 575                 uint32_t lbnc:1;
 576                 uint32_t dllarc:1;
 577                 uint32_t sderc:1;
 578                 uint32_t cpm:1;
 579                 uint32_t l1el:3;
 580                 uint32_t l0el:3;
 581                 uint32_t aslpms:2;
 582                 uint32_t mlw:6;
 583                 uint32_t mls:4;
 584         } s;
 585         struct cvmx_pciercx_cfg031_s cn52xx;
 586         struct cvmx_pciercx_cfg031_s cn52xxp1;
 587         struct cvmx_pciercx_cfg031_s cn56xx;
 588         struct cvmx_pciercx_cfg031_s cn56xxp1;
 589         struct cvmx_pciercx_cfg031_s cn63xx;
 590         struct cvmx_pciercx_cfg031_s cn63xxp1;
 591 };
 592
 593 union cvmx_pciercx_cfg032 {
 594         uint32_t u32;
 595         struct cvmx_pciercx_cfg032_s {
 596                 uint32_t lab:1;
 597                 uint32_t lbm:1;
 598                 uint32_t dlla:1;
 599                 uint32_t scc:1;
 600                 uint32_t lt:1;
 601                 uint32_t reserved_26_26:1;
 602                 uint32_t nlw:6;
 603                 uint32_t ls:4;
 604                 uint32_t reserved_12_15:4;
 605                 uint32_t lab_int_enb:1;
 606                 uint32_t lbm_int_enb:1;
 607                 uint32_t hawd:1;
 608                 uint32_t ecpm:1;
 609                 uint32_t es:1;
 610                 uint32_t ccc:1;
 611                 uint32_t rl:1;
 612                 uint32_t ld:1;
 613                 uint32_t rcb:1;
 614                 uint32_t reserved_2_2:1;
 615                 uint32_t aslpc:2;
 616         } s;
 617         struct cvmx_pciercx_cfg032_s cn52xx;
 618         struct cvmx_pciercx_cfg032_s cn52xxp1;
 619         struct cvmx_pciercx_cfg032_s cn56xx;
 620         struct cvmx_pciercx_cfg032_s cn56xxp1;
 621         struct cvmx_pciercx_cfg032_s cn63xx;
 622         struct cvmx_pciercx_cfg032_s cn63xxp1;
 623 };
 624
 625 union cvmx_pciercx_cfg033 {
 626         uint32_t u32;
 627         struct cvmx_pciercx_cfg033_s {
 628                 uint32_t ps_num:13;
 629                 uint32_t nccs:1;
 630                 uint32_t emip:1;
 631                 uint32_t sp_ls:2;
 632                 uint32_t sp_lv:8;
 633                 uint32_t hp_c:1;
 634                 uint32_t hp_s:1;
 635                 uint32_t pip:1;
 636                 uint32_t aip:1;
 637                 uint32_t mrlsp:1;
 638                 uint32_t pcp:1;
 639                 uint32_t abp:1;
 640         } s;
 641         struct cvmx_pciercx_cfg033_s cn52xx;
 642         struct cvmx_pciercx_cfg033_s cn52xxp1;
 643         struct cvmx_pciercx_cfg033_s cn56xx;
 644         struct cvmx_pciercx_cfg033_s cn56xxp1;
 645         struct cvmx_pciercx_cfg033_s cn63xx;
 646         struct cvmx_pciercx_cfg033_s cn63xxp1;
 647 };
 648
 649 union cvmx_pciercx_cfg034 {
 650         uint32_t u32;
 651         struct cvmx_pciercx_cfg034_s {
 652                 uint32_t reserved_25_31:7;
 653                 uint32_t dlls_c:1;
 654                 uint32_t emis:1;
 655                 uint32_t pds:1;
 656                 uint32_t mrlss:1;
 657                 uint32_t ccint_d:1;
 658                 uint32_t pd_c:1;
 659                 uint32_t mrls_c:1;
 660                 uint32_t pf_d:1;
 661                 uint32_t abp_d:1;
 662                 uint32_t reserved_13_15:3;
 663                 uint32_t dlls_en:1;
 664                 uint32_t emic:1;
 665                 uint32_t pcc:1;
 666                 uint32_t pic:2;
 667                 uint32_t aic:2;
 668                 uint32_t hpint_en:1;
 669                 uint32_t ccint_en:1;
 670                 uint32_t pd_en:1;
 671                 uint32_t mrls_en:1;
 672                 uint32_t pf_en:1;
 673                 uint32_t abp_en:1;
 674         } s;
 675         struct cvmx_pciercx_cfg034_s cn52xx;
 676         struct cvmx_pciercx_cfg034_s cn52xxp1;
 677         struct cvmx_pciercx_cfg034_s cn56xx;
 678         struct cvmx_pciercx_cfg034_s cn56xxp1;
 679         struct cvmx_pciercx_cfg034_s cn63xx;
 680         struct cvmx_pciercx_cfg034_s cn63xxp1;
 681 };
 682
 683 union cvmx_pciercx_cfg035 {
 684         uint32_t u32;
 685         struct cvmx_pciercx_cfg035_s {
 686                 uint32_t reserved_17_31:15;
 687                 uint32_t crssv:1;
 688                 uint32_t reserved_5_15:11;
 689                 uint32_t crssve:1;
 690                 uint32_t pmeie:1;
 691                 uint32_t sefee:1;
 692                 uint32_t senfee:1;
 693                 uint32_t secee:1;
 694         } s;
 695         struct cvmx_pciercx_cfg035_s cn52xx;
 696         struct cvmx_pciercx_cfg035_s cn52xxp1;
 697         struct cvmx_pciercx_cfg035_s cn56xx;
 698         struct cvmx_pciercx_cfg035_s cn56xxp1;
 699         struct cvmx_pciercx_cfg035_s cn63xx;
 700         struct cvmx_pciercx_cfg035_s cn63xxp1;
 701 };
 702
 703 union cvmx_pciercx_cfg036 {
 704         uint32_t u32;
 705         struct cvmx_pciercx_cfg036_s {
 706                 uint32_t reserved_18_31:14;
 707                 uint32_t pme_pend:1;
 708                 uint32_t pme_stat:1;
 709                 uint32_t pme_rid:16;
 710         } s;
 711         struct cvmx_pciercx_cfg036_s cn52xx;
 712         struct cvmx_pciercx_cfg036_s cn52xxp1;
 713         struct cvmx_pciercx_cfg036_s cn56xx;
 714         struct cvmx_pciercx_cfg036_s cn56xxp1;
 715         struct cvmx_pciercx_cfg036_s cn63xx;
 716         struct cvmx_pciercx_cfg036_s cn63xxp1;
 717 };
 718
 719 union cvmx_pciercx_cfg037 {
 720         uint32_t u32;
 721         struct cvmx_pciercx_cfg037_s {
 722                 uint32_t reserved_5_31:27;
 723                 uint32_t ctds:1;
 724                 uint32_t ctrs:4;
 725         } s;
 726         struct cvmx_pciercx_cfg037_s cn52xx;
 727         struct cvmx_pciercx_cfg037_s cn52xxp1;
 728         struct cvmx_pciercx_cfg037_s cn56xx;
 729         struct cvmx_pciercx_cfg037_s cn56xxp1;
 730         struct cvmx_pciercx_cfg037_s cn63xx;
 731         struct cvmx_pciercx_cfg037_s cn63xxp1;
 732 };
 733
 734 union cvmx_pciercx_cfg038 {
 735         uint32_t u32;
 736         struct cvmx_pciercx_cfg038_s {
 737                 uint32_t reserved_5_31:27;
 738                 uint32_t ctd:1;
 739                 uint32_t ctv:4;
 740         } s;
 741         struct cvmx_pciercx_cfg038_s cn52xx;
 742         struct cvmx_pciercx_cfg038_s cn52xxp1;
 743         struct cvmx_pciercx_cfg038_s cn56xx;
 744         struct cvmx_pciercx_cfg038_s cn56xxp1;
 745         struct cvmx_pciercx_cfg038_s cn63xx;
 746         struct cvmx_pciercx_cfg038_s cn63xxp1;
 747 };
 748
 749 union cvmx_pciercx_cfg039 {
 750         uint32_t u32;
 751         struct cvmx_pciercx_cfg039_s {
 752                 uint32_t reserved_9_31:23;
 753                 uint32_t cls:1;
 754                 uint32_t slsv:7;
 755                 uint32_t reserved_0_0:1;
 756         } s;
 757         struct cvmx_pciercx_cfg039_cn52xx {
 758                 uint32_t reserved_0_31:32;
 759         } cn52xx;
 760         struct cvmx_pciercx_cfg039_cn52xx cn52xxp1;
 761         struct cvmx_pciercx_cfg039_cn52xx cn56xx;
 762         struct cvmx_pciercx_cfg039_cn52xx cn56xxp1;
 763         struct cvmx_pciercx_cfg039_s cn63xx;
 764         struct cvmx_pciercx_cfg039_cn52xx cn63xxp1;
 765 };
 766
 767 union cvmx_pciercx_cfg040 {
 768         uint32_t u32;
 769         struct cvmx_pciercx_cfg040_s {
 770                 uint32_t reserved_17_31:15;
 771                 uint32_t cdl:1;
 772                 uint32_t reserved_13_15:3;
 773                 uint32_t cde:1;
 774                 uint32_t csos:1;
 775                 uint32_t emc:1;
 776                 uint32_t tm:3;
 777                 uint32_t sde:1;
 778                 uint32_t hasd:1;
 779                 uint32_t ec:1;
 780                 uint32_t tls:4;
 781         } s;
 782         struct cvmx_pciercx_cfg040_cn52xx {
 783                 uint32_t reserved_0_31:32;
 784         } cn52xx;
 785         struct cvmx_pciercx_cfg040_cn52xx cn52xxp1;
 786         struct cvmx_pciercx_cfg040_cn52xx cn56xx;
 787         struct cvmx_pciercx_cfg040_cn52xx cn56xxp1;
 788         struct cvmx_pciercx_cfg040_s cn63xx;
 789         struct cvmx_pciercx_cfg040_s cn63xxp1;
 790 };
 791
 792 union cvmx_pciercx_cfg041 {
 793         uint32_t u32;
 794         struct cvmx_pciercx_cfg041_s {
 795                 uint32_t reserved_0_31:32;
 796         } s;
 797         struct cvmx_pciercx_cfg041_s cn52xx;
 798         struct cvmx_pciercx_cfg041_s cn52xxp1;
 799         struct cvmx_pciercx_cfg041_s cn56xx;
 800         struct cvmx_pciercx_cfg041_s cn56xxp1;
 801         struct cvmx_pciercx_cfg041_s cn63xx;
 802         struct cvmx_pciercx_cfg041_s cn63xxp1;
 803 };
 804
 805 union cvmx_pciercx_cfg042 {
 806         uint32_t u32;
 807         struct cvmx_pciercx_cfg042_s {
 808                 uint32_t reserved_0_31:32;
 809         } s;
 810         struct cvmx_pciercx_cfg042_s cn52xx;
 811         struct cvmx_pciercx_cfg042_s cn52xxp1;
 812         struct cvmx_pciercx_cfg042_s cn56xx;
 813         struct cvmx_pciercx_cfg042_s cn56xxp1;
 814         struct cvmx_pciercx_cfg042_s cn63xx;
 815         struct cvmx_pciercx_cfg042_s cn63xxp1;
 816 };
 817
 818 union cvmx_pciercx_cfg064 {
 819         uint32_t u32;
 820         struct cvmx_pciercx_cfg064_s {
 821                 uint32_t nco:12;
 822                 uint32_t cv:4;
 823                 uint32_t pcieec:16;
 824         } s;
 825         struct cvmx_pciercx_cfg064_s cn52xx;
 826         struct cvmx_pciercx_cfg064_s cn52xxp1;
 827         struct cvmx_pciercx_cfg064_s cn56xx;
 828         struct cvmx_pciercx_cfg064_s cn56xxp1;
 829         struct cvmx_pciercx_cfg064_s cn63xx;
 830         struct cvmx_pciercx_cfg064_s cn63xxp1;
 831 };
 832
 833 union cvmx_pciercx_cfg065 {
 834         uint32_t u32;
 835         struct cvmx_pciercx_cfg065_s {
 836                 uint32_t reserved_21_31:11;
 837                 uint32_t ures:1;
 838                 uint32_t ecrces:1;
 839                 uint32_t mtlps:1;
 840                 uint32_t ros:1;
 841                 uint32_t ucs:1;
 842                 uint32_t cas:1;
 843                 uint32_t cts:1;
 844                 uint32_t fcpes:1;
 845                 uint32_t ptlps:1;
 846                 uint32_t reserved_6_11:6;
 847                 uint32_t sdes:1;
 848                 uint32_t dlpes:1;
 849                 uint32_t reserved_0_3:4;
 850         } s;
 851         struct cvmx_pciercx_cfg065_s cn52xx;
 852         struct cvmx_pciercx_cfg065_s cn52xxp1;
 853         struct cvmx_pciercx_cfg065_s cn56xx;
 854         struct cvmx_pciercx_cfg065_s cn56xxp1;
 855         struct cvmx_pciercx_cfg065_s cn63xx;
 856         struct cvmx_pciercx_cfg065_s cn63xxp1;
 857 };
 858
 859 union cvmx_pciercx_cfg066 {
 860         uint32_t u32;
 861         struct cvmx_pciercx_cfg066_s {
 862                 uint32_t reserved_21_31:11;
 863                 uint32_t urem:1;
 864                 uint32_t ecrcem:1;
 865                 uint32_t mtlpm:1;
 866                 uint32_t rom:1;
 867                 uint32_t ucm:1;
 868                 uint32_t cam:1;
 869                 uint32_t ctm:1;
 870                 uint32_t fcpem:1;
 871                 uint32_t ptlpm:1;
 872                 uint32_t reserved_6_11:6;
 873                 uint32_t sdem:1;
 874                 uint32_t dlpem:1;
 875                 uint32_t reserved_0_3:4;
 876         } s;
 877         struct cvmx_pciercx_cfg066_s cn52xx;
 878         struct cvmx_pciercx_cfg066_s cn52xxp1;
 879         struct cvmx_pciercx_cfg066_s cn56xx;
 880         struct cvmx_pciercx_cfg066_s cn56xxp1;
 881         struct cvmx_pciercx_cfg066_s cn63xx;
 882         struct cvmx_pciercx_cfg066_s cn63xxp1;
 883 };
 884
 885 union cvmx_pciercx_cfg067 {
 886         uint32_t u32;
 887         struct cvmx_pciercx_cfg067_s {
 888                 uint32_t reserved_21_31:11;
 889                 uint32_t ures:1;
 890                 uint32_t ecrces:1;
 891                 uint32_t mtlps:1;
 892                 uint32_t ros:1;
 893                 uint32_t ucs:1;
 894                 uint32_t cas:1;
 895                 uint32_t cts:1;
 896                 uint32_t fcpes:1;
 897                 uint32_t ptlps:1;
 898                 uint32_t reserved_6_11:6;
 899                 uint32_t sdes:1;
 900                 uint32_t dlpes:1;
 901                 uint32_t reserved_0_3:4;
 902         } s;
 903         struct cvmx_pciercx_cfg067_s cn52xx;
 904         struct cvmx_pciercx_cfg067_s cn52xxp1;
 905         struct cvmx_pciercx_cfg067_s cn56xx;
 906         struct cvmx_pciercx_cfg067_s cn56xxp1;
 907         struct cvmx_pciercx_cfg067_s cn63xx;
 908         struct cvmx_pciercx_cfg067_s cn63xxp1;
 909 };
 910
 911 union cvmx_pciercx_cfg068 {
 912         uint32_t u32;
 913         struct cvmx_pciercx_cfg068_s {
 914                 uint32_t reserved_14_31:18;
 915                 uint32_t anfes:1;
 916                 uint32_t rtts:1;
 917                 uint32_t reserved_9_11:3;
 918                 uint32_t rnrs:1;
 919                 uint32_t bdllps:1;
 920                 uint32_t btlps:1;
 921                 uint32_t reserved_1_5:5;
 922                 uint32_t res:1;
 923         } s;
 924         struct cvmx_pciercx_cfg068_s cn52xx;
 925         struct cvmx_pciercx_cfg068_s cn52xxp1;
 926         struct cvmx_pciercx_cfg068_s cn56xx;
 927         struct cvmx_pciercx_cfg068_s cn56xxp1;
 928         struct cvmx_pciercx_cfg068_s cn63xx;
 929         struct cvmx_pciercx_cfg068_s cn63xxp1;
 930 };
 931
 932 union cvmx_pciercx_cfg069 {
 933         uint32_t u32;
 934         struct cvmx_pciercx_cfg069_s {
 935                 uint32_t reserved_14_31:18;
 936                 uint32_t anfem:1;
 937                 uint32_t rttm:1;
 938                 uint32_t reserved_9_11:3;
 939                 uint32_t rnrm:1;
 940                 uint32_t bdllpm:1;
 941                 uint32_t btlpm:1;
 942                 uint32_t reserved_1_5:5;
 943                 uint32_t rem:1;
 944         } s;
 945         struct cvmx_pciercx_cfg069_s cn52xx;
 946         struct cvmx_pciercx_cfg069_s cn52xxp1;
 947         struct cvmx_pciercx_cfg069_s cn56xx;
 948         struct cvmx_pciercx_cfg069_s cn56xxp1;
 949         struct cvmx_pciercx_cfg069_s cn63xx;
 950         struct cvmx_pciercx_cfg069_s cn63xxp1;
 951 };
 952
 953 union cvmx_pciercx_cfg070 {
 954         uint32_t u32;
 955         struct cvmx_pciercx_cfg070_s {
 956                 uint32_t reserved_9_31:23;
 957                 uint32_t ce:1;
 958                 uint32_t cc:1;
 959                 uint32_t ge:1;
 960                 uint32_t gc:1;
 961                 uint32_t fep:5;
 962         } s;
 963         struct cvmx_pciercx_cfg070_s cn52xx;
 964         struct cvmx_pciercx_cfg070_s cn52xxp1;
 965         struct cvmx_pciercx_cfg070_s cn56xx;
 966         struct cvmx_pciercx_cfg070_s cn56xxp1;
 967         struct cvmx_pciercx_cfg070_s cn63xx;
 968         struct cvmx_pciercx_cfg070_s cn63xxp1;
 969 };
 970
 971 union cvmx_pciercx_cfg071 {
 972         uint32_t u32;
 973         struct cvmx_pciercx_cfg071_s {
 974                 uint32_t dword1:32;
 975         } s;
 976         struct cvmx_pciercx_cfg071_s cn52xx;
 977         struct cvmx_pciercx_cfg071_s cn52xxp1;
 978         struct cvmx_pciercx_cfg071_s cn56xx;
 979         struct cvmx_pciercx_cfg071_s cn56xxp1;
 980         struct cvmx_pciercx_cfg071_s cn63xx;
 981         struct cvmx_pciercx_cfg071_s cn63xxp1;
 982 };
 983
 984 union cvmx_pciercx_cfg072 {
 985         uint32_t u32;
 986         struct cvmx_pciercx_cfg072_s {
 987                 uint32_t dword2:32;
 988         } s;
 989         struct cvmx_pciercx_cfg072_s cn52xx;
 990         struct cvmx_pciercx_cfg072_s cn52xxp1;
 991         struct cvmx_pciercx_cfg072_s cn56xx;
 992         struct cvmx_pciercx_cfg072_s cn56xxp1;
 993         struct cvmx_pciercx_cfg072_s cn63xx;
 994         struct cvmx_pciercx_cfg072_s cn63xxp1;
 995 };
 996
 997 union cvmx_pciercx_cfg073 {
 998         uint32_t u32;
 999         struct cvmx_pciercx_cfg073_s {
1000                 uint32_t dword3:32;
1001         } s;
1002         struct cvmx_pciercx_cfg073_s cn52xx;
1003         struct cvmx_pciercx_cfg073_s cn52xxp1;
1004         struct cvmx_pciercx_cfg073_s cn56xx;
1005         struct cvmx_pciercx_cfg073_s cn56xxp1;
1006         struct cvmx_pciercx_cfg073_s cn63xx;
1007         struct cvmx_pciercx_cfg073_s cn63xxp1;
1008 };
1009
1010 union cvmx_pciercx_cfg074 {
1011         uint32_t u32;
1012         struct cvmx_pciercx_cfg074_s {
1013                 uint32_t dword4:32;
1014         } s;
1015         struct cvmx_pciercx_cfg074_s cn52xx;
1016         struct cvmx_pciercx_cfg074_s cn52xxp1;
1017         struct cvmx_pciercx_cfg074_s cn56xx;
1018         struct cvmx_pciercx_cfg074_s cn56xxp1;
1019         struct cvmx_pciercx_cfg074_s cn63xx;
1020         struct cvmx_pciercx_cfg074_s cn63xxp1;
1021 };
1022
1023 union cvmx_pciercx_cfg075 {
1024         uint32_t u32;
1025         struct cvmx_pciercx_cfg075_s {
1026                 uint32_t reserved_3_31:29;
1027                 uint32_t fere:1;
1028                 uint32_t nfere:1;
1029                 uint32_t cere:1;
1030         } s;
1031         struct cvmx_pciercx_cfg075_s cn52xx;
1032         struct cvmx_pciercx_cfg075_s cn52xxp1;
1033         struct cvmx_pciercx_cfg075_s cn56xx;
1034         struct cvmx_pciercx_cfg075_s cn56xxp1;
1035         struct cvmx_pciercx_cfg075_s cn63xx;
1036         struct cvmx_pciercx_cfg075_s cn63xxp1;
1037 };
1038
1039 union cvmx_pciercx_cfg076 {
1040         uint32_t u32;
1041         struct cvmx_pciercx_cfg076_s {
1042                 uint32_t aeimn:5;
1043                 uint32_t reserved_7_26:20;
1044                 uint32_t femr:1;
1045                 uint32_t nfemr:1;
1046                 uint32_t fuf:1;
1047                 uint32_t multi_efnfr:1;
1048                 uint32_t efnfr:1;
1049                 uint32_t multi_ecr:1;
1050                 uint32_t ecr:1;
1051         } s;
1052         struct cvmx_pciercx_cfg076_s cn52xx;
1053         struct cvmx_pciercx_cfg076_s cn52xxp1;
1054         struct cvmx_pciercx_cfg076_s cn56xx;
1055         struct cvmx_pciercx_cfg076_s cn56xxp1;
1056         struct cvmx_pciercx_cfg076_s cn63xx;
1057         struct cvmx_pciercx_cfg076_s cn63xxp1;
1058 };
1059
1060 union cvmx_pciercx_cfg077 {
1061         uint32_t u32;
1062         struct cvmx_pciercx_cfg077_s {
1063                 uint32_t efnfsi:16;
1064                 uint32_t ecsi:16;
1065         } s;
1066         struct cvmx_pciercx_cfg077_s cn52xx;
1067         struct cvmx_pciercx_cfg077_s cn52xxp1;
1068         struct cvmx_pciercx_cfg077_s cn56xx;
1069         struct cvmx_pciercx_cfg077_s cn56xxp1;
1070         struct cvmx_pciercx_cfg077_s cn63xx;
1071         struct cvmx_pciercx_cfg077_s cn63xxp1;
1072 };
1073
1074 union cvmx_pciercx_cfg448 {
1075         uint32_t u32;
1076         struct cvmx_pciercx_cfg448_s {
1077                 uint32_t rtl:16;
1078                 uint32_t rtltl:16;
1079         } s;
1080         struct cvmx_pciercx_cfg448_s cn52xx;
1081         struct cvmx_pciercx_cfg448_s cn52xxp1;
1082         struct cvmx_pciercx_cfg448_s cn56xx;
1083         struct cvmx_pciercx_cfg448_s cn56xxp1;
1084         struct cvmx_pciercx_cfg448_s cn63xx;
1085         struct cvmx_pciercx_cfg448_s cn63xxp1;
1086 };
1087
1088 union cvmx_pciercx_cfg449 {
1089         uint32_t u32;
1090         struct cvmx_pciercx_cfg449_s {
1091                 uint32_t omr:32;
1092         } s;
1093         struct cvmx_pciercx_cfg449_s cn52xx;
1094         struct cvmx_pciercx_cfg449_s cn52xxp1;
1095         struct cvmx_pciercx_cfg449_s cn56xx;
1096         struct cvmx_pciercx_cfg449_s cn56xxp1;
1097         struct cvmx_pciercx_cfg449_s cn63xx;
1098         struct cvmx_pciercx_cfg449_s cn63xxp1;
1099 };
1100
1101 union cvmx_pciercx_cfg450 {
1102         uint32_t u32;
1103         struct cvmx_pciercx_cfg450_s {
1104                 uint32_t lpec:8;
1105                 uint32_t reserved_22_23:2;
1106                 uint32_t link_state:6;
1107                 uint32_t force_link:1;
1108                 uint32_t reserved_8_14:7;
1109                 uint32_t link_num:8;
1110         } s;
1111         struct cvmx_pciercx_cfg450_s cn52xx;
1112         struct cvmx_pciercx_cfg450_s cn52xxp1;
1113         struct cvmx_pciercx_cfg450_s cn56xx;
1114         struct cvmx_pciercx_cfg450_s cn56xxp1;
1115         struct cvmx_pciercx_cfg450_s cn63xx;
1116         struct cvmx_pciercx_cfg450_s cn63xxp1;
1117 };
1118
1119 union cvmx_pciercx_cfg451 {
1120         uint32_t u32;
1121         struct cvmx_pciercx_cfg451_s {
1122                 uint32_t reserved_30_31:2;
1123                 uint32_t l1el:3;
1124                 uint32_t l0el:3;
1125                 uint32_t n_fts_cc:8;
1126                 uint32_t n_fts:8;
1127                 uint32_t ack_freq:8;
1128         } s;
1129         struct cvmx_pciercx_cfg451_s cn52xx;
1130         struct cvmx_pciercx_cfg451_s cn52xxp1;
1131         struct cvmx_pciercx_cfg451_s cn56xx;
1132         struct cvmx_pciercx_cfg451_s cn56xxp1;
1133         struct cvmx_pciercx_cfg451_s cn63xx;
1134         struct cvmx_pciercx_cfg451_s cn63xxp1;
1135 };
1136
1137 union cvmx_pciercx_cfg452 {
1138         uint32_t u32;
1139         struct cvmx_pciercx_cfg452_s {
1140                 uint32_t reserved_26_31:6;
1141                 uint32_t eccrc:1;
1142                 uint32_t reserved_22_24:3;
1143                 uint32_t lme:6;
1144                 uint32_t reserved_8_15:8;
1145                 uint32_t flm:1;
1146                 uint32_t reserved_6_6:1;
1147                 uint32_t dllle:1;
1148                 uint32_t reserved_4_4:1;
1149                 uint32_t ra:1;
1150                 uint32_t le:1;
1151                 uint32_t sd:1;
1152                 uint32_t omr:1;
1153         } s;
1154         struct cvmx_pciercx_cfg452_s cn52xx;
1155         struct cvmx_pciercx_cfg452_s cn52xxp1;
1156         struct cvmx_pciercx_cfg452_s cn56xx;
1157         struct cvmx_pciercx_cfg452_s cn56xxp1;
1158         struct cvmx_pciercx_cfg452_s cn63xx;
1159         struct cvmx_pciercx_cfg452_s cn63xxp1;
1160 };
1161
1162 union cvmx_pciercx_cfg453 {
1163         uint32_t u32;
1164         struct cvmx_pciercx_cfg453_s {
1165                 uint32_t dlld:1;
1166                 uint32_t reserved_26_30:5;
1167                 uint32_t ack_nak:1;
1168                 uint32_t fcd:1;
1169                 uint32_t ilst:24;
1170         } s;
1171         struct cvmx_pciercx_cfg453_s cn52xx;
1172         struct cvmx_pciercx_cfg453_s cn52xxp1;
1173         struct cvmx_pciercx_cfg453_s cn56xx;
1174         struct cvmx_pciercx_cfg453_s cn56xxp1;
1175         struct cvmx_pciercx_cfg453_s cn63xx;
1176         struct cvmx_pciercx_cfg453_s cn63xxp1;
1177 };
1178
1179 union cvmx_pciercx_cfg454 {
1180         uint32_t u32;
1181         struct cvmx_pciercx_cfg454_s {
1182                 uint32_t reserved_29_31:3;
1183                 uint32_t tmfcwt:5;
1184                 uint32_t tmanlt:5;
1185                 uint32_t tmrt:5;
1186                 uint32_t reserved_11_13:3;
1187                 uint32_t nskps:3;
1188                 uint32_t reserved_4_7:4;
1189                 uint32_t ntss:4;
1190         } s;
1191         struct cvmx_pciercx_cfg454_s cn52xx;
1192         struct cvmx_pciercx_cfg454_s cn52xxp1;
1193         struct cvmx_pciercx_cfg454_s cn56xx;
1194         struct cvmx_pciercx_cfg454_s cn56xxp1;
1195         struct cvmx_pciercx_cfg454_s cn63xx;
1196         struct cvmx_pciercx_cfg454_s cn63xxp1;
1197 };
1198
1199 union cvmx_pciercx_cfg455 {
1200         uint32_t u32;
1201         struct cvmx_pciercx_cfg455_s {
1202                 uint32_t m_cfg0_filt:1;
1203                 uint32_t m_io_filt:1;
1204                 uint32_t msg_ctrl:1;
1205                 uint32_t m_cpl_ecrc_filt:1;
1206                 uint32_t m_ecrc_filt:1;
1207                 uint32_t m_cpl_len_err:1;
1208                 uint32_t m_cpl_attr_err:1;
1209                 uint32_t m_cpl_tc_err:1;
1210                 uint32_t m_cpl_fun_err:1;
1211                 uint32_t m_cpl_rid_err:1;
1212                 uint32_t m_cpl_tag_err:1;
1213                 uint32_t m_lk_filt:1;
1214                 uint32_t m_cfg1_filt:1;
1215                 uint32_t m_bar_match:1;
1216                 uint32_t m_pois_filt:1;
1217                 uint32_t m_fun:1;
1218                 uint32_t dfcwt:1;
1219                 uint32_t reserved_11_14:4;
1220                 uint32_t skpiv:11;
1221         } s;
1222         struct cvmx_pciercx_cfg455_s cn52xx;
1223         struct cvmx_pciercx_cfg455_s cn52xxp1;
1224         struct cvmx_pciercx_cfg455_s cn56xx;
1225         struct cvmx_pciercx_cfg455_s cn56xxp1;
1226         struct cvmx_pciercx_cfg455_s cn63xx;
1227         struct cvmx_pciercx_cfg455_s cn63xxp1;
1228 };
1229
1230 union cvmx_pciercx_cfg456 {
1231         uint32_t u32;
1232         struct cvmx_pciercx_cfg456_s {
1233                 uint32_t reserved_2_31:30;
1234                 uint32_t m_vend1_drp:1;
1235                 uint32_t m_vend0_drp:1;
1236         } s;
1237         struct cvmx_pciercx_cfg456_s cn52xx;
1238         struct cvmx_pciercx_cfg456_s cn52xxp1;
1239         struct cvmx_pciercx_cfg456_s cn56xx;
1240         struct cvmx_pciercx_cfg456_s cn56xxp1;
1241         struct cvmx_pciercx_cfg456_s cn63xx;
1242         struct cvmx_pciercx_cfg456_s cn63xxp1;
1243 };
1244
1245 union cvmx_pciercx_cfg458 {
1246         uint32_t u32;
1247         struct cvmx_pciercx_cfg458_s {
1248                 uint32_t dbg_info_l32:32;
1249         } s;
1250         struct cvmx_pciercx_cfg458_s cn52xx;
1251         struct cvmx_pciercx_cfg458_s cn52xxp1;
1252         struct cvmx_pciercx_cfg458_s cn56xx;
1253         struct cvmx_pciercx_cfg458_s cn56xxp1;
1254         struct cvmx_pciercx_cfg458_s cn63xx;
1255         struct cvmx_pciercx_cfg458_s cn63xxp1;
1256 };
1257
1258 union cvmx_pciercx_cfg459 {
1259         uint32_t u32;
1260         struct cvmx_pciercx_cfg459_s {
1261                 uint32_t dbg_info_u32:32;
1262         } s;
1263         struct cvmx_pciercx_cfg459_s cn52xx;
1264         struct cvmx_pciercx_cfg459_s cn52xxp1;
1265         struct cvmx_pciercx_cfg459_s cn56xx;
1266         struct cvmx_pciercx_cfg459_s cn56xxp1;
1267         struct cvmx_pciercx_cfg459_s cn63xx;
1268         struct cvmx_pciercx_cfg459_s cn63xxp1;
1269 };
1270
1271 union cvmx_pciercx_cfg460 {
1272         uint32_t u32;
1273         struct cvmx_pciercx_cfg460_s {
1274                 uint32_t reserved_20_31:12;
1275                 uint32_t tphfcc:8;
1276                 uint32_t tpdfcc:12;
1277         } s;
1278         struct cvmx_pciercx_cfg460_s cn52xx;
1279         struct cvmx_pciercx_cfg460_s cn52xxp1;
1280         struct cvmx_pciercx_cfg460_s cn56xx;
1281         struct cvmx_pciercx_cfg460_s cn56xxp1;
1282         struct cvmx_pciercx_cfg460_s cn63xx;
1283         struct cvmx_pciercx_cfg460_s cn63xxp1;
1284 };
1285
1286 union cvmx_pciercx_cfg461 {
1287         uint32_t u32;
1288         struct cvmx_pciercx_cfg461_s {
1289                 uint32_t reserved_20_31:12;
1290                 uint32_t tchfcc:8;
1291                 uint32_t tcdfcc:12;
1292         } s;
1293         struct cvmx_pciercx_cfg461_s cn52xx;
1294         struct cvmx_pciercx_cfg461_s cn52xxp1;
1295         struct cvmx_pciercx_cfg461_s cn56xx;
1296         struct cvmx_pciercx_cfg461_s cn56xxp1;
1297         struct cvmx_pciercx_cfg461_s cn63xx;
1298         struct cvmx_pciercx_cfg461_s cn63xxp1;
1299 };
1300
1301 union cvmx_pciercx_cfg462 {
1302         uint32_t u32;
1303         struct cvmx_pciercx_cfg462_s {
1304                 uint32_t reserved_20_31:12;
1305                 uint32_t tchfcc:8;
1306                 uint32_t tcdfcc:12;
1307         } s;
1308         struct cvmx_pciercx_cfg462_s cn52xx;
1309         struct cvmx_pciercx_cfg462_s cn52xxp1;
1310         struct cvmx_pciercx_cfg462_s cn56xx;
1311         struct cvmx_pciercx_cfg462_s cn56xxp1;
1312         struct cvmx_pciercx_cfg462_s cn63xx;
1313         struct cvmx_pciercx_cfg462_s cn63xxp1;
1314 };
1315
1316 union cvmx_pciercx_cfg463 {
1317         uint32_t u32;
1318         struct cvmx_pciercx_cfg463_s {
1319                 uint32_t reserved_3_31:29;
1320                 uint32_t rqne:1;
1321                 uint32_t trbne:1;
1322                 uint32_t rtlpfccnr:1;
1323         } s;
1324         struct cvmx_pciercx_cfg463_s cn52xx;
1325         struct cvmx_pciercx_cfg463_s cn52xxp1;
1326         struct cvmx_pciercx_cfg463_s cn56xx;
1327         struct cvmx_pciercx_cfg463_s cn56xxp1;
1328         struct cvmx_pciercx_cfg463_s cn63xx;
1329         struct cvmx_pciercx_cfg463_s cn63xxp1;
1330 };
1331
1332 union cvmx_pciercx_cfg464 {
1333         uint32_t u32;
1334         struct cvmx_pciercx_cfg464_s {
1335                 uint32_t wrr_vc3:8;
1336                 uint32_t wrr_vc2:8;
1337                 uint32_t wrr_vc1:8;
1338                 uint32_t wrr_vc0:8;
1339         } s;
1340         struct cvmx_pciercx_cfg464_s cn52xx;
1341         struct cvmx_pciercx_cfg464_s cn52xxp1;
1342         struct cvmx_pciercx_cfg464_s cn56xx;
1343         struct cvmx_pciercx_cfg464_s cn56xxp1;
1344         struct cvmx_pciercx_cfg464_s cn63xx;
1345         struct cvmx_pciercx_cfg464_s cn63xxp1;
1346 };
1347
1348 union cvmx_pciercx_cfg465 {
1349         uint32_t u32;
1350         struct cvmx_pciercx_cfg465_s {
1351                 uint32_t wrr_vc7:8;
1352                 uint32_t wrr_vc6:8;
1353                 uint32_t wrr_vc5:8;
1354                 uint32_t wrr_vc4:8;
1355         } s;
1356         struct cvmx_pciercx_cfg465_s cn52xx;
1357         struct cvmx_pciercx_cfg465_s cn52xxp1;
1358         struct cvmx_pciercx_cfg465_s cn56xx;
1359         struct cvmx_pciercx_cfg465_s cn56xxp1;
1360         struct cvmx_pciercx_cfg465_s cn63xx;
1361         struct cvmx_pciercx_cfg465_s cn63xxp1;
1362 };
1363
1364 union cvmx_pciercx_cfg466 {
1365         uint32_t u32;
1366         struct cvmx_pciercx_cfg466_s {
1367                 uint32_t rx_queue_order:1;
1368                 uint32_t type_ordering:1;
1369                 uint32_t reserved_24_29:6;
1370                 uint32_t queue_mode:3;
1371                 uint32_t reserved_20_20:1;
1372                 uint32_t header_credits:8;
1373                 uint32_t data_credits:12;
1374         } s;
1375         struct cvmx_pciercx_cfg466_s cn52xx;
1376         struct cvmx_pciercx_cfg466_s cn52xxp1;
1377         struct cvmx_pciercx_cfg466_s cn56xx;
1378         struct cvmx_pciercx_cfg466_s cn56xxp1;
1379         struct cvmx_pciercx_cfg466_s cn63xx;
1380         struct cvmx_pciercx_cfg466_s cn63xxp1;
1381 };
1382
1383 union cvmx_pciercx_cfg467 {
1384         uint32_t u32;
1385         struct cvmx_pciercx_cfg467_s {
1386                 uint32_t reserved_24_31:8;
1387                 uint32_t queue_mode:3;
1388                 uint32_t reserved_20_20:1;
1389                 uint32_t header_credits:8;
1390                 uint32_t data_credits:12;
1391         } s;
1392         struct cvmx_pciercx_cfg467_s cn52xx;
1393         struct cvmx_pciercx_cfg467_s cn52xxp1;
1394         struct cvmx_pciercx_cfg467_s cn56xx;
1395         struct cvmx_pciercx_cfg467_s cn56xxp1;
1396         struct cvmx_pciercx_cfg467_s cn63xx;
1397         struct cvmx_pciercx_cfg467_s cn63xxp1;
1398 };
1399
1400 union cvmx_pciercx_cfg468 {
1401         uint32_t u32;
1402         struct cvmx_pciercx_cfg468_s {
1403                 uint32_t reserved_24_31:8;
1404                 uint32_t queue_mode:3;
1405                 uint32_t reserved_20_20:1;
1406                 uint32_t header_credits:8;
1407                 uint32_t data_credits:12;
1408         } s;
1409         struct cvmx_pciercx_cfg468_s cn52xx;
1410         struct cvmx_pciercx_cfg468_s cn52xxp1;
1411         struct cvmx_pciercx_cfg468_s cn56xx;
1412         struct cvmx_pciercx_cfg468_s cn56xxp1;
1413         struct cvmx_pciercx_cfg468_s cn63xx;
1414         struct cvmx_pciercx_cfg468_s cn63xxp1;
1415 };
1416
1417 union cvmx_pciercx_cfg490 {
1418         uint32_t u32;
1419         struct cvmx_pciercx_cfg490_s {
1420                 uint32_t reserved_26_31:6;
1421                 uint32_t header_depth:10;
1422                 uint32_t reserved_14_15:2;
1423                 uint32_t data_depth:14;
1424         } s;
1425         struct cvmx_pciercx_cfg490_s cn52xx;
1426         struct cvmx_pciercx_cfg490_s cn52xxp1;
1427         struct cvmx_pciercx_cfg490_s cn56xx;
1428         struct cvmx_pciercx_cfg490_s cn56xxp1;
1429         struct cvmx_pciercx_cfg490_s cn63xx;
1430         struct cvmx_pciercx_cfg490_s cn63xxp1;
1431 };
1432
1433 union cvmx_pciercx_cfg491 {
1434         uint32_t u32;
1435         struct cvmx_pciercx_cfg491_s {
1436                 uint32_t reserved_26_31:6;
1437                 uint32_t header_depth:10;
1438                 uint32_t reserved_14_15:2;
1439                 uint32_t data_depth:14;
1440         } s;
1441         struct cvmx_pciercx_cfg491_s cn52xx;
1442         struct cvmx_pciercx_cfg491_s cn52xxp1;
1443         struct cvmx_pciercx_cfg491_s cn56xx;
1444         struct cvmx_pciercx_cfg491_s cn56xxp1;
1445         struct cvmx_pciercx_cfg491_s cn63xx;
1446         struct cvmx_pciercx_cfg491_s cn63xxp1;
1447 };
1448
1449 union cvmx_pciercx_cfg492 {
1450         uint32_t u32;
1451         struct cvmx_pciercx_cfg492_s {
1452                 uint32_t reserved_26_31:6;
1453                 uint32_t header_depth:10;
1454                 uint32_t reserved_14_15:2;
1455                 uint32_t data_depth:14;
1456         } s;
1457         struct cvmx_pciercx_cfg492_s cn52xx;
1458         struct cvmx_pciercx_cfg492_s cn52xxp1;
1459         struct cvmx_pciercx_cfg492_s cn56xx;
1460         struct cvmx_pciercx_cfg492_s cn56xxp1;
1461         struct cvmx_pciercx_cfg492_s cn63xx;
1462         struct cvmx_pciercx_cfg492_s cn63xxp1;
1463 };
1464
1465 union cvmx_pciercx_cfg515 {
1466         uint32_t u32;
1467         struct cvmx_pciercx_cfg515_s {
1468                 uint32_t reserved_21_31:11;
1469                 uint32_t s_d_e:1;
1470                 uint32_t ctcrb:1;
1471                 uint32_t cpyts:1;
1472                 uint32_t dsc:1;
1473                 uint32_t le:9;
1474                 uint32_t n_fts:8;
1475         } s;
1476         struct cvmx_pciercx_cfg515_s cn63xx;
1477         struct cvmx_pciercx_cfg515_s cn63xxp1;
1478 };
1479
1480 union cvmx_pciercx_cfg516 {
1481         uint32_t u32;
1482         struct cvmx_pciercx_cfg516_s {
1483                 uint32_t phy_stat:32;
1484         } s;
1485         struct cvmx_pciercx_cfg516_s cn52xx;
1486         struct cvmx_pciercx_cfg516_s cn52xxp1;
1487         struct cvmx_pciercx_cfg516_s cn56xx;
1488         struct cvmx_pciercx_cfg516_s cn56xxp1;
1489         struct cvmx_pciercx_cfg516_s cn63xx;
1490         struct cvmx_pciercx_cfg516_s cn63xxp1;
1491 };
1492
1493 union cvmx_pciercx_cfg517 {
1494         uint32_t u32;
1495         struct cvmx_pciercx_cfg517_s {
1496                 uint32_t phy_ctrl:32;
1497         } s;
1498         struct cvmx_pciercx_cfg517_s cn52xx;
1499         struct cvmx_pciercx_cfg517_s cn52xxp1;
1500         struct cvmx_pciercx_cfg517_s cn56xx;
1501         struct cvmx_pciercx_cfg517_s cn56xxp1;
1502         struct cvmx_pciercx_cfg517_s cn63xx;
1503         struct cvmx_pciercx_cfg517_s cn63xxp1;
1504 };
1505
1506 #endif